rockbox/firmware/target/arm/as3525/timer-as3525.c, branch master

AMS SoC's: Some register bit changes need interrupt protection: timer API and CGU_PERI.

2010-07-02T06:00:00+00:00

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@27236 a1c6a512-1295-4272-9138-f99709370657

Sansa AMS: VIC_INT_ENABLE register is not a mask

2009-11-24T12:05:53+00:00

When read it returns all enabled interrupt sources
When written it enables interrupt sources for each bit set
So just like VIC_INT_EN_CLEAR, we don't have to read the previous value
before writing to it (VIC_INT_EN_CLEAR is write-only anyway)

Thanks to Fred Bauer for spotting

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23734 a1c6a512-1295-4272-9138-f99709370657

Remove the TIMER_* macros and declare target-specific functions in timer.h

2009-06-29T14:29:57+00:00

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21559 a1c6a512-1295-4272-9138-f99709370657

Rename TIMER_REGISTER macro to TIMER_START and TIMER_UNREGISTER to TIMER_STOP to reflect what they does exactly.

2009-06-29T14:28:56+00:00

registering and unregistering are handled by the non target-specific functions of timer.c
Remove arguments from the new TIMER_START since they are unused by targets

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21553 a1c6a512-1295-4272-9138-f99709370657

Move Sansa AMS timer code in the target tree

2009-06-29T14:28:49+00:00

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21552 a1c6a512-1295-4272-9138-f99709370657