rockbox/firmware/target/arm/bits-armv4.S, branch master My Rockbox tree Do some things to make -ffunction-sections work better. 2011-12-17T01:43:32+00:00 Michael Sevakis jethead71@rockbox.org 2011-12-17T01:43:32+00:00 28dec004c0782e81661d9803ddf51a19b58dc469 * Add wildcards to various sections placements a la *(".text") => "*(.text*)" * Remove hacky bits from those linker scripts (no problem encountered testing) * Change section for asm functions from .<section> to .<section>.<function> so that -ffunction-sections works for those asm file too. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@31337 a1c6a512-1295-4272-9138-f99709370657 
* Add wildcards to various sections placements a la *(".text") => "*(.text*)"
* Remove hacky bits from those linker scripts (no problem encountered testing)
* Change section for asm functions from .<section> to .<section>.<function>
  so that -ffunction-sections works for those asm file too.


git-svn-id: svn://svn.rockbox.org/rockbox/trunk@31337 a1c6a512-1295-4272-9138-f99709370657
Add ARMv4 16-bit(set, mod, clr) operations used on DM320. 2011-02-06T19:43:45+00:00 Karl Kurbjun kkurbjun@gmail.com 2011-02-06T19:43:45+00:00 8e8f700842f7b9737bfd62651372db0656cfa52d git-svn-id: svn://svn.rockbox.org/rockbox/trunk@29221 a1c6a512-1295-4272-9138-f99709370657 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@29221 a1c6a512-1295-4272-9138-f99709370657
Remove atomic register bit manipulation functions from i.MX and s3c target code and introduce generic functions for ARM (bitmod32, bitset32, and bitclr32). Multiprocessor support is possible but just not implemented at the moment, only interrupt lockout. 2010-06-30T02:02:46+00:00 Michael Sevakis jethead71@rockbox.org 2010-06-30T02:02:46+00:00 e286b0bbc04a34c181978efce19c6d0814e228c0 git-svn-id: svn://svn.rockbox.org/rockbox/trunk@27188 a1c6a512-1295-4272-9138-f99709370657 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@27188 a1c6a512-1295-4272-9138-f99709370657