rockbox/firmware/target/arm/system-target.h, branch master

Move PP-specific headers to pp/ directory

2012-01-03T04:23:24+00:00

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@31530 a1c6a512-1295-4272-9138-f99709370657

firewire/usb_remove/insert_int: move to system-target.h

2011-12-31T18:44:12+00:00

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@31491 a1c6a512-1295-4272-9138-f99709370657

usb_plugged() is PP only

2011-12-31T18:43:59+00:00

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@31489 a1c6a512-1295-4272-9138-f99709370657

move usb_pin_init() declaration to PP's system-target.h

2011-12-31T18:43:53+00:00

remove duplicate usb_detect() declaration
Remove all content from empty usb-target.h files

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@31488 a1c6a512-1295-4272-9138-f99709370657

Commit to certain names for cache coherency APIs and discard the aliases.

2011-12-17T07:27:24+00:00

Wouldn't surprise me a bit to get some non-green.


git-svn-id: svn://svn.rockbox.org/rockbox/trunk@31339 a1c6a512-1295-4272-9138-f99709370657

Set the default battery capacity for ipod video properly depending on detected RAM size.

2011-07-19T20:48:16+00:00

Also set up a callback for the battery capacity setting (for all players) so changes take effect without having to reboot.


git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30170 a1c6a512-1295-4272-9138-f99709370657

Bootloader USB mode for PP502x. Enable only on GoGear SA9200 for the time being. Add HAVE_BOOTLOADER_USB_MODE to config if BOOTLOADER is defined to enable it. Clean up some kernel stuff a little to support it. Mess up a bunch of other stuff (hopefully not too badly).

2011-01-15T08:19:30+00:00

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@29053 a1c6a512-1295-4272-9138-f99709370657

Change alignment macros to allow further performance optimization. Define the CACHEALIGN macros for all ARM CPUs, the used alignment size is derived from CACHEALIGN_BITS which has been defined for each supported ARM CPU with r28619. The default alignment size for ARM is set to 32 bytes as new -- not yet supported -- ARM CPUs will most probably need this alignment. To be able to differ between ARM and other CPUs a new macro called MEM_ALIGN_ATTR is introduced. This equals CACHEALIGN_ATTR for ARM, 16 byte alignment for Coldfire and is kept empty for other CPUs. MEM_ALIGN_ATTR is available system wide. From measurements it is expected that the usage of MEM_ALIGN_ATTR can give significant performance gain on ARM11 CPUs.

2010-11-21T12:27:01+00:00

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@28625 a1c6a512-1295-4272-9138-f99709370657

Rename cache coherency functions.

2010-09-08T17:05:49+00:00

The old cache coherency function names where wrong and misleading.
The new names are (purposely different from vendor manuals)
*  commit_* (write-back only)
*  discard_* (removing lines from cache only)
*  commit_discard_* (write-back and removing lines from cache)

It's suspected the old names have led to wrong uses. The old names still exist
(as aliases) so every call via the old names need to be double checked and changed
to the new name.

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@28045 a1c6a512-1295-4272-9138-f99709370657

ipodvideo: detect ram size at boot (doesn't actually get USED yet)

2010-08-29T13:20:16+00:00

This is the first step to allowing a single build which will work on any ipodvideo.

A global variable, probed_ramsize, is initialised to either 32 or 64 early in boot.


git-svn-id: svn://svn.rockbox.org/rockbox/trunk@27937 a1c6a512-1295-4272-9138-f99709370657