Change-Id: I196414d6e4fc18c00b77903e334b7e6adfb7debc

Change-Id: Id0a071528eca08fe512941be9c8091819e817e4c

This is a register description file for the JZ4760B. There are several
details worth noticing:
- it was obtained by gathering information from several sources/headers, but
  since there are inconsistencies between them about the exact differences
  between JZ4760 and JZ4760B, this file probably contains some errors
- the register names are not the same as the manual ones (which are not the
  same as the one in the headers anyway): I dropped the "R" suffix on most
  registers because it's redundant
- Ingenic likes to have read-only registers and then set/clr registers, with
  very confusing names like DIR/DIRS/DIRC: in the file, the set/clr registers
  are described as set/clr variants of the original register
- Parts of the description were obtained programmatically, which explains why
  there are empty nodes or partially undocumented registers

Change-Id: I8da1d61e172e932e1a4a58ac0a5008f02b1751be

This new header generator works differently from the previous one:
- it uses the new format
- the generated macro follow a different style (see below)
- the generated macro are highly documented!
- it supports SCT-style platform or RMW-style ones

Compared to the old style, the new one generate a big set of macros per
register/field/enum (loosely related to iohw.h from Embedded C spec). The user
then calls generic (names are customizable) macros to perform operations:

reg_read(REG_A)
reg_read(REG_B(3))
reg_read_field(REG_A, FIELD_X)
reg_read_field(REG_B(3), COOL_FIELD)
reg_write(REG_A, 0x42)
reg_write_field(REG_A, FIELD_X(1), FIELD_Y(3), IRQ_V(FIQ))
reg_write_fielc(REG_B(3), COOL_FIELD_V(I_AM_COOL), BLA(42))

the following use RMW or SET/CLR variants, depending on target:
reg_set_field(REG_A, FLAG_U, FLAG_V)
reg_clr_field(REG_A, FIELD_X, FIELD_Y, IRQ)
reg_clr_field(REG_B(3), COOL_FIELD, BLA)

the following does clear followed by set, on SET/CLR targets:
reg_cs(REG_A, 0xff, 0x42)
reg_cs(REG_B(3), 0xaa, 0x55)
reg_cs_field(REG_A, FIELD_X(1), FIELD_Y(3), IRQ_V(FIQ))
reg_cs_field(REG_B(3), COOL_FIELD_V(I_AM_COOL))

The generator code is pretty long but has lots of documentation and lots of
macro names can be customized.

Change-Id: I5d6c5ec2406e58b5da11a5240c3a409a5bb5239a

Registers (and variants) can now specify the type of access supported:
- unspecified: for variant means same as register, for register defaults R/W
- read/write
- read only
- write only
Backward compatibility is preserved by setting access to unspecified by default.

Change-Id: I3e84ae18f962a45db62f996a542d08405d05b895

Change-Id: I60a764567d2fc73ed87fca2a8b0eaf643d4984bc

Conversion done using swiss_knife as follows:
./swiss_knife convert --author "Amaury Pouly" --version "2.4.0" desc/regs-stmp3XXX-v1.xml desc/regs-stmp3XXX.xml

Change-Id: Iad26e04f8f599cf25339a33aa65f231379434e98

Change-Id: Ib66a404acf1f640e19b30b35d6a976094ae4264a

A v2 register description file can now include register variants and instances
addresses can now be a list (previously it could only be a stride or a formula).
Update the library to deal with that. The convert option of swiss_knife was
updated and one incompatible change was introduce: if a v1 device has several
addresses, those are converted to a single v2 instance with list (instead of
several single instances). This should have been the behaviour from the start.
Swiss_knife can now also convert regdumps, in which case it needs to be given
both the dump and register description file. Also introduce two register
descriptions files (vsoc1000 and vsoc2000) which give more complicated examples
of v2 register description files.

Change-Id: Id9415b8363269ffaf9216abfc6dd1bd1adbfcf8d

Fix qeditor to use the old soc_desc_v1.
Port hwstub_shell to the new description format.

Change-Id: I9fefbff534bfaa5c3603bb3dd8307a2b76e88cfc