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| author | Franklin Wei <frankhwei536@gmail.com> | 2016-06-09 13:30:37 -0400 |
|---|---|---|
| committer | Franklin Wei <frankhwei536@gmail.com> | 2016-06-09 13:30:37 -0400 |
| commit | acf1b7b072fe5fb2198d96bfea31476d75e34c5b (patch) | |
| tree | d5e4bacd800eeb96fe6f25cf6dcd5d6586c1dfda /apps/plugins | |
| parent | 1aca063cbab615903cefc624b3bb736174786916 (diff) | |
| parent | a63caba4a811f697092f7b1767befae2c078ee55 (diff) | |
| download | rockbox-acf1b7b072fe5fb2198d96bfea31476d75e34c5b.zip rockbox-acf1b7b072fe5fb2198d96bfea31476d75e34c5b.tar.gz rockbox-acf1b7b072fe5fb2198d96bfea31476d75e34c5b.tar.bz2 rockbox-acf1b7b072fe5fb2198d96bfea31476d75e34c5b.tar.xz | |
Merge branch 'infones' into working
Diffstat (limited to 'apps/plugins')
157 files changed, 28679 insertions, 0 deletions
diff --git a/apps/plugins/SUBDIRS b/apps/plugins/SUBDIRS index 6213242..8114016 100644 --- a/apps/plugins/SUBDIRS +++ b/apps/plugins/SUBDIRS @@ -28,6 +28,7 @@ xworld && (defined(HAVE_LCD_COLOR) || (LCD_HEIGHT == 64) && (LCD_DEPTH == 1) || \ (LCD_HEIGHT == 128) && (LCD_DEPTH == 2)) rockboy +infones #endif #if defined(HAVE_TAGCACHE) diff --git a/apps/plugins/infones/InfoNES.c b/apps/plugins/infones/InfoNES.c new file mode 100644 index 0000000..4ca95be --- /dev/null +++ b/apps/plugins/infones/InfoNES.c @@ -0,0 +1,1182 @@ +/*************************************************************************** + * __________ __ ___. + * Open \______ \ ____ ____ | | _\_ |__ _______ ___ + * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / + * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < + * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ + * \/ \/ \/ \/ \/ + * + * Rockbox port of InfoNES + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY + * KIND, either express or implied. + * + ****************************************************************************/ + +/*-------------------------------------------------------------------*/ +/* Include files */ +/*-------------------------------------------------------------------*/ + +#include "InfoNES.h" +#include "InfoNES_System.h" +#include "InfoNES_Mapper.h" +#include "InfoNES_pAPU.h" +#include "K6502.h" + +/*-------------------------------------------------------------------*/ +/* NES resources */ +/*-------------------------------------------------------------------*/ + +/* RAM */ +BYTE RAM[ RAM_SIZE ]; + +/* SRAM */ +BYTE SRAM[ SRAM_SIZE ]; + +/* ROM */ +BYTE *ROM; + +/* SRAM BANK ( 8Kb ) */ +BYTE *SRAMBANK; + +/* ROM BANK ( 8Kb * 4 ) */ +BYTE *ROMBANK0; +BYTE *ROMBANK1; +BYTE *ROMBANK2; +BYTE *ROMBANK3; + +/*-------------------------------------------------------------------*/ +/* PPU resources */ +/*-------------------------------------------------------------------*/ + +/* PPU RAM */ +BYTE PPURAM[ PPURAM_SIZE ]; + +/* VROM */ +BYTE *VROM; + +/* PPU BANK ( 1Kb * 16 ) */ +BYTE *PPUBANK[ 16 ]; + +/* Sprite RAM */ +BYTE SPRRAM[ SPRRAM_SIZE ]; + +/* PPU Register */ +BYTE PPU_R0; +BYTE PPU_R1; +BYTE PPU_R2; +BYTE PPU_R3; +BYTE PPU_R7; + +/* Vertical scroll value */ +BYTE PPU_Scr_V; +BYTE PPU_Scr_V_Next; +BYTE PPU_Scr_V_Byte; +BYTE PPU_Scr_V_Byte_Next; +BYTE PPU_Scr_V_Bit; +BYTE PPU_Scr_V_Bit_Next; + +/* Horizontal scroll value */ +BYTE PPU_Scr_H; +BYTE PPU_Scr_H_Next; +BYTE PPU_Scr_H_Byte; +BYTE PPU_Scr_H_Byte_Next; +BYTE PPU_Scr_H_Bit; +BYTE PPU_Scr_H_Bit_Next; + +/* PPU Address */ +WORD PPU_Addr; + +/* PPU Address */ +WORD PPU_Temp; + +/* The increase value of the PPU Address */ +WORD PPU_Increment; + +/* Current Scanline */ +WORD PPU_Scanline; + +/* Scanline Table */ +BYTE PPU_ScanTable[ 263 ]; + +/* Name Table Bank */ +BYTE PPU_NameTableBank; + +/* BG Base Address */ +BYTE *PPU_BG_Base; + +/* Sprite Base Address */ +BYTE *PPU_SP_Base; + +/* Sprite Height */ +WORD PPU_SP_Height; + +/* Sprite #0 Scanline Hit Position */ +int SpriteJustHit; + +/* VRAM Write Enable ( 0: Disable, 1: Enable ) */ +BYTE byVramWriteEnable; + +/* PPU Address and Scroll Latch Flag*/ +BYTE PPU_Latch_Flag; + +/* Up and Down Clipping Flag ( 0: non-clip, 1: clip ) */ +BYTE PPU_UpDown_Clip; + +/* Frame IRQ ( 0: Disabled, 1: Enabled )*/ +BYTE FrameIRQ_Enable; +WORD FrameStep; + +/*-------------------------------------------------------------------*/ +/* Display and Others resouces */ +/*-------------------------------------------------------------------*/ + +/* Frame Skip */ +WORD FrameSkip; +WORD FrameCnt; + +/* Display Buffer */ +#if 0 +WORD DoubleFrame[ 2 ][ NES_DISP_WIDTH * NES_DISP_HEIGHT ]; +WORD *WorkFrame; +WORD WorkFrameIdx; +#else +WORD WorkFrame[ NES_DISP_WIDTH * NES_DISP_HEIGHT ]; +#endif + +/* Character Buffer */ +BYTE ChrBuf[ 256 * 2 * 8 * 8 ]; + +/* Update flag for ChrBuf */ +BYTE ChrBufUpdate; + +/* Palette Table */ +WORD PalTable[ 32 ]; + +/* Table for Mirroring */ +BYTE PPU_MirrorTable[][ 4 ] = +{ + { NAME_TABLE0, NAME_TABLE0, NAME_TABLE1, NAME_TABLE1 }, + { NAME_TABLE0, NAME_TABLE1, NAME_TABLE0, NAME_TABLE1 }, + { NAME_TABLE1, NAME_TABLE1, NAME_TABLE1, NAME_TABLE1 }, + { NAME_TABLE0, NAME_TABLE0, NAME_TABLE0, NAME_TABLE0 }, + { NAME_TABLE0, NAME_TABLE1, NAME_TABLE2, NAME_TABLE3 }, + { NAME_TABLE0, NAME_TABLE0, NAME_TABLE0, NAME_TABLE1 } +}; + +/*-------------------------------------------------------------------*/ +/* APU and Pad resources */ +/*-------------------------------------------------------------------*/ + +/* APU Register */ +BYTE APU_Reg[ 0x18 ]; + +/* APU Mute ( 0:OFF, 1:ON ) */ +int APU_Mute = 0; + +/* Pad data */ +DWORD PAD1_Latch; +DWORD PAD2_Latch; +DWORD PAD_System; +DWORD PAD1_Bit; +DWORD PAD2_Bit; + +/*-------------------------------------------------------------------*/ +/* Mapper Function */ +/*-------------------------------------------------------------------*/ + +/* Initialize Mapper */ +void (*MapperInit)(void); +/* Write to Mapper */ +void (*MapperWrite)( WORD wAddr, BYTE byData ); +/* Write to SRAM */ +void (*MapperSram)( WORD wAddr, BYTE byData ); +/* Write to Apu */ +void (*MapperApu)( WORD wAddr, BYTE byData ); +/* Read from Apu */ +BYTE (*MapperReadApu)( WORD wAddr ); +/* Callback at VSync */ +void (*MapperVSync)(void); +/* Callback at HSync */ +void (*MapperHSync)(void); +/* Callback at PPU read/write */ +void (*MapperPPU)( WORD wAddr ); +/* Callback at Rendering Screen 1:BG, 0:Sprite */ +void (*MapperRenderScreen)( BYTE byMode ); + +/*-------------------------------------------------------------------*/ +/* ROM information */ +/*-------------------------------------------------------------------*/ + +/* .nes File Header */ +struct NesHeader_tag NesHeader; + +/* Mapper Number */ +BYTE MapperNo; + +/* Mirroring 0:Horizontal 1:Vertical */ +BYTE ROM_Mirroring; +/* It has SRAM */ +BYTE ROM_SRAM; +/* It has Trainer */ +BYTE ROM_Trainer; +/* Four screen VRAM */ +BYTE ROM_FourScr; + +/*===================================================================*/ +/* */ +/* InfoNES_Init() : Initialize InfoNES */ +/* */ +/*===================================================================*/ +void InfoNES_Init() +{ +/* + * Initialize InfoNES + * + * Remarks + * Initialize K6502 and Scanline Table. + */ + int nIdx; + + // Initialize 6502 + K6502_Init(); + + // Initialize Scanline Table + for ( nIdx = 0; nIdx < 263; ++nIdx ) + { + if ( nIdx < SCAN_ON_SCREEN_START ) + PPU_ScanTable[ nIdx ] = SCAN_ON_SCREEN; + else + if ( nIdx < SCAN_BOTTOM_OFF_SCREEN_START ) + PPU_ScanTable[ nIdx ] = SCAN_ON_SCREEN; + else + if ( nIdx < SCAN_UNKNOWN_START ) + PPU_ScanTable[ nIdx ] = SCAN_ON_SCREEN; + else + if ( nIdx < SCAN_VBLANK_START ) + PPU_ScanTable[ nIdx ] = SCAN_UNKNOWN; + else + PPU_ScanTable[ nIdx ] = SCAN_VBLANK; + } +} + +/*===================================================================*/ +/* */ +/* InfoNES_Fin() : Completion treatment */ +/* */ +/*===================================================================*/ +void InfoNES_Fin() +{ +/* + * Completion treatment + * + * Remarks + * Release resources + */ + // Finalize pAPU + InfoNES_pAPUDone(); + + // Release a memory for ROM + InfoNES_ReleaseRom(); +} + +/*===================================================================*/ +/* */ +/* InfoNES_Load() : Load a cassette */ +/* */ +/*===================================================================*/ +int InfoNES_Load( const char *pszFileName ) +{ +/* + * Load a cassette + * + * Parameters + * const char *pszFileName (Read) + * File name of ROM image + * + * Return values + * 0 : It was finished normally. + * -1 : An error occurred. + * + * Remarks + * Read a ROM image in the memory. + * Reset InfoNES. + */ + + // Release a memory for ROM + InfoNES_ReleaseRom(); + + // Read a ROM image in the memory + if ( InfoNES_ReadRom( pszFileName ) < 0 ) + return -1; + + // Reset InfoNES + if ( InfoNES_Reset() < 0 ) + return -1; + + // Successful + return 0; +} + +/*===================================================================*/ +/* */ +/* InfoNES_Reset() : Reset InfoNES */ +/* */ +/*===================================================================*/ +int InfoNES_Reset() +{ +/* + * Reset InfoNES + * + * Return values + * 0 : Normally + * -1 : Non support mapper + * + * Remarks + * Initialize Resources, PPU and Mapper. + * Reset CPU. + */ + + int nIdx; + + /*-------------------------------------------------------------------*/ + /* Get information on the cassette */ + /*-------------------------------------------------------------------*/ + + // Get Mapper Number + MapperNo = NesHeader.byInfo1 >> 4; + //MapperNo = 4; + + // Check bit counts of Mapper No. + for ( nIdx = 4; nIdx < 8 && NesHeader.byReserve[ nIdx ] == 0; ++nIdx ) + ; + + if ( nIdx == 8 ) + { + // Mapper Number is 8bits + MapperNo |= ( NesHeader.byInfo2 & 0xf0 ); + } + + // Get information on the ROM + ROM_Mirroring = NesHeader.byInfo1 & 1; + ROM_SRAM = NesHeader.byInfo1 & 2; + ROM_Trainer = NesHeader.byInfo1 & 4; + ROM_FourScr = NesHeader.byInfo1 & 8; + + /*-------------------------------------------------------------------*/ + /* Initialize resources */ + /*-------------------------------------------------------------------*/ + + // Clear RAM + InfoNES_MemorySet( RAM, 0, sizeof RAM ); + + // Reset frame skip and frame count + FrameSkip = 0; + FrameCnt = 0; + +#if 0 + // Reset work frame + WorkFrame = DoubleFrame[ 0 ]; + WorkFrameIdx = 0; +#endif + + // Reset update flag of ChrBuf + ChrBufUpdate = 0xff; + + // Reset palette table + InfoNES_MemorySet( PalTable, 0, sizeof PalTable ); + + // Reset APU register + InfoNES_MemorySet( APU_Reg, 0, sizeof APU_Reg ); + + // Reset joypad + PAD1_Latch = PAD2_Latch = PAD_System = 0; + PAD1_Bit = PAD2_Bit = 0; + + /*-------------------------------------------------------------------*/ + /* Initialize PPU */ + /*-------------------------------------------------------------------*/ + + InfoNES_SetupPPU(); + + /*-------------------------------------------------------------------*/ + /* Initialize pAPU */ + /*-------------------------------------------------------------------*/ + + InfoNES_pAPUInit(); + + /*-------------------------------------------------------------------*/ + /* Initialize Mapper */ + /*-------------------------------------------------------------------*/ + + // Get Mapper Table Index + for ( nIdx = 0; MapperTable[ nIdx ].nMapperNo != -1; ++nIdx ) + { + if ( MapperTable[ nIdx ].nMapperNo == MapperNo ) + break; + } + + if ( MapperTable[ nIdx ].nMapperNo == -1 ) + { + // Non support mapper + InfoNES_MessageBox( "Mapper #%d is unsupported.\n", MapperNo ); + return -1; + } + + // Set up a mapper initialization function + MapperTable[ nIdx ].pMapperInit(); + + /*-------------------------------------------------------------------*/ + /* Reset CPU */ + /*-------------------------------------------------------------------*/ + + K6502_Reset(); + + // Successful + return 0; +} + +/*===================================================================*/ +/* */ +/* InfoNES_SetupPPU() : Initialize PPU */ +/* */ +/*===================================================================*/ +void InfoNES_SetupPPU() +{ +/* + * Initialize PPU + * + */ + int nPage; + + // Clear PPU and Sprite Memory + InfoNES_MemorySet( PPURAM, 0, sizeof PPURAM ); + InfoNES_MemorySet( SPRRAM, 0, sizeof SPRRAM ); + + // Reset PPU Register + PPU_R0 = PPU_R1 = PPU_R2 = PPU_R3 = PPU_R7 = 0; + + // Reset latch flag + PPU_Latch_Flag = 0; + + // Reset up and down clipping flag + PPU_UpDown_Clip = 0; + + FrameStep = 0; + FrameIRQ_Enable = 0; + + // Reset Scroll values + PPU_Scr_V = PPU_Scr_V_Next = PPU_Scr_V_Byte = PPU_Scr_V_Byte_Next = PPU_Scr_V_Bit = PPU_Scr_V_Bit_Next = 0; + PPU_Scr_H = PPU_Scr_H_Next = PPU_Scr_H_Byte = PPU_Scr_H_Byte_Next = PPU_Scr_H_Bit = PPU_Scr_H_Bit_Next = 0; + + // Reset PPU address + PPU_Addr = 0; + PPU_Temp = 0; + + // Reset scanline + PPU_Scanline = 0; + + // Reset hit position of sprite #0 + SpriteJustHit = 0; + + // Reset information on PPU_R0 + PPU_Increment = 1; + PPU_NameTableBank = NAME_TABLE0; + PPU_BG_Base = ChrBuf; + PPU_SP_Base = ChrBuf + 256 * 64; + PPU_SP_Height = 8; + + // Reset PPU banks + for ( nPage = 0; nPage < 16; ++nPage ) + PPUBANK[ nPage ] = &PPURAM[ nPage * 0x400 ]; + + /* Mirroring of Name Table */ + InfoNES_Mirroring( ROM_Mirroring ); + + /* Reset VRAM Write Enable */ + byVramWriteEnable = ( NesHeader.byVRomSize == 0 ) ? 1 : 0; +} + +/*===================================================================*/ +/* */ +/* InfoNES_Mirroring() : Set up a Mirroring of Name Table */ +/* */ +/*===================================================================*/ +void InfoNES_Mirroring( int nType ) +{ +/* + * Set up a Mirroring of Name Table + * + * Parameters + * int nType (Read) + * Mirroring Type + * 0 : Horizontal + * 1 : Vertical + * 2 : One Screen 0x2400 + * 3 : One Screen 0x2000 + * 4 : Four Screen + * 5 : Special for Mapper #233 + */ + + PPUBANK[ NAME_TABLE0 ] = &PPURAM[ PPU_MirrorTable[ nType ][ 0 ] * 0x400 ]; + PPUBANK[ NAME_TABLE1 ] = &PPURAM[ PPU_MirrorTable[ nType ][ 1 ] * 0x400 ]; + PPUBANK[ NAME_TABLE2 ] = &PPURAM[ PPU_MirrorTable[ nType ][ 2 ] * 0x400 ]; + PPUBANK[ NAME_TABLE3 ] = &PPURAM[ PPU_MirrorTable[ nType ][ 3 ] * 0x400 ]; +} + +/*===================================================================*/ +/* */ +/* InfoNES_Main() : The main loop of InfoNES */ +/* */ +/*===================================================================*/ +void InfoNES_Main() +{ +/* + * The main loop of InfoNES + * + */ + + // Initialize InfoNES + InfoNES_Init(); + + // Main loop + while ( 1 ) + { + /*-------------------------------------------------------------------*/ + /* To the menu screen */ + /*-------------------------------------------------------------------*/ + if ( InfoNES_Menu() == -1 ) + break; // Quit + + /*-------------------------------------------------------------------*/ + /* Start a NES emulation */ + /*-------------------------------------------------------------------*/ + InfoNES_Cycle(); + } + + // Completion treatment + InfoNES_Fin(); +} + +/*===================================================================*/ +/* */ +/* InfoNES_Cycle() : The loop of emulation */ +/* */ +/*===================================================================*/ +void InfoNES_Cycle() +{ +/* + * The loop of emulation + * + */ + +#if 0 + // Set the PPU adress to the buffered value + if ( ( PPU_R1 & R1_SHOW_SP ) || ( PPU_R1 & R1_SHOW_SCR ) ) + PPU_Addr = PPU_Temp; +#endif + + // Emulation loop + for (;;) + { + int nStep; + + // Set a flag if a scanning line is a hit in the sprite #0 + if ( SpriteJustHit == PPU_Scanline && + PPU_ScanTable[ PPU_Scanline ] == SCAN_ON_SCREEN ) + { + // # of Steps to execute before sprite #0 hit + nStep = SPRRAM[ SPR_X ] * STEP_PER_SCANLINE / NES_DISP_WIDTH; + + // Execute instructions + K6502_Step( nStep ); + + // Set a sprite hit flag + if ( ( PPU_R1 & R1_SHOW_SP ) && ( PPU_R1 & R1_SHOW_SCR ) ) + PPU_R2 |= R2_HIT_SP; + + // NMI is required if there is necessity + if ( ( PPU_R0 & R0_NMI_SP ) && ( PPU_R1 & R1_SHOW_SP ) ) + NMI_REQ; + + // Execute instructions + K6502_Step( STEP_PER_SCANLINE - nStep ); + } + else + { + // Execute instructions + K6502_Step( STEP_PER_SCANLINE ); + } + + // Frame IRQ in H-Sync + FrameStep += STEP_PER_SCANLINE; + if ( FrameStep > STEP_PER_FRAME && FrameIRQ_Enable ) + { + FrameStep %= STEP_PER_FRAME; + IRQ_REQ; + APU_Reg[ 0x4015 ] |= 0x40; + } + + // A mapper function in H-Sync + MapperHSync(); + + // A function in H-Sync + if ( InfoNES_HSync() == -1 ) + return; // To the menu screen + + // HSYNC Wait + InfoNES_Wait(); + } +} + +/*===================================================================*/ +/* */ +/* InfoNES_HSync() : A function in H-Sync */ +/* */ +/*===================================================================*/ +int InfoNES_HSync() +{ +/* + * A function in H-Sync + * + * Return values + * 0 : Normally + * -1 : Exit an emulation + */ + + /*-------------------------------------------------------------------*/ + /* Render a scanline */ + /*-------------------------------------------------------------------*/ + if ( FrameCnt == 0 && + PPU_ScanTable[ PPU_Scanline ] == SCAN_ON_SCREEN ) + { + InfoNES_DrawLine(); + } + + /*-------------------------------------------------------------------*/ + /* Set new scroll values */ + /*-------------------------------------------------------------------*/ + PPU_Scr_V = PPU_Scr_V_Next; + PPU_Scr_V_Byte = PPU_Scr_V_Byte_Next; + PPU_Scr_V_Bit = PPU_Scr_V_Bit_Next; + + PPU_Scr_H = PPU_Scr_H_Next; + PPU_Scr_H_Byte = PPU_Scr_H_Byte_Next; + PPU_Scr_H_Bit = PPU_Scr_H_Bit_Next; + + /*-------------------------------------------------------------------*/ + /* Next Scanline */ + /*-------------------------------------------------------------------*/ + PPU_Scanline = ( PPU_Scanline == SCAN_VBLANK_END ) ? 0 : PPU_Scanline + 1; + + /*-------------------------------------------------------------------*/ + /* Operation in the specific scanning line */ + /*-------------------------------------------------------------------*/ + switch ( PPU_Scanline ) + { + case SCAN_TOP_OFF_SCREEN: + // Reset a PPU status + PPU_R2 = 0; + + // Set up a character data + if ( NesHeader.byVRomSize == 0 && FrameCnt == 0 ) + InfoNES_SetupChr(); + + // Get position of sprite #0 + InfoNES_GetSprHitY(); + break; + + case SCAN_UNKNOWN_START: + if ( FrameCnt == 0 ) + { + // Transfer the contents of work frame on the screen + InfoNES_LoadFrame(); + +#if 0 + // Switching of the double buffer + WorkFrameIdx = 1 - WorkFrameIdx; + WorkFrame = DoubleFrame[ WorkFrameIdx ]; +#endif + } + break; + + case SCAN_VBLANK_START: + // FrameCnt + 1 + FrameCnt = ( FrameCnt >= FrameSkip ) ? 0 : FrameCnt + 1; + + // Set a V-Blank flag + PPU_R2 = R2_IN_VBLANK; + + // Reset latch flag + PPU_Latch_Flag = 0; + + // pAPU Sound function in V-Sync + if ( !APU_Mute ) + InfoNES_pAPUVsync(); + + // A mapper function in V-Sync + MapperVSync(); + + // Get the condition of the joypad + InfoNES_PadState( &PAD1_Latch, &PAD2_Latch, &PAD_System ); + + // NMI on V-Blank + if ( PPU_R0 & R0_NMI_VB ) + NMI_REQ; + + // Exit an emulation if a QUIT button is pushed + if ( PAD_PUSH( PAD_System, PAD_SYS_QUIT ) ) + return -1; // Exit an emulation + + break; + } + + // Successful + return 0; +} + +/*===================================================================*/ +/* */ +/* InfoNES_DrawLine() : Render a scanline */ +/* */ +/*===================================================================*/ +void InfoNES_DrawLine() +{ +/* + * Render a scanline + * + */ + + int nX; + int nY; + int nY4; + int nYBit; + WORD *pPalTbl; + BYTE *pAttrBase; + WORD *pPoint; + int nNameTable; + BYTE *pbyNameTable; + BYTE *pbyChrData; + BYTE *pbyChrDataStart; + BYTE *pSPRRAM; + int nAttr; + int nSprCnt; + int nIdx; + int nSprData; + BYTE bySprCol; + BYTE pSprBuf[ NES_DISP_WIDTH + 7 ]; + + /*-------------------------------------------------------------------*/ + /* Render Background */ + /*-------------------------------------------------------------------*/ + + /* MMC5 VROM switch */ + MapperRenderScreen( 1 ); + + // Pointer to the render position + pPoint = &WorkFrame[ PPU_Scanline * NES_DISP_WIDTH ]; + + // Clear a scanline if screen is off + if ( !( PPU_R1 & R1_SHOW_SCR ) ) + { + InfoNES_MemorySet( pPoint, 0, NES_DISP_WIDTH << 1 ); + } + else + { + nNameTable = PPU_NameTableBank; + + nY = PPU_Scr_V_Byte + ( PPU_Scanline >> 3 ); + + nYBit = PPU_Scr_V_Bit + ( PPU_Scanline & 7 ); + + if ( nYBit > 7 ) + { + ++nY; + nYBit &= 7; + } + nYBit <<= 3; + + if ( nY > 29 ) + { + // Next NameTable (An up-down direction) + nNameTable ^= NAME_TABLE_V_MASK; + nY -= 30; + } + + nX = PPU_Scr_H_Byte; + + nY4 = ( ( nY & 2 ) << 1 ); + + /*-------------------------------------------------------------------*/ + /* Rendering of the block of the left end */ + /*-------------------------------------------------------------------*/ + + pbyNameTable = PPUBANK[ nNameTable ] + nY * 32 + nX; + pbyChrData = PPU_BG_Base + ( *pbyNameTable << 6 ) + nYBit; + pAttrBase = PPUBANK[ nNameTable ] + 0x3c0 + ( nY / 4 ) * 8; + pPalTbl = &PalTable[ ( ( ( pAttrBase[ nX >> 2 ] >> ( ( nX & 2 ) + nY4 ) ) & 3 ) << 2 ) ]; + + for ( nIdx = PPU_Scr_H_Bit; nIdx < 8; ++nIdx ) + { + *( pPoint++ ) = pPalTbl[ pbyChrData[ nIdx ] ]; + } + + // Callback at PPU read/write + MapperPPU( PATTBL( pbyChrData ) ); + + ++nX; + ++pbyNameTable; + + /*-------------------------------------------------------------------*/ + /* Rendering of the left table */ + /*-------------------------------------------------------------------*/ + + for ( ; nX < 32; ++nX ) + { + pbyChrData = PPU_BG_Base + ( *pbyNameTable << 6 ) + nYBit; + pPalTbl = &PalTable[ ( ( ( pAttrBase[ nX >> 2 ] >> ( ( nX & 2 ) + nY4 ) ) & 3 ) << 2 ) ]; + + pbyChrDataStart = pbyChrData; + *pPoint++ = pPalTbl[ *pbyChrDataStart++ ]; + *pPoint++ = pPalTbl[ *pbyChrDataStart++ ]; + *pPoint++ = pPalTbl[ *pbyChrDataStart++ ]; + *pPoint++ = pPalTbl[ *pbyChrDataStart++ ]; + *pPoint++ = pPalTbl[ *pbyChrDataStart++ ]; + *pPoint++ = pPalTbl[ *pbyChrDataStart++ ]; + *pPoint++ = pPalTbl[ *pbyChrDataStart++ ]; + *pPoint++ = pPalTbl[ *pbyChrDataStart++ ]; + + // Callback at PPU read/write + MapperPPU( PATTBL( pbyChrData ) ); + + ++pbyNameTable; + } + + // Holizontal Mirror + nNameTable ^= NAME_TABLE_H_MASK; + + pbyNameTable = PPUBANK[ nNameTable ] + nY * 32; + pAttrBase = PPUBANK[ nNameTable ] + 0x3c0 + ( nY / 4 ) * 8; + + /*-------------------------------------------------------------------*/ + /* Rendering of the right table */ + /*-------------------------------------------------------------------*/ + + for ( nX = 0; nX < PPU_Scr_H_Byte; ++nX ) + { + pbyChrData = PPU_BG_Base + ( *pbyNameTable << 6 ) + nYBit; + pPalTbl = &PalTable[ ( ( ( pAttrBase[ nX >> 2 ] >> ( ( nX & 2 ) + nY4 ) ) & 3 ) << 2 ) ]; + + pbyChrDataStart = pbyChrData; + *pPoint++ = pPalTbl[ *pbyChrDataStart++ ]; + *pPoint++ = pPalTbl[ *pbyChrDataStart++ ]; + *pPoint++ = pPalTbl[ *pbyChrDataStart++ ]; + *pPoint++ = pPalTbl[ *pbyChrDataStart++ ]; + *pPoint++ = pPalTbl[ *pbyChrDataStart++ ]; + *pPoint++ = pPalTbl[ *pbyChrDataStart++ ]; + *pPoint++ = pPalTbl[ *pbyChrDataStart++ ]; + *pPoint++ = pPalTbl[ *pbyChrDataStart++ ]; + + // Callback at PPU read/write + MapperPPU( PATTBL( pbyChrData ) ); + + ++pbyNameTable; + } + + /*-------------------------------------------------------------------*/ + /* Rendering of the block of the right end */ + /*-------------------------------------------------------------------*/ + + pbyChrData = PPU_BG_Base + ( *pbyNameTable << 6 ) + nYBit; + pPalTbl = &PalTable[ ( ( ( pAttrBase[ nX >> 2 ] >> ( ( nX & 2 ) + nY4 ) ) & 3 ) << 2 ) ]; + for ( nIdx = 0; nIdx < PPU_Scr_H_Bit; ++nIdx ) + { + pPoint[ nIdx ] = pPalTbl[ pbyChrData[ nIdx ] ]; + } + + // Callback at PPU read/write + MapperPPU( PATTBL( pbyChrData ) ); + + /*-------------------------------------------------------------------*/ + /* Backgroud Clipping */ + /*-------------------------------------------------------------------*/ + if ( !( PPU_R1 & R1_CLIP_BG ) ) + { + WORD *pPointTop; + + pPointTop = &WorkFrame[ PPU_Scanline * NES_DISP_WIDTH ]; + InfoNES_MemorySet( pPointTop, 0, 8 << 1 ); + } + + /*-------------------------------------------------------------------*/ + /* Clear a scanline if up and down clipping flag is set */ + /*-------------------------------------------------------------------*/ + if ( PPU_UpDown_Clip && + ( SCAN_ON_SCREEN_START > PPU_Scanline || PPU_Scanline > SCAN_BOTTOM_OFF_SCREEN_START ) ) + { + WORD *pPointTop; + + pPointTop = &WorkFrame[ PPU_Scanline * NES_DISP_WIDTH ]; + InfoNES_MemorySet( pPointTop, 0, NES_DISP_WIDTH << 1 ); + } + } + + /*-------------------------------------------------------------------*/ + /* Render a sprite */ + /*-------------------------------------------------------------------*/ + + /* MMC5 VROM switch */ + MapperRenderScreen( 0 ); + + if ( PPU_R1 & R1_SHOW_SP ) + { + // Reset Scanline Sprite Count + PPU_R2 &= ~R2_MAX_SP; + + // Reset sprite buffer + InfoNES_MemorySet( pSprBuf, 0, sizeof pSprBuf ); + + // Render a sprite to the sprite buffer + nSprCnt = 0; + for ( pSPRRAM = SPRRAM + ( 63 << 2 ); pSPRRAM >= SPRRAM; pSPRRAM -= 4 ) + { + nY = pSPRRAM[ SPR_Y ] + 1; + if ( nY > PPU_Scanline || nY + PPU_SP_Height <= PPU_Scanline ) + continue; // Next sprite + + /*-------------------------------------------------------------------*/ + /* A sprite in scanning line */ + /*-------------------------------------------------------------------*/ + + // Holizontal Sprite Count +1 + ++nSprCnt; + + nAttr = pSPRRAM[ SPR_ATTR ]; + nYBit = PPU_Scanline - nY; + nYBit = ( nAttr & SPR_ATTR_V_FLIP ) ? ( PPU_SP_Height - nYBit - 1 ) << 3 : nYBit << 3; + + if ( PPU_R0 & R0_SP_SIZE ) + { + // Sprite size 8x16 + if ( pSPRRAM[ SPR_CHR ] & 1 ) + { + pbyChrData = ChrBuf + 256 * 64 + ( ( pSPRRAM[ SPR_CHR ] & 0xfe ) << 6 ) + nYBit; + } + else + { + pbyChrData = ChrBuf + ( ( pSPRRAM[ SPR_CHR ] & 0xfe ) << 6 ) + nYBit; + } + } + else + { + // Sprite size 8x8 + pbyChrData = PPU_SP_Base + ( pSPRRAM[ SPR_CHR ] << 6 ) + nYBit; + } + + nAttr ^= SPR_ATTR_PRI; + bySprCol = ( nAttr & ( SPR_ATTR_COLOR | SPR_ATTR_PRI ) ) << 2; + nX = pSPRRAM[ SPR_X ]; + + if ( nAttr & SPR_ATTR_H_FLIP ) + { + // Horizontal flip + if ( pbyChrData[ 7 ] ) + pSprBuf[ nX ] = bySprCol | pbyChrData[ 7 ]; + if ( pbyChrData[ 6 ] ) + pSprBuf[ nX + 1 ] = bySprCol | pbyChrData[ 6 ]; + if ( pbyChrData[ 5 ] ) + pSprBuf[ nX + 2 ] = bySprCol | pbyChrData[ 5 ]; + if ( pbyChrData[ 4 ] ) + pSprBuf[ nX + 3 ] = bySprCol | pbyChrData[ 4 ]; + if ( pbyChrData[ 3 ] ) + pSprBuf[ nX + 4 ] = bySprCol | pbyChrData[ 3 ]; + if ( pbyChrData[ 2 ] ) + pSprBuf[ nX + 5 ] = bySprCol | pbyChrData[ 2 ]; + if ( pbyChrData[ 1 ] ) + pSprBuf[ nX + 6 ] = bySprCol | pbyChrData[ 1 ]; + if ( pbyChrData[ 0 ] ) + pSprBuf[ nX + 7 ] = bySprCol | pbyChrData[ 0 ]; + } + else + { + // Non flip + if ( pbyChrData[ 0 ] ) + pSprBuf[ nX ] = bySprCol | pbyChrData[ 0 ]; + if ( pbyChrData[ 1 ] ) + pSprBuf[ nX + 1 ] = bySprCol | pbyChrData[ 1 ]; + if ( pbyChrData[ 2 ] ) + pSprBuf[ nX + 2 ] = bySprCol | pbyChrData[ 2 ]; + if ( pbyChrData[ 3 ] ) + pSprBuf[ nX + 3 ] = bySprCol | pbyChrData[ 3 ]; + if ( pbyChrData[ 4 ] ) + pSprBuf[ nX + 4 ] = bySprCol | pbyChrData[ 4 ]; + if ( pbyChrData[ 5 ] ) + pSprBuf[ nX + 5 ] = bySprCol | pbyChrData[ 5 ]; + if ( pbyChrData[ 6 ] ) + pSprBuf[ nX + 6 ] = bySprCol | pbyChrData[ 6 ]; + if ( pbyChrData[ 7 ] ) + pSprBuf[ nX + 7 ] = bySprCol | pbyChrData[ 7 ]; + } + } + + // Rendering sprite + pPoint -= ( NES_DISP_WIDTH - PPU_Scr_H_Bit ); + for ( nX = 0; nX < NES_DISP_WIDTH; ++nX ) + { + nSprData = pSprBuf[ nX ]; + if ( nSprData && ( nSprData & 0x80 || pPoint[ nX ] & 0x8000 ) ) + { + pPoint[ nX ] = PalTable[ ( nSprData & 0xf ) + 0x10 ]; + } + } + + /*-------------------------------------------------------------------*/ + /* Sprite Clipping */ + /*-------------------------------------------------------------------*/ + if ( !( PPU_R1 & R1_CLIP_SP ) ) + { + WORD *pPointTop; + + pPointTop = &WorkFrame[ PPU_Scanline * NES_DISP_WIDTH ]; + InfoNES_MemorySet( pPointTop, 0, 8 << 1 ); + } + + if ( nSprCnt >= 8 ) + PPU_R2 |= R2_MAX_SP; // Set a flag of maximum sprites on scanline + } +} + +/*===================================================================*/ +/* */ +/* InfoNES_GetSprHitY() : Get a position of scanline hits sprite #0 */ +/* */ +/*===================================================================*/ +void InfoNES_GetSprHitY() +{ +/* + * Get a position of scanline hits sprite #0 + * + */ + + int nYBit; + DWORD *pdwChrData; + int nOff; + + int nLine; + + if ( SPRRAM[ SPR_ATTR ] & SPR_ATTR_V_FLIP ) + { + // Vertical flip + nYBit = ( PPU_SP_Height - 1 ) << 3; + nOff = -2; + } + else + { + // Non flip + nYBit = 0; + nOff = 2; + } + + if ( PPU_R0 & R0_SP_SIZE ) + { + // Sprite size 8x16 + if ( SPRRAM[ SPR_CHR ] & 1 ) + { + pdwChrData = (DWORD *)( ChrBuf + 256 * 64 + ( ( SPRRAM[ SPR_CHR ] & 0xfe ) << 6 ) + nYBit ); + } + else + { + pdwChrData = (DWORD * )( ChrBuf + ( ( SPRRAM[ SPR_CHR ] & 0xfe ) << 6 ) + nYBit ); + } + } + else + { + // Sprite size 8x8 + pdwChrData = (DWORD *)( PPU_SP_Base + ( SPRRAM[ SPR_CHR ] << 6 ) + nYBit ); + } + + if ( ( SPRRAM[ SPR_Y ] + 1 <= SCAN_UNKNOWN_START ) && ( SPRRAM[SPR_Y] > 0 ) ) + { + for ( nLine = 0; nLine < PPU_SP_Height; nLine++ ) + { + if ( pdwChrData[ 0 ] | pdwChrData[ 1 ] ) + { + // Scanline hits sprite #0 + SpriteJustHit = SPRRAM[SPR_Y] + 1 + nLine; + nLine = SCAN_VBLANK_END; + } + pdwChrData += nOff; + } + } else { + // Scanline didn't hit sprite #0 + SpriteJustHit = SCAN_UNKNOWN_START + 1; + } +} + +/*===================================================================*/ +/* */ +/* InfoNES_SetupChr() : Develop character data */ +/* */ +/*===================================================================*/ +void InfoNES_SetupChr() +{ +/* + * Develop character data + * + */ + + BYTE *pbyBGData; + BYTE byData1; + BYTE byData2; + int nIdx; + int nY; + int nOff; + static BYTE *pbyPrevBank[ 8 ]; + int nBank; + + for ( nBank = 0; nBank < 8; ++nBank ) + { + if ( pbyPrevBank[ nBank ] == PPUBANK[ nBank ] && !( ( ChrBufUpdate >> nBank ) & 1 ) ) + continue; // Next bank + + /*-------------------------------------------------------------------*/ + /* An address is different from the last time */ + /* or */ + /* An update flag is being set */ + /*-------------------------------------------------------------------*/ + + for ( nIdx = 0; nIdx < 64; ++nIdx ) + { + nOff = ( nBank << 12 ) + ( nIdx << 6 ); + + for ( nY = 0; nY < 8; ++nY ) + { + pbyBGData = PPUBANK[ nBank ] + ( nIdx << 4 ) + nY; + + byData1 = ( ( pbyBGData[ 0 ] >> 1 ) & 0x55 ) | ( pbyBGData[ 8 ] & 0xAA ); + byData2 = ( pbyBGData[ 0 ] & 0x55 ) | ( ( pbyBGData[ 8 ] << 1 ) & 0xAA ); + + ChrBuf[ nOff ] = ( byData1 >> 6 ) & 3; + ChrBuf[ nOff + 1 ] = ( byData2 >> 6 ) & 3; + ChrBuf[ nOff + 2 ] = ( byData1 >> 4 ) & 3; + ChrBuf[ nOff + 3 ] = ( byData2 >> 4 ) & 3; + ChrBuf[ nOff + 4 ] = ( byData1 >> 2 ) & 3; + ChrBuf[ nOff + 5 ] = ( byData2 >> 2 ) & 3; + ChrBuf[ nOff + 6 ] = byData1 & 3; + ChrBuf[ nOff + 7 ] = byData2 & 3; + + nOff += 8; + } + } + // Keep this address + pbyPrevBank[ nBank ] = PPUBANK[ nBank ]; + } + + // Reset update flag + ChrBufUpdate = 0; +} diff --git a/apps/plugins/infones/InfoNES.h b/apps/plugins/infones/InfoNES.h new file mode 100644 index 0000000..283c62d --- /dev/null +++ b/apps/plugins/infones/InfoNES.h @@ -0,0 +1,323 @@ +/*===================================================================*/ +/* */ +/* InfoNES.h : NES Emulator for Win32, Linux(x86), Linux(PS2) */ +/* */ +/* 2000/05/14 InfoNES Project ( based on pNesX ) */ +/* */ +/*===================================================================*/ + +#ifndef InfoNES_H_INCLUDED +#define InfoNES_H_INCLUDED + +/*-------------------------------------------------------------------*/ +/* Include files */ +/*-------------------------------------------------------------------*/ + +#include "InfoNES_Types.h" + +/*-------------------------------------------------------------------*/ +/* NES resources */ +/*-------------------------------------------------------------------*/ + +#define RAM_SIZE 0x2000 +#define SRAM_SIZE 0x2000 +#define PPURAM_SIZE 0x4000 +#define SPRRAM_SIZE 256 + +/* RAM */ +extern BYTE RAM[ RAM_SIZE ]; + +/* SRAM */ +extern BYTE SRAM[]; + +/* ROM */ +//extern BYTE ROM[0xffff]; +extern BYTE *ROM; +//extern int *ROM; + +/* SRAM BANK ( 8Kb ) */ +extern BYTE *SRAMBANK; + +/* ROM BANK ( 8Kb * 4 ) */ +extern BYTE *ROMBANK0; +extern BYTE *ROMBANK1; +extern BYTE *ROMBANK2; +extern BYTE *ROMBANK3; + +/*-------------------------------------------------------------------*/ +/* PPU resources */ +/*-------------------------------------------------------------------*/ + +/* PPU RAM */ +extern BYTE PPURAM[]; + +/* VROM */ +//extern BYTE VROM[0x8000]; +extern BYTE *VROM; + +/* PPU BANK ( 1Kb * 16 ) */ +extern BYTE *PPUBANK[]; + +#define NAME_TABLE0 8 +#define NAME_TABLE1 9 +#define NAME_TABLE2 10 +#define NAME_TABLE3 11 + +#define NAME_TABLE_V_MASK 2 +#define NAME_TABLE_H_MASK 1 + +/* Sprite RAM */ +extern BYTE SPRRAM[]; + +#define SPR_Y 0 +#define SPR_CHR 1 +#define SPR_ATTR 2 +#define SPR_X 3 +#define SPR_ATTR_COLOR 0x3 +#define SPR_ATTR_V_FLIP 0x80 +#define SPR_ATTR_H_FLIP 0x40 +#define SPR_ATTR_PRI 0x20 + +/* PPU Register */ +extern BYTE PPU_R0; +extern BYTE PPU_R1; +extern BYTE PPU_R2; +extern BYTE PPU_R3; +extern BYTE PPU_R7; + +extern BYTE PPU_Scr_V; +extern BYTE PPU_Scr_V_Next; +extern BYTE PPU_Scr_V_Byte; +extern BYTE PPU_Scr_V_Byte_Next; +extern BYTE PPU_Scr_V_Bit; +extern BYTE PPU_Scr_V_Bit_Next; + +extern BYTE PPU_Scr_H; +extern BYTE PPU_Scr_H_Next; +extern BYTE PPU_Scr_H_Byte; +extern BYTE PPU_Scr_H_Byte_Next; +extern BYTE PPU_Scr_H_Bit; +extern BYTE PPU_Scr_H_Bit_Next; + +extern BYTE PPU_Latch_Flag; +extern WORD PPU_Addr; +extern WORD PPU_Temp; +extern WORD PPU_Increment; + +extern BYTE PPU_Latch_Flag; +extern BYTE PPU_UpDown_Clip; + +#define R0_NMI_VB 0x80 +#define R0_NMI_SP 0x40 +#define R0_SP_SIZE 0x20 +#define R0_BG_ADDR 0x10 +#define R0_SP_ADDR 0x08 +#define R0_INC_ADDR 0x04 +#define R0_NAME_ADDR 0x03 + +#define R1_BACKCOLOR 0xe0 +#define R1_SHOW_SP 0x10 +#define R1_SHOW_SCR 0x08 +#define R1_CLIP_SP 0x04 +#define R1_CLIP_BG 0x02 +#define R1_MONOCHROME 0x01 + +#define R2_IN_VBLANK 0x80 +#define R2_HIT_SP 0x40 +#define R2_MAX_SP 0x20 +#define R2_WRITE_FLAG 0x10 + +#define SCAN_TOP_OFF_SCREEN 0 +#define SCAN_ON_SCREEN 1 +#define SCAN_BOTTOM_OFF_SCREEN 2 +#define SCAN_UNKNOWN 3 +#define SCAN_VBLANK 4 + +#define SCAN_TOP_OFF_SCREEN_START 0 +#define SCAN_ON_SCREEN_START 8 +#define SCAN_BOTTOM_OFF_SCREEN_START 232 +#define SCAN_UNKNOWN_START 240 +#define SCAN_VBLANK_START 243 +#define SCAN_VBLANK_END 262 + +#define STEP_PER_SCANLINE 113 +#define STEP_PER_FRAME 29828 + +/* Develop Scroll Registers */ +#define InfoNES_SetupScr() \ +{ \ + /* V-Scroll Register */ \ + /* PPU_Scr_V_Byte_Next = ( BYTE )( ( PPU_Addr & 0x03e0 ) >> 5 ); */ \ + /* PPU_Scr_V_Bit_Next = ( BYTE )( ( PPU_Addr & 0x7000 ) >> 12 ); */ \ + /* H-Scroll Register */ \ + /* PPU_Scr_H_Byte_Next = ( BYTE )( PPU_Addr & 0x001f ); */ \ + /* NameTableBank */ \ + PPU_NameTableBank = NAME_TABLE0 + ( ( PPU_Addr & 0x0C00 ) >> 10 ); \ +} + +/* Current Scanline */ +extern WORD PPU_Scanline; + +/* Scanline Table */ +extern BYTE PPU_ScanTable[]; + +/* Name Table Bank */ +extern BYTE PPU_NameTableBank; + +/* BG Base Address */ +extern BYTE *PPU_BG_Base; + +/* Sprite Base Address */ +extern BYTE *PPU_SP_Base; + +/* Sprite Height */ +extern WORD PPU_SP_Height; + +/* NES display size */ +#define NES_DISP_WIDTH 256 +#define NES_DISP_HEIGHT 240 + +/* VRAM Write Enable ( 0: Disable, 1: Enable ) */ +extern BYTE byVramWriteEnable; + +/* Frame IRQ ( 0: Disabled, 1: Enabled )*/ +extern BYTE FrameIRQ_Enable; +extern WORD FrameStep; + +/*-------------------------------------------------------------------*/ +/* Display and Others resouces */ +/*-------------------------------------------------------------------*/ + +/* Frame Skip */ +extern WORD FrameSkip; +extern WORD FrameCnt; +extern WORD FrameWait; + +#if 0 +extern WORD DoubleFrame[ 2 ][ NES_DISP_WIDTH * NES_DISP_HEIGHT ]; +extern WORD *WorkFrame; +extern WORD WorkFrameIdx; +#else +extern WORD WorkFrame[ NES_DISP_WIDTH * NES_DISP_HEIGHT ]; +#endif + +extern BYTE ChrBuf[]; + +extern BYTE ChrBufUpdate; + +extern WORD PalTable[]; + +/*-------------------------------------------------------------------*/ +/* APU and Pad resources */ +/*-------------------------------------------------------------------*/ + +extern BYTE APU_Reg[]; +extern int APU_Mute; + +extern DWORD PAD1_Latch; +extern DWORD PAD2_Latch; +extern DWORD PAD_System; +extern DWORD PAD1_Bit; +extern DWORD PAD2_Bit; + +#define PAD_SYS_QUIT 1 +#define PAD_SYS_OK 2 +#define PAD_SYS_CANCEL 4 +#define PAD_SYS_UP 8 +#define PAD_SYS_DOWN 0x10 +#define PAD_SYS_LEFT 0x20 +#define PAD_SYS_RIGHT 0x40 + +#define PAD_PUSH(a,b) ( ( (a) & (b) ) != 0 ) + +/*-------------------------------------------------------------------*/ +/* Mapper Function */ +/*-------------------------------------------------------------------*/ + +/* Initialize Mapper */ +extern void (*MapperInit)(void); +/* Write to Mapper */ +extern void (*MapperWrite)( WORD wAddr, BYTE byData ); +/* Write to SRAM */ +extern void (*MapperSram)( WORD wAddr, BYTE byData ); +/* Write to APU */ +extern void (*MapperApu)( WORD wAddr, BYTE byData ); +/* Read from Apu */ +extern BYTE (*MapperReadApu)( WORD wAddr ); +/* Callback at VSync */ +extern void (*MapperVSync)(void); +/* Callback at HSync */ +extern void (*MapperHSync)(void); +/* Callback at PPU read/write */ +extern void (*MapperPPU)( WORD wAddr ); +/* Callback at Rendering Screen 1:BG, 0:Sprite */ +extern void (*MapperRenderScreen)( BYTE byMode ); + +/*-------------------------------------------------------------------*/ +/* ROM information */ +/*-------------------------------------------------------------------*/ + +/* .nes File Header */ +struct NesHeader_tag +{ + BYTE byID[ 4 ]; + BYTE byRomSize; + BYTE byVRomSize; + BYTE byInfo1; + BYTE byInfo2; + BYTE byReserve[ 8 ]; +}; + +/* .nes File Header */ +extern struct NesHeader_tag NesHeader; + +/* Mapper No. */ +extern BYTE MapperNo; + +/* Other */ +extern BYTE ROM_Mirroring; +extern BYTE ROM_SRAM; +extern BYTE ROM_Trainer; +extern BYTE ROM_FourScr; + +/*-------------------------------------------------------------------*/ +/* Function prototypes */ +/*-------------------------------------------------------------------*/ + +/* Initialize InfoNES */ +void InfoNES_Init(void); + +/* Completion treatment */ +void InfoNES_Fin(void); + +/* Load a cassette */ +int InfoNES_Load( const char *pszFileName ); + +/* Reset InfoNES */ +int InfoNES_Reset(void); + +/* Initialize PPU */ +void InfoNES_SetupPPU(void); + +/* Set up a Mirroring of Name Table */ +void InfoNES_Mirroring( int nType ); + +/* The main loop of InfoNES */ +void InfoNES_Main(void); + +/* The loop of emulation */ +void InfoNES_Cycle(void); + +/* A function in H-Sync */ +int InfoNES_HSync(void); + +/* Render a scanline */ +void InfoNES_DrawLine(void); + +/* Get a position of scanline hits sprite #0 */ +void InfoNES_GetSprHitY(void); + +/* Develop character data */ +void InfoNES_SetupChr(void); + +#endif /* !InfoNES_H_INCLUDED */ diff --git a/apps/plugins/infones/InfoNES_Mapper.c b/apps/plugins/infones/InfoNES_Mapper.c new file mode 100644 index 0000000..476fb8c --- /dev/null +++ b/apps/plugins/infones/InfoNES_Mapper.c @@ -0,0 +1,323 @@ +/*************************************************************************** + * __________ __ ___. + * Open \______ \ ____ ____ | | _\_ |__ _______ ___ + * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / + * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < + * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ + * \/ \/ \/ \/ \/ + * + * Rockbox port of InfoNES + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY + * KIND, either express or implied. + * + ****************************************************************************/ + +#include "InfoNES.h" +#include "InfoNES_System.h" +#include "InfoNES_Mapper.h" +#include "K6502.h" + +/*-------------------------------------------------------------------*/ +/* Mapper resources */ +/*-------------------------------------------------------------------*/ + +/* Disk System RAM */ +BYTE DRAM[ DRAM_SIZE ]; + +/*-------------------------------------------------------------------*/ +/* Table of Mapper initialize function */ +/*-------------------------------------------------------------------*/ + +struct MapperTable_tag MapperTable[] = +{ + { 0, Map0_Init }, + { 1, Map1_Init }, + { 2, Map2_Init }, + { 3, Map3_Init }, + { 4, Map4_Init }, + { 5, Map5_Init }, + { 6, Map6_Init }, + { 7, Map7_Init }, + { 8, Map8_Init }, + { 9, Map9_Init }, + { 10, Map10_Init }, + { 11, Map11_Init }, + { 13, Map13_Init }, + { 15, Map15_Init }, + { 16, Map16_Init }, + { 17, Map17_Init }, + { 18, Map18_Init }, + { 19, Map19_Init }, + { 21, Map21_Init }, + { 22, Map22_Init }, + { 23, Map23_Init }, + { 24, Map24_Init }, + { 25, Map25_Init }, + { 26, Map26_Init }, + { 32, Map32_Init }, + { 33, Map33_Init }, + { 34, Map34_Init }, + { 40, Map40_Init },/* + { 41, Map41_Init }, + { 42, Map42_Init }, + { 43, Map43_Init }, + { 44, Map44_Init }, + { 45, Map45_Init }, + { 46, Map46_Init }, + { 47, Map47_Init }, + { 48, Map48_Init }, + { 49, Map49_Init }, + { 50, Map50_Init }, + { 51, Map51_Init }, + { 57, Map57_Init }, + { 58, Map58_Init }, + { 60, Map60_Init }, + { 61, Map61_Init }, + { 62, Map62_Init }, + { 64, Map64_Init }, + { 65, Map65_Init }, + { 66, Map66_Init }, + { 67, Map67_Init }, + { 68, Map68_Init }, + { 69, Map69_Init }, + { 70, Map70_Init }, + { 71, Map71_Init }, + { 72, Map72_Init }, + { 73, Map73_Init }, + { 74, Map74_Init }, + { 75, Map75_Init }, + { 76, Map76_Init }, + { 77, Map77_Init }, + { 78, Map78_Init }, + { 79, Map79_Init }, + { 80, Map80_Init }, + { 82, Map82_Init }, + { 83, Map83_Init }, + { 85, Map85_Init }, + { 86, Map86_Init }, + { 87, Map87_Init }, + { 88, Map88_Init }, + { 89, Map89_Init }, + { 90, Map90_Init }, + { 91, Map91_Init }, + { 92, Map92_Init }, + { 93, Map93_Init }, + { 94, Map94_Init }, + { 95, Map95_Init }, + { 96, Map96_Init }, + { 97, Map97_Init }, + { 99, Map99_Init }, + { 100, Map100_Init }, + { 101, Map101_Init }, + { 105, Map105_Init }, + { 107, Map107_Init }, + { 108, Map108_Init }, + { 109, Map109_Init }, + { 110, Map110_Init }, + { 112, Map112_Init }, + { 113, Map113_Init }, + { 114, Map114_Init }, + { 115, Map115_Init }, + { 116, Map116_Init }, + { 117, Map117_Init }, + { 118, Map118_Init }, + { 119, Map119_Init }, + { 122, Map122_Init }, + { 133, Map133_Init }, + { 134, Map134_Init }, + { 135, Map135_Init }, + { 140, Map140_Init }, + { 151, Map151_Init }, + { 160, Map160_Init }, + { 180, Map180_Init }, + { 181, Map181_Init }, + { 182, Map182_Init }, + { 183, Map183_Init }, + { 185, Map185_Init }, + { 187, Map187_Init }, + { 188, Map188_Init }, + { 189, Map189_Init }, + { 191, Map191_Init }, + { 193, Map193_Init }, + { 194, Map194_Init }, + { 200, Map200_Init }, + { 201, Map201_Init }, + { 202, Map202_Init }, + { 222, Map222_Init }, + { 225, Map225_Init }, + { 226, Map226_Init }, + { 227, Map227_Init }, + { 228, Map228_Init }, + { 229, Map229_Init }, + { 230, Map230_Init }, + { 231, Map231_Init }, + { 232, Map232_Init }, + { 233, Map233_Init }, + { 234, Map234_Init }, + { 235, Map235_Init }, + { 236, Map236_Init }, + { 240, Map240_Init }, + { 241, Map241_Init }, + { 242, Map242_Init }, + { 243, Map243_Init }, + { 244, Map244_Init }, + { 245, Map245_Init }, + { 246, Map246_Init }, + { 248, Map248_Init }, + { 249, Map249_Init }, + { 251, Map251_Init }, + { 252, Map252_Init }, + { 255, Map255_Init },*/ + { -1, NULL } +}; + +/*-------------------------------------------------------------------*/ +/* body of Mapper functions */ +/*-------------------------------------------------------------------*/ + +#include "mapper/InfoNES_Mapper_000.c" +#include "mapper/InfoNES_Mapper_001.c" +#include "mapper/InfoNES_Mapper_002.c" +#include "mapper/InfoNES_Mapper_003.c" +#include "mapper/InfoNES_Mapper_004.c" +#include "mapper/InfoNES_Mapper_005.c" +#include "mapper/InfoNES_Mapper_006.c" +#include "mapper/InfoNES_Mapper_007.c" +#include "mapper/InfoNES_Mapper_008.c" +#include "mapper/InfoNES_Mapper_009.c" +#include "mapper/InfoNES_Mapper_010.c" +#include "mapper/InfoNES_Mapper_011.c" +#include "mapper/InfoNES_Mapper_013.c" +#include "mapper/InfoNES_Mapper_015.c" +#include "mapper/InfoNES_Mapper_016.c" +#include "mapper/InfoNES_Mapper_017.c" +#include "mapper/InfoNES_Mapper_018.c" +#include "mapper/InfoNES_Mapper_019.c" +#include "mapper/InfoNES_Mapper_021.c" +#include "mapper/InfoNES_Mapper_022.c" +#include "mapper/InfoNES_Mapper_023.c" +#include "mapper/InfoNES_Mapper_024.c" +#include "mapper/InfoNES_Mapper_025.c" +#include "mapper/InfoNES_Mapper_026.c" +#include "mapper/InfoNES_Mapper_032.c" +#include "mapper/InfoNES_Mapper_033.c" +#include "mapper/InfoNES_Mapper_034.c" +#include "mapper/InfoNES_Mapper_040.c"/* +#include "mapper/InfoNES_Mapper_041.c" +#include "mapper/InfoNES_Mapper_042.c" +#include "mapper/InfoNES_Mapper_043.c" +#include "mapper/InfoNES_Mapper_044.c" +#include "mapper/InfoNES_Mapper_045.c" +#include "mapper/InfoNES_Mapper_046.c" +#include "mapper/InfoNES_Mapper_047.c" +#include "mapper/InfoNES_Mapper_048.c" +#include "mapper/InfoNES_Mapper_049.c" +#include "mapper/InfoNES_Mapper_050.c" +#include "mapper/InfoNES_Mapper_051.c" +#include "mapper/InfoNES_Mapper_057.c" +#include "mapper/InfoNES_Mapper_058.c" +#include "mapper/InfoNES_Mapper_060.c" +#include "mapper/InfoNES_Mapper_061.c" +#include "mapper/InfoNES_Mapper_062.c" +#include "mapper/InfoNES_Mapper_064.c" +#include "mapper/InfoNES_Mapper_065.c" +#include "mapper/InfoNES_Mapper_066.c" +#include "mapper/InfoNES_Mapper_067.c" +#include "mapper/InfoNES_Mapper_068.c" +#include "mapper/InfoNES_Mapper_069.c" +#include "mapper/InfoNES_Mapper_070.c" +#include "mapper/InfoNES_Mapper_071.c" +#include "mapper/InfoNES_Mapper_072.c" +#include "mapper/InfoNES_Mapper_073.c" +#include "mapper/InfoNES_Mapper_074.c" +#include "mapper/InfoNES_Mapper_075.c" +#include "mapper/InfoNES_Mapper_076.c" +#include "mapper/InfoNES_Mapper_077.c" +#include "mapper/InfoNES_Mapper_078.c" +#include "mapper/InfoNES_Mapper_079.c" +#include "mapper/InfoNES_Mapper_080.c" +#include "mapper/InfoNES_Mapper_082.c" +#include "mapper/InfoNES_Mapper_083.c" +#include "mapper/InfoNES_Mapper_085.c" +#include "mapper/InfoNES_Mapper_086.c" +#include "mapper/InfoNES_Mapper_087.c" +#include "mapper/InfoNES_Mapper_088.c" +#include "mapper/InfoNES_Mapper_089.c" +#include "mapper/InfoNES_Mapper_090.c" +#include "mapper/InfoNES_Mapper_091.c" +#include "mapper/InfoNES_Mapper_092.c" +#include "mapper/InfoNES_Mapper_093.c" +#include "mapper/InfoNES_Mapper_094.c" +#include "mapper/InfoNES_Mapper_095.c" +#include "mapper/InfoNES_Mapper_096.c" +#include "mapper/InfoNES_Mapper_097.c" +#include "mapper/InfoNES_Mapper_099.c" +#include "mapper/InfoNES_Mapper_100.c" +#include "mapper/InfoNES_Mapper_101.c" +#include "mapper/InfoNES_Mapper_105.c" +#include "mapper/InfoNES_Mapper_107.c" +#include "mapper/InfoNES_Mapper_108.c" +#include "mapper/InfoNES_Mapper_109.c" +#include "mapper/InfoNES_Mapper_110.c" +#include "mapper/InfoNES_Mapper_112.c" +#include "mapper/InfoNES_Mapper_113.c" +#include "mapper/InfoNES_Mapper_114.c" +#include "mapper/InfoNES_Mapper_115.c" +#include "mapper/InfoNES_Mapper_116.c" +#include "mapper/InfoNES_Mapper_117.c" +#include "mapper/InfoNES_Mapper_118.c" +#include "mapper/InfoNES_Mapper_119.c" +#include "mapper/InfoNES_Mapper_122.c" +#include "mapper/InfoNES_Mapper_133.c" +#include "mapper/InfoNES_Mapper_134.c" +#include "mapper/InfoNES_Mapper_135.c" +#include "mapper/InfoNES_Mapper_140.c" +#include "mapper/InfoNES_Mapper_151.c" +#include "mapper/InfoNES_Mapper_160.c" +#include "mapper/InfoNES_Mapper_180.c" +#include "mapper/InfoNES_Mapper_181.c" +#include "mapper/InfoNES_Mapper_182.c" +#include "mapper/InfoNES_Mapper_183.c" +#include "mapper/InfoNES_Mapper_185.c" +#include "mapper/InfoNES_Mapper_187.c" +#include "mapper/InfoNES_Mapper_188.c" +#include "mapper/InfoNES_Mapper_189.c" +#include "mapper/InfoNES_Mapper_191.c" +#include "mapper/InfoNES_Mapper_193.c" +#include "mapper/InfoNES_Mapper_194.c" +#include "mapper/InfoNES_Mapper_200.c" +#include "mapper/InfoNES_Mapper_201.c" +#include "mapper/InfoNES_Mapper_202.c" +#include "mapper/InfoNES_Mapper_222.c" +#include "mapper/InfoNES_Mapper_225.c" +#include "mapper/InfoNES_Mapper_226.c" +#include "mapper/InfoNES_Mapper_227.c" +#include "mapper/InfoNES_Mapper_228.c" +#include "mapper/InfoNES_Mapper_229.c" +#include "mapper/InfoNES_Mapper_230.c" +#include "mapper/InfoNES_Mapper_231.c" +#include "mapper/InfoNES_Mapper_232.c" +#include "mapper/InfoNES_Mapper_233.c" +#include "mapper/InfoNES_Mapper_234.c" +#include "mapper/InfoNES_Mapper_235.c" +#include "mapper/InfoNES_Mapper_236.c" +#include "mapper/InfoNES_Mapper_240.c" +#include "mapper/InfoNES_Mapper_241.c" +#include "mapper/InfoNES_Mapper_242.c" +#include "mapper/InfoNES_Mapper_243.c" +#include "mapper/InfoNES_Mapper_244.c" +#include "mapper/InfoNES_Mapper_245.c" +#include "mapper/InfoNES_Mapper_246.c" +#include "mapper/InfoNES_Mapper_248.c" +#include "mapper/InfoNES_Mapper_249.c" +#include "mapper/InfoNES_Mapper_251.c" +#include "mapper/InfoNES_Mapper_252.c" +#include "mapper/InfoNES_Mapper_255.c"*/ + +/* End of InfoNES_Mapper.c */ diff --git a/apps/plugins/infones/InfoNES_Mapper.h b/apps/plugins/infones/InfoNES_Mapper.h new file mode 100644 index 0000000..84bf6a9 --- /dev/null +++ b/apps/plugins/infones/InfoNES_Mapper.h @@ -0,0 +1,639 @@ +/*===================================================================*/ +/* */ +/* InfoNES_Mapper.h : InfoNES Mapper Function */ +/* */ +/* 2000/05/16 InfoNES Project ( based on NesterJ and pNesX ) */ +/* */ +/*===================================================================*/ + +#ifndef InfoNES_MAPPER_H_INCLUDED +#define InfoNES_MAPPER_H_INCLUDED + +/*-------------------------------------------------------------------*/ +/* Include files */ +/*-------------------------------------------------------------------*/ + +#include "InfoNES_Types.h" + +/*-------------------------------------------------------------------*/ +/* Constants */ +/*-------------------------------------------------------------------*/ + +#define DRAM_SIZE 0xA000 + +/*-------------------------------------------------------------------*/ +/* Mapper resources */ +/*-------------------------------------------------------------------*/ + +/* Disk System RAM */ +extern BYTE DRAM[]; + +/*-------------------------------------------------------------------*/ +/* Macros */ +/*-------------------------------------------------------------------*/ + +/* The address of 8Kbytes unit of the ROM */ +#define ROMPAGE(a) &ROM[ (a) * 0x2000 ] +/* From behind the ROM, the address of 8kbytes unit */ +#define ROMLASTPAGE(a) &ROM[ NesHeader.byRomSize * 0x4000 - ( (a) + 1 ) * 0x2000 ] +/* The address of 1Kbytes unit of the VROM */ +#define VROMPAGE(a) &VROM[ (a) * 0x400 ] +/* The address of 1Kbytes unit of the CRAM */ +#define CRAMPAGE(a) &PPURAM[ 0x0000 + ((a)&0x1F) * 0x400 ] +/* The address of 1Kbytes unit of the VRAM */ +#define VRAMPAGE(a) &PPURAM[ 0x2000 + (a) * 0x400 ] +/* Translate the pointer to ChrBuf into the address of Pattern Table */ +#define PATTBL(a) ( ( (a) - ChrBuf ) >> 2 ) + +/*-------------------------------------------------------------------*/ +/* Macros ( Mapper specific ) */ +/*-------------------------------------------------------------------*/ + +/* The address of 8Kbytes unit of the Map5 ROM */ +#define Map5_ROMPAGE(a) &Map5_Wram[ ( (a) & 0x07 ) * 0x2000 ] +/* The address of 1Kbytes unit of the Map6 Chr RAM */ +#define Map6_VROMPAGE(a) &Map6_Chr_Ram[ (a) * 0x400 ] +/* The address of 1Kbytes unit of the Map19 Chr RAM */ +#define Map19_VROMPAGE(a) &Map19_Chr_Ram[ (a) * 0x400 ] +/* The address of 1Kbytes unit of the Map85 Chr RAM */ +#define Map85_VROMPAGE(a) &Map85_Chr_Ram[ (a) * 0x400 ] + +/*-------------------------------------------------------------------*/ +/* Table of Mapper initialize function */ +/*-------------------------------------------------------------------*/ + +struct MapperTable_tag +{ + int nMapperNo; + void (*pMapperInit)(void); +}; + +extern struct MapperTable_tag MapperTable[]; + +/*-------------------------------------------------------------------*/ +/* Function prototypes */ +/*-------------------------------------------------------------------*/ + +void Map0_Init(void); +void Map0_Write( WORD wAddr, BYTE byData ); +void Map0_Sram( WORD wAddr, BYTE byData ); +void Map0_Apu( WORD wAddr, BYTE byData ); +BYTE Map0_ReadApu( WORD wAddr ); +void Map0_VSync(void); +void Map0_HSync(void); +void Map0_PPU( WORD wAddr ); +void Map0_RenderScreen( BYTE byMode ); + +void Map1_Init(void); +void Map1_Write( WORD wAddr, BYTE byData ); +void Map1_set_ROM_banks(void); + +void Map2_Init(void); +void Map2_Write( WORD wAddr, BYTE byData ); + +void Map3_Init(void); +void Map3_Write( WORD wAddr, BYTE byData ); + +void Map4_Init(void); +void Map4_Write( WORD wAddr, BYTE byData ); +void Map4_HSync(void); +void Map4_Set_CPU_Banks(void); +void Map4_Set_PPU_Banks(void); + +void Map5_Init(void); +void Map5_Write( WORD wAddr, BYTE byData ); +void Map5_Apu( WORD wAddr, BYTE byData ); +BYTE Map5_ReadApu( WORD wAddr ); +void Map5_HSync(void); +void Map5_RenderScreen( BYTE byMode ); +void Map5_Sync_Prg_Banks( void ); + +void Map6_Init(void); +void Map6_Write( WORD wAddr, BYTE byData ); +void Map6_Apu( WORD wAddr, BYTE byData ); +void Map6_HSync(void); + +void Map7_Init(void); +void Map7_Write( WORD wAddr, BYTE byData ); + +void Map8_Init(void); +void Map8_Write( WORD wAddr, BYTE byData ); + +void Map9_Init(void); +void Map9_Write( WORD wAddr, BYTE byData ); +void Map9_PPU( WORD wAddr ); + +void Map10_Init(void); +void Map10_Write( WORD wAddr, BYTE byData ); +void Map10_PPU( WORD wAddr ); + +void Map11_Init(void); +void Map11_Write( WORD wAddr, BYTE byData ); + +void Map13_Init(void); +void Map13_Write( WORD wAddr, BYTE byData ); + +void Map15_Init(void); +void Map15_Write( WORD wAddr, BYTE byData ); + +void Map16_Init(void); +void Map16_Write( WORD wAddr, BYTE byData ); +void Map16_HSync(void); + +void Map17_Init(void); +void Map17_Apu( WORD wAddr, BYTE byData ); +void Map17_HSync(void); + +void Map18_Init(void); +void Map18_Write( WORD wAddr, BYTE byData ); +void Map18_HSync(void); + +void Map19_Init(void); +void Map19_Write( WORD wAddr, BYTE byData ); +void Map19_Apu( WORD wAddr, BYTE byData ); +BYTE Map19_ReadApu( WORD wAddr ); +void Map19_HSync(void); + +void Map21_Init(void); +void Map21_Write( WORD wAddr, BYTE byData ); +void Map21_HSync(void); + +void Map22_Init(void); +void Map22_Write( WORD wAddr, BYTE byData ); + +void Map23_Init(void); +void Map23_Write( WORD wAddr, BYTE byData ); +void Map23_HSync(void); + +void Map24_Init(void); +void Map24_Write( WORD wAddr, BYTE byData ); +void Map24_HSync(void); + +void Map25_Init(void); +void Map25_Write( WORD wAddr, BYTE byData ); +void Map25_Sync_Vrom( int nBank ); +void Map25_HSync(void); + +void Map26_Init(void); +void Map26_Write( WORD wAddr, BYTE byData ); +void Map26_HSync(void); + +void Map32_Init(void); +void Map32_Write( WORD wAddr, BYTE byData ); + +void Map33_Init(void); +void Map33_Write( WORD wAddr, BYTE byData ); +void Map33_HSync(void); + +void Map34_Init(void); +void Map34_Write( WORD wAddr, BYTE byData ); +void Map34_Sram( WORD wAddr, BYTE byData ); + +void Map40_Init(void); +void Map40_Write( WORD wAddr, BYTE byData ); +void Map40_HSync(void); + +void Map41_Init(void); +void Map41_Write( WORD wAddr, BYTE byData ); +void Map41_Sram( WORD wAddr, BYTE byData ); + +void Map42_Init(void); +void Map42_Write( WORD wAddr, BYTE byData ); +void Map42_HSync(void); + +void Map43_Init(void); +void Map43_Write( WORD wAddr, BYTE byData ); +void Map43_Apu( WORD wAddr, BYTE byData ); +BYTE Map43_ReadApu( WORD wAddr ); +void Map43_HSync(void); + +void Map44_Init(void); +void Map44_Write( WORD wAddr, BYTE byData ); +void Map44_HSync(void); +void Map44_Set_CPU_Banks(void); +void Map44_Set_PPU_Banks(void); + +void Map45_Init(void); +void Map45_Sram( WORD wAddr, BYTE byData ); +void Map45_Write( WORD wAddr, BYTE byData ); +void Map45_HSync(void); +void Map45_Set_CPU_Bank4( BYTE byData ); +void Map45_Set_CPU_Bank5( BYTE byData ); +void Map45_Set_CPU_Bank6( BYTE byData ); +void Map45_Set_CPU_Bank7( BYTE byData ); +void Map45_Set_PPU_Banks(void); + +void Map46_Init(void); +void Map46_Sram( WORD wAddr, BYTE byData ); +void Map46_Write( WORD wAddr, BYTE byData ); +void Map46_Set_ROM_Banks(void); + +void Map47_Init(void); +void Map47_Sram( WORD wAddr, BYTE byData ); +void Map47_Write( WORD wAddr, BYTE byData ); +void Map47_HSync(void); +void Map47_Set_CPU_Banks(void); +void Map47_Set_PPU_Banks(void); + +void Map48_Init(void); +void Map48_Write( WORD wAddr, BYTE byData ); +void Map48_HSync(void); + +void Map49_Init(void); +void Map49_Sram( WORD wAddr, BYTE byData ); +void Map49_Write( WORD wAddr, BYTE byData ); +void Map49_HSync(void); +void Map49_Set_CPU_Banks(void); +void Map49_Set_PPU_Banks(void); + +void Map50_Init(void); +void Map50_Apu( WORD wAddr, BYTE byData ); +void Map50_HSync(void); + +void Map51_Init(void); +void Map51_Sram( WORD wAddr, BYTE byData ); +void Map51_Write( WORD wAddr, BYTE byData ); +void Map51_Set_CPU_Banks(void); + +void Map57_Init(void); +void Map57_Write( WORD wAddr, BYTE byData ); + +void Map58_Init(void); +void Map58_Write( WORD wAddr, BYTE byData ); + +void Map60_Init(void); +void Map60_Write( WORD wAddr, BYTE byData ); + +void Map61_Init(void); +void Map61_Write( WORD wAddr, BYTE byData ); + +void Map62_Init(void); +void Map62_Write( WORD wAddr, BYTE byData ); + +void Map64_Init(void); +void Map64_Write( WORD wAddr, BYTE byData ); + +void Map65_Init(void); +void Map65_Write( WORD wAddr, BYTE byData ); +void Map65_HSync(void); + +void Map66_Init(void); +void Map66_Write( WORD wAddr, BYTE byData ); + +void Map67_Init(void); +void Map67_Write( WORD wAddr, BYTE byData ); +void Map67_HSync(void); + +void Map68_Init(void); +void Map68_Write( WORD wAddr, BYTE byData ); +void Map68_SyncMirror(void); + +void Map69_Init(void); +void Map69_Write( WORD wAddr, BYTE byData ); +void Map69_HSync(void); + +void Map70_Init(void); +void Map70_Write( WORD wAddr, BYTE byData ); + +void Map71_Init(void); +void Map71_Write( WORD wAddr, BYTE byData ); + +void Map72_Init(void); +void Map72_Write( WORD wAddr, BYTE byData ); + +void Map73_Init(void); +void Map73_Write( WORD wAddr, BYTE byData ); +void Map73_HSync(void); + +void Map74_Init(void); +void Map74_Write( WORD wAddr, BYTE byData ); +void Map74_HSync(void); +void Map74_Set_CPU_Banks(void); +void Map74_Set_PPU_Banks(void); + +void Map75_Init(void); +void Map75_Write( WORD wAddr, BYTE byData ); + +void Map76_Init(void); +void Map76_Write( WORD wAddr, BYTE byData ); + +void Map77_Init(void); +void Map77_Write( WORD wAddr, BYTE byData ); + +void Map78_Init(void); +void Map78_Write( WORD wAddr, BYTE byData ); + +void Map79_Init(void); +void Map79_Apu( WORD wAddr, BYTE byData ); + +void Map80_Init(void); +void Map80_Sram( WORD wAddr, BYTE byData ); + +void Map82_Init(void); +void Map82_Sram( WORD wAddr, BYTE byData ); + +void Map83_Init(void); +void Map83_Write( WORD wAddr, BYTE byData ); +void Map83_Apu( WORD wAddr, BYTE byData ); +BYTE Map83_ReadApu( WORD wAddr ); +void Map83_HSync(void); + +void Map85_Init(void); +void Map85_Write( WORD wAddr, BYTE byData ); +void Map85_HSync(void); + +void Map86_Init(void); +void Map86_Sram( WORD wAddr, BYTE byData ); + +void Map87_Init(void); +void Map87_Sram( WORD wAddr, BYTE byData ); + +void Map88_Init(void); +void Map88_Write( WORD wAddr, BYTE byData ); + +void Map89_Init(void); +void Map89_Write( WORD wAddr, BYTE byData ); + +void Map90_Init(void); +void Map90_Write( WORD wAddr, BYTE byData ); +void Map90_Apu( WORD wAddr, BYTE byData ); +BYTE Map90_ReadApu( WORD wAddr ); +void Map90_HSync(void); +void Map90_Sync_Mirror( void ); +void Map90_Sync_Prg_Banks( void ); +void Map90_Sync_Chr_Banks( void ); + +void Map91_Init(void); +void Map91_Sram( WORD wAddr, BYTE byData ); + +void Map92_Init(void); +void Map92_Write( WORD wAddr, BYTE byData ); + +void Map93_Init(void); +void Map93_Sram( WORD wAddr, BYTE byData ); + +void Map94_Init(void); +void Map94_Write( WORD wAddr, BYTE byData ); + +void Map95_Init(void); +void Map95_Write( WORD wAddr, BYTE byData ); +void Map95_Set_CPU_Banks(void); +void Map95_Set_PPU_Banks(void); + +void Map96_Init(void); +void Map96_Write( WORD wAddr, BYTE byData ); +void Map96_PPU( WORD wAddr ); +void Map96_Set_Banks(void); + +void Map97_Init(void); +void Map97_Write( WORD wAddr, BYTE byData ); + +void Map99_Init(void); +void Map99_Apu( WORD wAddr, BYTE byData ); +BYTE Map99_ReadApu( WORD wAddr ); + +void Map100_Init(void); +void Map100_Write( WORD wAddr, BYTE byData ); +void Map100_HSync(void); +void Map100_Set_CPU_Banks(void); +void Map100_Set_PPU_Banks(void); + +void Map101_Init(void); +void Map101_Write( WORD wAddr, BYTE byData ); + +void Map105_Init(void); +void Map105_Write( WORD wAddr, BYTE byData ); +void Map105_HSync(void); + +void Map107_Init(void); +void Map107_Write( WORD wAddr, BYTE byData ); + +void Map108_Init(void); +void Map108_Write( WORD wAddr, BYTE byData ); + +void Map109_Init(void); +void Map109_Apu( WORD wAddr, BYTE byData ); +void Map109_Set_PPU_Banks(void); + +void Map110_Init(void); +void Map110_Apu( WORD wAddr, BYTE byData ); + +void Map112_Init(void); +void Map112_Write( WORD wAddr, BYTE byData ); +void Map112_HSync(void); +void Map112_Set_CPU_Banks(void); +void Map112_Set_PPU_Banks(void); + +void Map113_Init(void); +void Map113_Apu( WORD wAddr, BYTE byData ); +void Map113_Write( WORD wAddr, BYTE byData ); + +void Map114_Init(void); +void Map114_Sram( WORD wAddr, BYTE byData ); +void Map114_Write( WORD wAddr, BYTE byData ); +void Map114_HSync(void); +void Map114_Set_CPU_Banks(void); +void Map114_Set_PPU_Banks(void); + +void Map115_Init(void); +void Map115_Sram( WORD wAddr, BYTE byData ); +void Map115_Write( WORD wAddr, BYTE byData ); +void Map115_HSync(void); +void Map115_Set_CPU_Banks(void); +void Map115_Set_PPU_Banks(void); + +void Map116_Init(void); +void Map116_Write( WORD wAddr, BYTE byData ); +void Map116_HSync(void); +void Map116_Set_CPU_Banks(void); +void Map116_Set_PPU_Banks(void); + +void Map117_Init(void); +void Map117_Write( WORD wAddr, BYTE byData ); +void Map117_HSync(void); + +void Map118_Init(void); +void Map118_Write( WORD wAddr, BYTE byData ); +void Map118_HSync(void); +void Map118_Set_CPU_Banks(void); +void Map118_Set_PPU_Banks(void); + +void Map119_Init(void); +void Map119_Write( WORD wAddr, BYTE byData ); +void Map119_HSync(void); +void Map119_Set_CPU_Banks(void); +void Map119_Set_PPU_Banks(void); + +void Map122_Init(void); +void Map122_Sram( WORD wAddr, BYTE byData ); + +void Map133_Init(void); +void Map133_Apu( WORD wAddr, BYTE byData ); + +void Map134_Init(void); +void Map134_Apu( WORD wAddr, BYTE byData ); + +void Map135_Init(void); +void Map135_Apu( WORD wAddr, BYTE byData ); +void Map135_Set_PPU_Banks(void); + +void Map140_Init(void); +void Map140_Sram( WORD wAddr, BYTE byData ); +void Map140_Apu( WORD wAddr, BYTE byData ); + +void Map151_Init(void); +void Map151_Write( WORD wAddr, BYTE byData ); + +void Map160_Init(void); +void Map160_Write( WORD wAddr, BYTE byData ); +void Map160_HSync(void); + +void Map180_Init(void); +void Map180_Write( WORD wAddr, BYTE byData ); + +void Map181_Init(void); +void Map181_Apu( WORD wAddr, BYTE byData ); + +void Map182_Init(void); +void Map182_Write( WORD wAddr, BYTE byData ); +void Map182_HSync(void); + +void Map183_Init(void); +void Map183_Write( WORD wAddr, BYTE byData ); +void Map183_HSync(void); + +void Map185_Init(void); +void Map185_Write( WORD wAddr, BYTE byData ); + +void Map187_Init(void); +void Map187_Write( WORD wAddr, BYTE byData ); +void Map187_Apu( WORD wAddr, BYTE byData ); +BYTE Map187_ReadApu( WORD wAddr ); +void Map187_HSync(void); +void Map187_Set_CPU_Banks(void); +void Map187_Set_PPU_Banks(void); + +void Map188_Init(void); +void Map188_Write( WORD wAddr, BYTE byData ); + +void Map189_Init(void); +void Map189_Apu( WORD wAddr, BYTE byData ); +void Map189_Write( WORD wAddr, BYTE byData ); +void Map189_HSync(void); + +void Map191_Init(void); +void Map191_Apu( WORD wAddr, BYTE byData ); +void Map191_Set_CPU_Banks(void); +void Map191_Set_PPU_Banks(void); + +void Map193_Init(void); +void Map193_Sram( WORD wAddr, BYTE byData ); + +void Map194_Init(void); +void Map194_Write( WORD wAddr, BYTE byData ); + +void Map200_Init(void); +void Map200_Write( WORD wAddr, BYTE byData ); + +void Map201_Init(void); +void Map201_Write( WORD wAddr, BYTE byData ); + +void Map202_Init(void); +void Map202_Apu( WORD wAddr, BYTE byData ); +void Map202_Write( WORD wAddr, BYTE byData ); +void Map202_WriteSub( WORD wAddr, BYTE byData ); + +void Map222_Init(void); +void Map222_Write( WORD wAddr, BYTE byData ); + +void Map225_Init(void); +void Map225_Write( WORD wAddr, BYTE byData ); + +void Map226_Init(void); +void Map226_Write( WORD wAddr, BYTE byData ); + +void Map227_Init(void); +void Map227_Write( WORD wAddr, BYTE byData ); + +void Map228_Init(void); +void Map228_Write( WORD wAddr, BYTE byData ); + +void Map229_Init(void); +void Map229_Write( WORD wAddr, BYTE byData ); + +void Map230_Init(void); +void Map230_Write( WORD wAddr, BYTE byData ); + +void Map231_Init(void); +void Map231_Write( WORD wAddr, BYTE byData ); + +void Map232_Init(void); +void Map232_Write( WORD wAddr, BYTE byData ); + +void Map233_Init(void); +void Map233_Write( WORD wAddr, BYTE byData ); + +void Map234_Init(void); +void Map234_Write( WORD wAddr, BYTE byData ); +void Map234_Set_Banks(void); + +void Map235_Init(void); +void Map235_Write( WORD wAddr, BYTE byData ); + +void Map236_Init(void); +void Map236_Write( WORD wAddr, BYTE byData ); + +void Map240_Init(void); +void Map240_Apu( WORD wAddr, BYTE byData ); + +void Map241_Init(void); +void Map241_Write( WORD wAddr, BYTE byData ); + +void Map242_Init(void); +void Map242_Write( WORD wAddr, BYTE byData ); + +void Map243_Init(void); +void Map243_Apu( WORD wAddr, BYTE byData ); + +void Map244_Init(void); +void Map244_Write( WORD wAddr, BYTE byData ); + +void Map245_Init(void); +void Map245_Write( WORD wAddr, BYTE byData ); +void Map245_HSync(void); +#if 0 +void Map245_Set_CPU_Banks(void); +void Map245_Set_PPU_Banks(void); +#endif + +void Map246_Init(void); +void Map246_Sram( WORD wAddr, BYTE byData ); + +void Map248_Init(void); +void Map248_Write( WORD wAddr, BYTE byData ); +void Map248_Apu( WORD wAddr, BYTE byData ); +void Map248_Sram( WORD wAddr, BYTE byData ); +void Map248_HSync(void); +void Map248_Set_CPU_Banks(void); +void Map248_Set_PPU_Banks(void); + +void Map249_Init(void); +void Map249_Write( WORD wAddr, BYTE byData ); +void Map249_Apu( WORD wAddr, BYTE byData ); +void Map249_HSync(void); + +void Map251_Init(void); +void Map251_Write( WORD wAddr, BYTE byData ); +void Map251_Sram( WORD wAddr, BYTE byData ); +void Map251_Set_Banks(void); + +void Map252_Init(void); +void Map252_Write( WORD wAddr, BYTE byData ); +void Map252_HSync(void); + +void Map255_Init(void); +void Map255_Write( WORD wAddr, BYTE byData ); +void Map255_Apu( WORD wAddr, BYTE byData ); +BYTE Map255_ReadApu( WORD wAddr ); + +#endif /* !InfoNES_MAPPER_H_INCLUDED */ diff --git a/apps/plugins/infones/InfoNES_System.h b/apps/plugins/infones/InfoNES_System.h new file mode 100644 index 0000000..d84ef20 --- /dev/null +++ b/apps/plugins/infones/InfoNES_System.h @@ -0,0 +1,75 @@ +/*===================================================================*/ +/* */ +/* InfoNES_System.h : The function which depends on a system */ +/* */ +/* 2000/05/29 InfoNES Project ( based on pNesX ) */ +/* */ +/*===================================================================*/ + +#ifndef InfoNES_SYSTEM_H_INCLUDED +#define InfoNES_SYSTEM_H_INCLUDED + +/*-------------------------------------------------------------------*/ +/* Include files */ +/*-------------------------------------------------------------------*/ + +#include "InfoNES_Types.h" + +struct value_table_tag +{ + BYTE byValue; + BYTE byFlag; +}; + +/*-------------------------------------------------------------------*/ +/* Palette data */ +/*-------------------------------------------------------------------*/ +extern WORD NesPalette[]; + +/*-------------------------------------------------------------------*/ +/* Function prototypes */ +/*-------------------------------------------------------------------*/ + +/* Menu screen */ +int InfoNES_Menu(void); + +/* Read ROM image file */ +int InfoNES_ReadRom( const char *pszFileName ); + +/* Release a memory for ROM */ +void InfoNES_ReleaseRom(void); + +/* Transfer the contents of work frame on the screen */ +void InfoNES_LoadFrame(void); + +/* Get a joypad state */ +void InfoNES_PadState( DWORD *pdwPad1, DWORD *pdwPad2, DWORD *pdwSystem ); + +/* memcpy */ +void *InfoNES_MemoryCopy( void *dest, const void *src, int count ); + +/* memset */ +void *InfoNES_MemorySet( void *dest, int c, int count ); + +/* Print debug message */ +void InfoNES_DebugPrint( char *pszMsg ); + +/* Wait */ +void InfoNES_Wait(void); + +/* Sound Initialize */ +void InfoNES_SoundInit( void ); + +/* Sound Open */ +int InfoNES_SoundOpen( int samples_per_sync, int sample_rate ); + +/* Sound Close */ +void InfoNES_SoundClose( void ); + +/* Sound Output 5 Waves - 2 Pulse, 1 Triangle, 1 Noise, 1 DPCM */ +void InfoNES_SoundOutput(int samples, BYTE *wave1, BYTE *wave2, BYTE *wave3, BYTE *wave4, BYTE *wave5); + +/* Print system message */ +void InfoNES_MessageBox( char *pszMsg, ... ); + +#endif /* !InfoNES_SYSTEM_H_INCLUDED */ diff --git a/apps/plugins/infones/InfoNES_System_Rockbox.c b/apps/plugins/infones/InfoNES_System_Rockbox.c new file mode 100644 index 0000000..67493cf --- /dev/null +++ b/apps/plugins/infones/InfoNES_System_Rockbox.c @@ -0,0 +1,975 @@ +/*************************************************************************** + * __________ __ ___. + * Open \______ \ ____ ____ | | _\_ |__ _______ ___ + * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / + * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < + * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ + * \/ \/ \/ \/ \/ + * + * Rockbox port of InfoNES + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY + * KIND, either express or implied. + * + ****************************************************************************/ + +#include "plugin.h" +#include "lib/pluginlib_exit.h" +/*PLUGIN_HEADER*/ + +#include "InfoNES.h" +#include "InfoNES_System.h" +#include "InfoNES_pAPU.h" +#include "keymaps.h" + +int start_application(char *filename); +void poll_event(void); +int LoadSRAM(void); +int SaveSRAM(void); +void get_more(unsigned char **start, size_t *size); +void save(void); +void load(void); +void menu(void); +void sound_onoff(void); +void video_menu(void); +void set_display_mode(void); +void set_frameskip(void); + +char szRomName[ 256 ]; +char szSaveName[ 256 ]; +int nSRAM_SaveFlag; + +extern struct ApuEvent_t *ApuEventQueue; +bool quit = false; +bool sound_on; +BYTE final_wave[2048 * 2]; +int waveptr; +int wavflag; +int wavdone; + +WORD *wfx; + +DWORD dwPad1; +DWORD dwPad2; +DWORD dwSystem; + +WORD NesPalette[ 64 ] = +{ + LCD_RGBPACK(117, 117, 117) , LCD_RGBPACK(39, 27, 143) , LCD_RGBPACK(0, 0, 171) , LCD_RGBPACK(71, 0, 159) , LCD_RGBPACK(143, 0, 119) , LCD_RGBPACK(171, 0, 19) , LCD_RGBPACK(167, 0, 0) , LCD_RGBPACK(127, 11, 0) , LCD_RGBPACK(67, 47, 0) , LCD_RGBPACK(0, 71, 0) , LCD_RGBPACK(0, 81, 0) , LCD_RGBPACK(0, 63, 23) , LCD_RGBPACK(27, 63, 95) , LCD_RGBPACK(0, 0, 0) , LCD_RGBPACK(0, 0, 0) , LCD_RGBPACK(0, 0, 0) , LCD_RGBPACK(188, 188, 188) , LCD_RGBPACK(0, 115, 239) , LCD_RGBPACK(35, 59, 239) , LCD_RGBPACK(131, 0, 243) , LCD_RGBPACK(191, 0, 191) , LCD_RGBPACK(231, 0, 91) , LCD_RGBPACK(219, 43, 0) , LCD_RGBPACK(203, 79, 15) , LCD_RGBPACK(139, 115, 0) , LCD_RGBPACK(0, 151, 0) , LCD_RGBPACK(0, 171, 0) , LCD_RGBPACK(0, 147, 59) , LCD_RGBPACK(0, 131, 139) , LCD_RGBPACK(0, 0, 0) , LCD_RGBPACK(0, 0, 0) , LCD_RGBPACK(0, 0, 0) , LCD_RGBPACK(255, 255, 255) , LCD_RGBPACK(63, 191, 255) , LCD_RGBPACK(95, 151, 255) , LCD_RGBPACK(167, 139, 253) , LCD_RGBPACK(247, 123, 255) , LCD_RGBPACK(255, 119, 183) , LCD_RGBPACK(255, 119, 99) , LCD_RGBPACK(255, 155, 59) , LCD_RGBPACK(243, 191, 63) , LCD_RGBPACK(131, 211, 19) , LCD_RGBPACK(79, 223, 75) , LCD_RGBPACK(88, 248, 152) , LCD_RGBPACK(0, 235, 219) , LCD_RGBPACK(0, 0, 0) , LCD_RGBPACK(0, 0, 0) , LCD_RGBPACK(0, 0, 0) , LCD_RGBPACK(255, 255, 255) , LCD_RGBPACK(171, 231, 255) , LCD_RGBPACK(199, 215, 255) , LCD_RGBPACK(215, 203, 255) , LCD_RGBPACK(255, 199, 255) , LCD_RGBPACK(255, 199, 219) , LCD_RGBPACK(255, 191, 179) , LCD_RGBPACK(255, 219, 171) , LCD_RGBPACK(255, 231, 163) , LCD_RGBPACK(227, 255, 163) , LCD_RGBPACK(171, 243, 191) , LCD_RGBPACK(179, 255, 207) , LCD_RGBPACK(159, 255, 243) , LCD_RGBPACK(0, 0, 0) , LCD_RGBPACK(0, 0, 0) , LCD_RGBPACK(0, 0, 0) +}; + +BYTE NesPaletteRGB[64][3] = { + { 112, 112, 112, },{ 32, 24, 136, },{ 0, 0, 168, },{ 64, 0, 152,}, + { 136, 0, 112, },{168, 0, 16, },{160, 0, 0, },{120, 8, 0,}, + { 64, 40, 0, },{ 0, 64, 0, },{ 0, 80, 0, },{ 0, 56, 16,}, + { 24, 56, 88, },{ 0, 0, 0, },{ 0, 0, 0, },{ 0, 0, 0,}, + { 184, 184, 184, },{ 0, 112, 232, },{ 32, 56, 232, },{128, 0, 240,}, + { 184, 0, 184, },{224, 0, 88, },{216, 40, 0, },{200, 72, 8,}, + { 136, 112, 0, },{ 0, 144, 0, },{ 0, 168, 0, },{ 0, 144, 56,}, + { 0, 128, 136, },{ 0, 0, 0, },{ 0, 0, 0, },{ 0, 0, 0,}, + { 248, 248, 248, },{ 56, 184, 248, },{ 88, 144, 248, },{ 64, 136, 248,}, + { 240, 120, 248, },{248, 112, 176, },{248, 112, 96, },{248, 152, 56,}, + { 240, 184, 56, },{128, 208, 16, },{ 72, 216, 72, },{ 88, 248, 152,}, + { 0, 232, 216, },{ 0, 0, 0, },{ 0, 0, 0, },{ 0, 0, 0,}, + { 248, 248, 248, },{168, 224, 248, },{192, 208, 248, },{208, 200, 248,}, + { 248, 192, 248, },{248, 192, 216, },{248, 184, 176, },{248, 216, 168,}, + { 248, 224, 160, },{224, 248, 160, },{168, 240, 184, },{176, 248, 200,}, + { 152, 248, 240, },{ 0, 0, 0, },{ 0, 0, 0, },{ 0, 0, 0 } +}; + +/* main plugin entry point */ +enum plugin_status plugin_start(const void* parameter) +{ + size_t size = 0xffff; + sound_on = false; + +#ifdef HAVE_ADJUSTABLE_CPU_FREQ + rb->cpu_boost(true); +#endif + rb->backlight_on(); + rb->lcd_clear_display(); + + VROM = (BYTE*)rb->plugin_get_audio_buffer(&size); + ROM = (BYTE*) VROM + 0xffff * 8; + wfx = (WORD*)(ROM + 0xffff * 16); + ApuEventQueue = (struct ApuEvent_t*)(wfx + LCD_HEIGHT * NES_DISP_WIDTH); + + /* Start ROM file if specified */ + if (parameter) + { + if (start_application((char*) parameter)) + { + /* MainLoop */ + InfoNES_Main(); + + /* End */ + SaveSRAM(); + } + else + { + rb->splash(HZ, "Not a valid NES ROM!!"); + return PLUGIN_OK; + } + } + else + { + rb->splash(HZ*3/2, "Play NES ROM file!"); + return PLUGIN_OK; + } + return PLUGIN_OK; +} + +/* Start application */ +int start_application(char *filename) +{ + rb->strcpy( szRomName, filename ); + + if(InfoNES_Load(szRomName)==0) { + LoadSRAM(); + return 1; + } + return 0; +} + +/* Load SRAM */ +int LoadSRAM(void) +{ + int fp; + unsigned char pSrcBuf[ SRAM_SIZE ]; + unsigned char chData; + unsigned char chTag; + int nRunLen; + int nDecoded; + int nDecLen; + int nIdx; + + nSRAM_SaveFlag = 0; + + if ( !ROM_SRAM ) + return 0; + + nSRAM_SaveFlag = 1; + + rb->strcpy( szSaveName, szRomName ); + rb->strcpy( rb->strrchr( szSaveName, '.' ) + 1, "srm" ); + + fp = rb->open( szSaveName, O_RDWR | O_CREAT); + if ( !fp ) + return -1; + + rb->read(fp, pSrcBuf, SRAM_SIZE); + rb->close( fp ); + + nDecoded = 0; + nDecLen = 0; + + chTag = pSrcBuf[ nDecoded++ ]; + + while ( nDecLen < 8192 ) + { + chData = pSrcBuf[ nDecoded++ ]; + + if ( chData == chTag ) + { + chData = pSrcBuf[ nDecoded++ ]; + nRunLen = pSrcBuf[ nDecoded++ ]; + for ( nIdx = 0; nIdx < nRunLen + 1; ++nIdx ) + { + SRAM[ nDecLen++ ] = chData; + } + } + else + { + SRAM[ nDecLen++ ] = chData; + } + } + return 0; +} + +int SaveSRAM(void) +{ + int fp; + int nUsedTable[ 256 ]; + unsigned char chData; + unsigned char chPrevData; + unsigned char chTag; + int nIdx; + int nEncoded; + int nEncLen; + int nRunLen; + unsigned char pDstBuf[ SRAM_SIZE ]; + + if ( !nSRAM_SaveFlag ) + return 0; + + rb->memset( nUsedTable, 0, sizeof nUsedTable ); + + for ( nIdx = 0; nIdx < SRAM_SIZE; ++nIdx ) + { + ++nUsedTable[ SRAM[ nIdx++ ] ]; + } + for ( nIdx = 1, chTag = 0; nIdx < 256; ++nIdx ) + { + if ( nUsedTable[ nIdx ] < nUsedTable[ chTag ] ) + chTag = nIdx; + } + + nEncoded = 0; + nEncLen = 0; + nRunLen = 1; + + pDstBuf[ nEncLen++ ] = chTag; + + chPrevData = SRAM[ nEncoded++ ]; + + while ( nEncoded < SRAM_SIZE && nEncLen < SRAM_SIZE - 133 ) + { + chData = SRAM[ nEncoded++ ]; + + if ( chPrevData == chData && nRunLen < 256 ) + ++nRunLen; + else + { + if ( nRunLen >= 4 || chPrevData == chTag ) + { + pDstBuf[ nEncLen++ ] = chTag; + pDstBuf[ nEncLen++ ] = chPrevData; + pDstBuf[ nEncLen++ ] = nRunLen - 1; + } + else + { + for ( nIdx = 0; nIdx < nRunLen; ++nIdx ) + pDstBuf[ nEncLen++ ] = chPrevData; + } + + chPrevData = chData; + nRunLen = 1; + } + + } + if ( nRunLen >= 4 || chPrevData == chTag ) + { + pDstBuf[ nEncLen++ ] = chTag; + pDstBuf[ nEncLen++ ] = chPrevData; + pDstBuf[ nEncLen++ ] = nRunLen - 1; + } + else + { + for ( nIdx = 0; nIdx < nRunLen; ++nIdx ) + pDstBuf[ nEncLen++ ] = chPrevData; + } + + fp = rb->open( szSaveName, O_CREAT | O_TRUNC | O_WRONLY ); + if ( !fp ) + return -1; + + rb->write(fp, pDstBuf, nEncLen); + rb->close( fp ); + return 0; +} + +/* Menu Screen */ +int InfoNES_Menu(void){ + if(quit) return -1; + return 0; +} + +/* Read ROM image file */ +int InfoNES_ReadRom( const char *pszFileName ){ + int fp; + + fp=rb->open(pszFileName, O_RDONLY); + if(!fp) return -1; + + rb->read( fp, &NesHeader, sizeof NesHeader); + if( rb->memcmp( NesHeader.byID, "NES\x1a", 4 )!=0){ + rb->close( fp ); + return -1; + } + + rb->memset( SRAM, 0, SRAM_SIZE ); + + if(NesHeader.byInfo1 & 4){ + rb->read(fp, &SRAM[ 0x1000 ], 512); + } + + rb->read(fp, ROM, 0x4000 * NesHeader.byRomSize); + + if(NesHeader.byVRomSize>0){ + rb->read(fp, VROM, 0x2000 * NesHeader.byVRomSize); + } + + rb->close( fp ); + return 0; + +} + +/* Release memory for ROM */ +void InfoNES_ReleaseRom(void){ + return; +} + +/* Screen scale, shrink, and resolution change defines */ +int DisplaySize = 0; +#define scale 0 +#define center 1 +#define half 2 + +/* Transfer work frame contents to screen */ +void InfoNES_LoadFrame(void){ + int x, y; + + switch ( DisplaySize ) + { + case scale: /* Scaled to fit display */ + for(y = 0; y < LCD_HEIGHT; y++) { + for(x = 0; x < LCD_WIDTH; x++) { + rb->lcd_framebuffer[y * LCD_WIDTH + x] = WorkFrame[x * NES_DISP_WIDTH / LCD_WIDTH + y * NES_DISP_HEIGHT / LCD_HEIGHT * NES_DISP_WIDTH]; + }} + break; + + case center: /* Actual NES screen resolution */ + for(y = 0; y < NES_DISP_HEIGHT; y++) { + for(x = 0; x < NES_DISP_WIDTH; x++) { + rb->lcd_set_foreground(WorkFrame[x + y * NES_DISP_WIDTH]); + rb->lcd_drawpixel(x, y); + }} + break; + + case half: /* Half NES screen resolution */ + for(y = 0; y < NES_DISP_HEIGHT; y += 2) { + for(x = 0; x < NES_DISP_WIDTH; x += 2) { + rb->lcd_set_foreground(WorkFrame[x + y * NES_DISP_WIDTH]); + rb->lcd_drawpixel(x/2, y/2); + }} + break; + } + + rb->lcd_update(); +} + +#ifndef CPUFREQ_MAX +#define CPUFREQ_MAX 80000000l +#endif + +/* Get a joypad state */ +void InfoNES_PadState( DWORD *pdwPad1, DWORD *pdwPad2, DWORD *pdwSystem ) +{ + poll_event(); + *pdwPad1 = dwPad1; + *pdwPad2 = dwPad2; + *pdwSystem = dwSystem; +} + +static const int joy_commit_range = 3276; + +#ifdef INFONES_SCROLLWHEEL +/* Scrollwheel events are posted directly and not polled by the button + driver - synthesize polling */ +static inline unsigned int read_scroll_wheel(void) +{ + unsigned int buttons = BUTTON_NONE; + unsigned int btn; + + /* Empty out the button queue and see if any scrollwheel events were + posted */ + do + { + btn = rb->button_get_w_tmo(0); + buttons |= btn; + } + while (btn != BUTTON_NONE); + + return buttons & (SCROLL_CC | SCROLL_CW); +} +#endif + +void poll_event(void) +{ + int bs; + + bs = rb->button_status(); + exit_on_usb(bs); +#undef INFONES_SCROLLWHEEL +#ifdef INFONES_SCROLLWHEEL + bs |= read_scroll_wheel(); +#endif + + if(bs & NES_BUTTON_UP) + dwPad1 |= 1 << 4; + else + dwPad1 &= ~(1 << 4); + + if(bs & NES_BUTTON_DOWN) + dwPad1 |= 1 << 5; + else + dwPad1 &= ~(1 << 5); + + if(bs & NES_BUTTON_LEFT) + dwPad1 |= 1 << 6; + else + dwPad1 &= ~(1 << 6); + + if(bs & NES_BUTTON_RIGHT) + dwPad1 |= 1 << 7; + else + dwPad1 &= ~(1 << 7); + + if(bs & NES_BUTTON_A) + dwPad1 |= 1 << 0; + else + dwPad1 &= ~(1 << 0); + + if(bs & NES_BUTTON_B) + dwPad1 |= 1 << 1; + else + dwPad1 &= ~(1 << 1); + + if(bs & NES_BUTTON_SELECT) + dwPad1 |= 1 << 2; + else + dwPad1 &= ~(1 << 2); + + if(bs & NES_BUTTON_START) + dwPad1 |= 1 << 3; + else + dwPad1 &= ~(1 << 3); + + rb->yield(); + + if(bs & NES_BUTTON_MENU) + menu(); + + return; +} + +/* memcpy */ +void *InfoNES_MemoryCopy( void *dest, const void *src, int count ){ + rb->memcpy( dest, src, count ); + return dest; +} + +/* memset */ +void *InfoNES_MemorySet( void *dest, int c, int count ) +{ + rb->memset( dest, c, count); + return dest; +} + +/* Print debug message */ +void InfoNES_DebugPrint( char *pszMsg ) +{ + rb->splashf(HZ*3/2, "%s\n", pszMsg); +} + +/* Wait */ +void InfoNES_Wait(void) +{ +} + +/* Sound Initialize */ +void InfoNES_SoundInit( void ) +{ +} + +void waveout(void *udat,BYTE *stream,int len) +{ + (void)stream; + (void)udat; + + if(!wavdone) + { + rb->pcm_play_data(NULL, NULL, &final_wave[(wavflag -1) << 10], len); + wavflag = 0; wavdone= 1; + } +} + +void get_more(unsigned char **start, size_t *size) +{ + static unsigned char buf[4048]; + int i; + if ( wavflag ) + { + for(i = 0; i < 4048; i++) + buf[i] = (&final_wave[(wavflag - 1) << 10])[i/4]; + *start = buf; + *size = 4048; + wavdone = 1; + } + + return; +} + +/* Sound Open */ +int InfoNES_SoundOpen( int samples_per_sync, int sample_rate ) +{ + (void)samples_per_sync; + rb->pcm_set_frequency(11025); + sample_rate=11025; + + return 1; +} + +/* Sound Close */ +void InfoNES_SoundClose( void ) +{ +} + +void InfoNES_SoundOutput( int samples, BYTE *wave1, BYTE *wave2, BYTE *wave3, BYTE *wave4, BYTE *wave5 ) +{ + int i; + + { + for (i = 0; i < samples; i++) + { +#if 1 + final_wave[ waveptr ] = + ( wave1[i] + wave2[i] + wave3[i] + wave4[i] + wave5[i] ) / 5; +#else + final_wave[ waveptr ] = wave4[i]; +#endif + + waveptr++; + if ( waveptr == 2048 ) + { + waveptr = 0; + wavflag = 2; + } + else if ( waveptr == 1024 ) + { + wavflag = 1; + } + } + + if ( wavflag ) + { + if(sound_on) + { + rb->pcm_play_data(&get_more, NULL, NULL, 0); + rb->yield(); + } + wavflag = 0; + } + } +} + + +/* Print system message */ +void InfoNES_MessageBox(char *pszMsg, ...) +{ + (void)pszMsg; +} + +void menu(void) +{ + MENUITEM_STRINGLIST(menu, "Menu", NULL, "Load", "Save", "Video", "Sound", "Quit"); + + switch (rb->do_menu(&menu, NULL, NULL, false)) + { + case 0: + load(); + break; + case 1: + save(); + break; + case 2: + video_menu(); + break; + case 3: + sound_onoff(); + break; + case 4: + dwSystem|=PAD_SYS_QUIT; + quit=1; + break; + default: + break; + } + return; +} + +void sound_onoff(void) +{ + MENUITEM_STRINGLIST(smenu, "Sound", NULL, "On", "Off"); + + switch(rb->do_menu(&smenu, NULL, NULL, false)) + { + case 0: + sound_on = true; + return; + case 1: + sound_on = false; + return; + default: + return; + } +} + +void video_menu(void) +{ + MENUITEM_STRINGLIST(smenu, "Video", NULL, "Display Size", "Frameskip"); + + switch(rb->do_menu(&smenu, NULL, NULL, false)) + { + case 0: + set_display_mode(); + break; + case 1: + set_frameskip(); + break; + default: + break; + } +} + +void set_display_mode(void) +{ + MENUITEM_STRINGLIST(smenu, "Display Size", NULL, "Stretch", "Centered", "Half Size"); + + switch(rb->do_menu(&smenu, NULL, NULL, false)) + { + case 0: + DisplaySize = scale; + return; + case 1: + DisplaySize = center; + return; + case 2: + DisplaySize = half; + return; + default: + return; + } +} + +void set_frameskip(void) +{ + MENUITEM_STRINGLIST(smenu, "Frameskip", NULL, "0", "1", "2", "3", "4", "5"); + + switch(rb->do_menu(&smenu, NULL, NULL, false)) + { + case 0: + FrameSkip = 0; + return; + case 1: + FrameSkip = 1; + return; + case 2: + FrameSkip = 2; + return; + case 3: + FrameSkip = 3; + return; + case 4: + FrameSkip = 4; + return; + case 5: + FrameSkip = 5; + return; + default: + return; + } +} + + +#include "InfoNES.h" +#include "InfoNES_Mapper.h" +extern WORD PC; extern BYTE SP; extern BYTE F; extern BYTE A; extern BYTE X; extern BYTE Y; +extern BYTE RAM[ RAM_SIZE ]; extern BYTE SRAM[ SRAM_SIZE ]; extern BYTE PPURAM[ PPURAM_SIZE ]; extern BYTE SPRRAM[ SPRRAM_SIZE ]; +extern BYTE ChrBuf[ 256 * 2 * 8 * 8 ]; +extern BYTE *ROMBANK0; extern BYTE *ROMBANK1; extern BYTE *ROMBANK2; extern BYTE *ROMBANK3; +extern BYTE IRQ_State; + +extern BYTE IRQ_Wiring; +extern BYTE NMI_State; +extern BYTE NMI_Wiring; +extern WORD g_wPassedClocks; +extern BYTE g_byTestTable[ 256 ]; + +extern int SpriteJustHit; + +extern struct value_table_tag g_ASLTable[ 256 ]; +extern struct value_table_tag g_LSRTable[ 256 ]; +extern struct value_table_tag g_ROLTable[ 2 ][ 256 ]; +extern struct value_table_tag g_RORTable[ 2 ][ 256 ]; + +extern DWORD Map1_bank1; +extern DWORD Map1_bank2; +extern DWORD Map1_bank3; +extern DWORD Map1_bank4; +extern BYTE Map1_Regs[ 4 ]; +extern DWORD Map1_Cnt; +extern BYTE Map1_Latch; +extern WORD Map1_Last_Write_Addr; +extern DWORD Map1_HI1; +extern DWORD Map1_HI2; + +extern enum Map1_Size_t Map1_Size; + +extern DWORD Map1_256K_base; +extern DWORD Map1_swap; +extern BYTE *SRAMBANK; + +extern BYTE PPU_R0; +extern BYTE PPU_R1; +extern BYTE PPU_R2; +extern BYTE PPU_R3; +extern BYTE PPU_R7; + +extern BYTE Map4_Regs[ 8 ]; +extern DWORD Map4_Rom_Bank; +extern DWORD Map4_Prg0, Map4_Prg1; +extern DWORD Map4_Chr01, Map4_Chr23; +extern DWORD Map4_Chr4, Map4_Chr5, Map4_Chr6, Map4_Chr7; + +extern BYTE Map4_IRQ_Enable; +extern BYTE Map4_IRQ_Cnt; +extern BYTE Map4_IRQ_Latch; +extern BYTE Map4_IRQ_Request; +extern BYTE Map4_IRQ_Present; +extern BYTE Map4_IRQ_Present_Vbl; + +void save(void) +{ + int fd; + char fname[256]; + rb->strcpy(fname, szRomName); + rb->strcpy( rb->strrchr( fname, '.' ) + 1, "sav" ); + + fd = rb->open(fname, O_WRONLY | O_CREAT | O_TRUNC); + + rb->write(fd, &PC, 2); + rb->write(fd, &SP, 1); + rb->write(fd, &F, 1); + rb->write(fd, &A, 1); + rb->write(fd, &X, 1); + rb->write(fd, &Y, 1); + rb->write(fd, RAM, RAM_SIZE); + rb->write(fd, SRAM, SRAM_SIZE); + rb->write(fd, PPURAM, PPURAM_SIZE); + rb->write(fd, SPRRAM, SPRRAM_SIZE); + rb->write(fd, *PPUBANK, 16 * sizeof(*PPUBANK)); + rb->write(fd, ChrBuf, 256 * 2 * 8 * 8 ); + rb->write(fd, &ROMBANK0, 4); rb->write(fd, &ROMBANK1, 4); rb->write(fd, &ROMBANK2, 4); rb->write(fd, &ROMBANK3, 4); + rb->write(fd, &IRQ_Wiring, 1); + rb->write(fd, &NMI_Wiring, 1); + rb->write(fd, &g_wPassedClocks, 2); + rb->write(fd, g_byTestTable, 256); + rb->write(fd, g_ASLTable, 256 * 2); + rb->write(fd, g_LSRTable, 256 * 2); + rb->write(fd, g_ROLTable, 256 * 2 * 2); + rb->write(fd, g_RORTable, 256 * 2 * 2); + + rb->write(fd, &PPU_R1, 1); + rb->write(fd, &PPU_R2, 1); + rb->write(fd, &PPU_R3, 1); + rb->write(fd, &PPU_R7, 1); + + rb->write(fd, &PPU_Addr, 2); + rb->write(fd, &PPU_Temp, 2); + rb->write(fd, &PPU_Increment, 2); + + rb->write(fd, PalTable, 32 * 2); + + rb->write(fd, &PPU_Scr_V, 1); + rb->write(fd, &PPU_Scr_V_Next, 1); + rb->write(fd, &PPU_Scr_V_Byte, 1); + rb->write(fd, &PPU_Scr_V_Byte_Next, 1); + rb->write(fd, &PPU_Scr_V_Bit, 1); + rb->write(fd, &PPU_Scr_V_Bit_Next, 1); + rb->write(fd, &PPU_Scr_H, 1); + rb->write(fd, &PPU_Scr_H_Next, 1); + rb->write(fd, &PPU_Scr_H_Byte, 1); + rb->write(fd, &PPU_Scr_H_Byte_Next, 1); + rb->write(fd, &PPU_Scr_H_Bit, 1); + rb->write(fd, &PPU_Scr_H_Bit_Next, 1); + + rb->write(fd, PPU_ScanTable, 263); + rb->write(fd, &PPU_NameTableBank, 1); + rb->write(fd, &PPU_Latch_Flag, 1); + + rb->write(fd, &IRQ_State, 1); + rb->write(fd, &IRQ_Wiring, 1); + rb->write(fd, &NMI_State, 1); + rb->write(fd, &NMI_Wiring, 1); + + rb->write(fd, APU_Reg, 0x18); + rb->write(fd, &ChrBufUpdate, 1); + + rb->write(fd, &PPU_UpDown_Clip, 1); + rb->write(fd, &FrameIRQ_Enable, 1); + rb->write(fd, &FrameStep, 2); + + rb->write(fd, &byVramWriteEnable, 1); + rb->write(fd, &SpriteJustHit, 4); + + rb->write(fd, &FrameCnt, 2); + + if(MapperNo == 1) + { + rb->write(fd, &Map1_bank1, 4); + rb->write(fd, &Map1_bank2, 4); + rb->write(fd, &Map1_bank3, 4); + rb->write(fd, &Map1_bank4, 4); + rb->write(fd, Map1_Regs, 4); + + rb->write(fd, &Map1_Cnt, 4); + rb->write(fd, &Map1_Latch, 1); + rb->write(fd, &Map1_Last_Write_Addr, 2); + rb->write(fd, &Map1_HI1, 4); + rb->write(fd, &Map1_HI2, 4); + rb->write(fd, &Map1_256K_base, 4); + rb->write(fd, &Map1_swap, 4); + } + if(MapperNo == 4) + { + rb->write(fd, Map4_Regs, 8); + rb->write(fd, &Map4_Rom_Bank, 4); + rb->write(fd, &Map4_Prg0, 4); + rb->write(fd, &Map4_Prg1, 4); + rb->write(fd, &Map4_Chr01, 4); + rb->write(fd, &Map4_Chr23, 4); + rb->write(fd, &Map4_Chr4, 4); + rb->write(fd, &Map4_Chr5, 4); + rb->write(fd, &Map4_Chr6, 4); + rb->write(fd, &Map4_Chr7, 4); + + rb->write(fd, &Map4_IRQ_Enable, 1); + rb->write(fd, &Map4_IRQ_Cnt, 1); + rb->write(fd, &Map4_IRQ_Latch, 1); + rb->write(fd, &Map4_IRQ_Request, 1); + rb->write(fd, &Map4_IRQ_Present, 1); + rb->write(fd, &Map4_IRQ_Present_Vbl, 1); + } + + + rb->close(fd); + return; +} + +void load(void) +{ + int fd; + char fname[256]; + rb->strcpy(fname, szRomName); + rb->strcpy( rb->strrchr( fname, '.' ) + 1, "sav" ); + + fd = rb->open(fname, O_RDONLY); + if(!fd) + return; + + rb->read(fd, &PC, 2); + rb->read(fd, &SP, 1); + rb->read(fd, &F, 1); + rb->read(fd, &A, 1); + rb->read(fd, &X, 1); + rb->read(fd, &Y, 1); + rb->read(fd, RAM, RAM_SIZE); + rb->read(fd, SRAM, SRAM_SIZE); + rb->read(fd, PPURAM, PPURAM_SIZE); + rb->read(fd, SPRRAM, SPRRAM_SIZE); + rb->read(fd, *PPUBANK, 16 * sizeof(*PPUBANK)); + rb->read(fd, ChrBuf, 256 * 2 * 8 * 8 ); + rb->read(fd, &ROMBANK0, 4); rb->read(fd, &ROMBANK1, 4); rb->read(fd, &ROMBANK2, 4); rb->read(fd, &ROMBANK3, 4); + rb->read(fd, &IRQ_Wiring, 1); + rb->read(fd, &NMI_Wiring, 1); + rb->read(fd, &g_wPassedClocks, 2); + rb->read(fd, g_byTestTable, 256); + rb->read(fd, g_ASLTable, 256 * 2); + rb->read(fd, g_LSRTable, 256 * 2); + rb->read(fd, g_ROLTable, 256 * 2 * 2); + rb->read(fd, g_RORTable, 256 * 2 * 2); + + rb->read(fd, &PPU_R1, 1); + rb->read(fd, &PPU_R2, 1); + rb->read(fd, &PPU_R3, 1); + rb->read(fd, &PPU_R7, 1); + + rb->read(fd, &PPU_Addr, 2); + rb->read(fd, &PPU_Temp, 2); + rb->read(fd, &PPU_Increment, 2); + + rb->read(fd, PalTable, 32 * 2); + + rb->read(fd, &PPU_Scr_V, 1); + rb->read(fd, &PPU_Scr_V_Next, 1); + rb->read(fd, &PPU_Scr_V_Byte, 1); + rb->read(fd, &PPU_Scr_V_Byte_Next, 1); + rb->read(fd, &PPU_Scr_V_Bit, 1); + rb->read(fd, &PPU_Scr_V_Bit_Next, 1); + rb->read(fd, &PPU_Scr_H, 1); + rb->read(fd, &PPU_Scr_H_Next, 1); + rb->read(fd, &PPU_Scr_H_Byte, 1); + rb->read(fd, &PPU_Scr_H_Byte_Next, 1); + rb->read(fd, &PPU_Scr_H_Bit, 1); + rb->read(fd, &PPU_Scr_H_Bit_Next, 1); + + rb->read(fd, PPU_ScanTable, 263); + rb->read(fd, &PPU_NameTableBank, 1); + rb->read(fd, &PPU_Latch_Flag, 1); + + rb->read(fd, &IRQ_State, 1); + rb->read(fd, &IRQ_Wiring, 1); + rb->read(fd, &NMI_State, 1); + rb->read(fd, &NMI_Wiring, 1); + + rb->read(fd, APU_Reg, 0x18); + rb->read(fd, &ChrBufUpdate, 1); + + rb->read(fd, &PPU_UpDown_Clip, 1); + rb->read(fd, &FrameIRQ_Enable, 1); + rb->read(fd, &FrameStep, 2); + + rb->read(fd, &byVramWriteEnable, 1); + rb->read(fd, &SpriteJustHit, 4); + + rb->read(fd, &FrameCnt, 2); + + + if(MapperNo == 1) + { + rb->read(fd, &Map1_bank1, 4); + rb->read(fd, &Map1_bank2, 4); + rb->read(fd, &Map1_bank3, 4); + rb->read(fd, &Map1_bank4, 4); + rb->read(fd, Map1_Regs, 4); + + rb->read(fd, &Map1_Cnt, 4); + rb->read(fd, &Map1_Latch, 1); + rb->read(fd, &Map1_Last_Write_Addr, 2); + rb->read(fd, &Map1_HI1, 4); + rb->read(fd, &Map1_HI2, 4); + rb->read(fd, &Map1_256K_base, 4); + rb->read(fd, &Map1_swap, 4); + } + + if(MapperNo == 4) + { + rb->read(fd, Map4_Regs, 8); + rb->read(fd, &Map4_Rom_Bank, 4); + rb->read(fd, &Map4_Prg0, 4); + rb->read(fd, &Map4_Prg1, 4); + rb->read(fd, &Map4_Chr01, 4); + rb->read(fd, &Map4_Chr23, 4); + rb->read(fd, &Map4_Chr4, 4); + rb->read(fd, &Map4_Chr5, 4); + rb->read(fd, &Map4_Chr6, 4); + rb->read(fd, &Map4_Chr7, 4); + + rb->read(fd, &Map4_IRQ_Enable, 1); + rb->read(fd, &Map4_IRQ_Cnt, 1); + rb->read(fd, &Map4_IRQ_Latch, 1); + rb->read(fd, &Map4_IRQ_Request, 1); + rb->read(fd, &Map4_IRQ_Present, 1); + rb->read(fd, &Map4_IRQ_Present_Vbl, 1); + } + + + rb->close(fd); + return; +} diff --git a/apps/plugins/infones/InfoNES_Types.h b/apps/plugins/infones/InfoNES_Types.h new file mode 100644 index 0000000..5a5b32c --- /dev/null +++ b/apps/plugins/infones/InfoNES_Types.h @@ -0,0 +1,35 @@ +/*===================================================================*/ +/* */ +/* InfoNES_Types.h : Type definitions for InfoNES */ +/* */ +/* 2000/5/4 InfoNES Project ( based on pNesX ) */ +/* */ +/*===================================================================*/ + +#ifndef InfoNES_TYPES_H_INCLUDED +#define InfoNES_TYPES_H_INCLUDED + +/*-------------------------------------------------------------------*/ +/* Type definition */ +/*-------------------------------------------------------------------*/ +#ifndef DWORD +typedef unsigned long DWORD; +#endif /* !DWORD */ + +#ifndef WORD +typedef unsigned short WORD; +#endif /* !WORD */ + +#ifndef BYTE +typedef unsigned char BYTE; +#endif /* !BYTE */ + +/*-------------------------------------------------------------------*/ +/* NULL definition */ +/*-------------------------------------------------------------------*/ +#ifndef NULL +#define NULL 0 +#endif /* !NULL */ + +#endif /* !InfoNES_TYPES_H_INCLUDED */ + diff --git a/apps/plugins/infones/InfoNES_pAPU.c b/apps/plugins/infones/InfoNES_pAPU.c new file mode 100644 index 0000000..b022d8c --- /dev/null +++ b/apps/plugins/infones/InfoNES_pAPU.c @@ -0,0 +1,1087 @@ +/*************************************************************************** + * __________ __ ___. + * Open \______ \ ____ ____ | | _\_ |__ _______ ___ + * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / + * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < + * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ + * \/ \/ \/ \/ \/ + * + * Rockbox port of InfoNES + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY + * KIND, either express or implied. + * + ****************************************************************************/ + +#include "K6502.h" +#include "K6502_rw.h" +#include "InfoNES_System.h" +#include "InfoNES_pAPU.h" + +/*-------------------------------------------------------------------*/ +/* APU Event resources */ +/*-------------------------------------------------------------------*/ + +struct ApuEvent_t *ApuEventQueue; +int cur_event; +WORD entertime; + +/*-------------------------------------------------------------------*/ +/* APU Register Write Functions */ +/*-------------------------------------------------------------------*/ + +#define APU_WRITEFUNC(name, evtype) \ +void ApuWrite##name(WORD addr, BYTE value) \ +{ \ + ApuEventQueue[cur_event].time = entertime - g_wPassedClocks; \ + ApuEventQueue[cur_event].type = APUET_W_##evtype; \ + ApuEventQueue[cur_event].data = value; \ + cur_event++; \ +} + +APU_WRITEFUNC(C1a, C1A); +APU_WRITEFUNC(C1b, C1B); +APU_WRITEFUNC(C1c, C1C); +APU_WRITEFUNC(C1d, C1D); + +APU_WRITEFUNC(C2a, C2A); +APU_WRITEFUNC(C2b, C2B); +APU_WRITEFUNC(C2c, C2C); +APU_WRITEFUNC(C2d, C2D); + +APU_WRITEFUNC(C3a, C3A); +APU_WRITEFUNC(C3b, C3B); +APU_WRITEFUNC(C3c, C3C); +APU_WRITEFUNC(C3d, C3D); + +APU_WRITEFUNC(C4a, C4A); +APU_WRITEFUNC(C4b, C4B); +APU_WRITEFUNC(C4c, C4C); +APU_WRITEFUNC(C4d, C4D); + +APU_WRITEFUNC(C5a, C5A); +APU_WRITEFUNC(C5b, C5B); +APU_WRITEFUNC(C5c, C5C); +APU_WRITEFUNC(C5d, C5D); + +APU_WRITEFUNC(Control, CTRL); + +ApuWritefunc pAPUSoundRegs[20] = +{ + ApuWriteC1a, + ApuWriteC1b, + ApuWriteC1c, + ApuWriteC1d, + ApuWriteC2a, + ApuWriteC2b, + ApuWriteC2c, + ApuWriteC2d, + ApuWriteC3a, + ApuWriteC3b, + ApuWriteC3c, + ApuWriteC3d, + ApuWriteC4a, + ApuWriteC4b, + ApuWriteC4c, + ApuWriteC4d, + ApuWriteC5a, + ApuWriteC5b, + ApuWriteC5c, + ApuWriteC5d, +}; + +/*-------------------------------------------------------------------*/ +/* APU resources */ +/*-------------------------------------------------------------------*/ + +BYTE wave_buffers[5][735]; /* 44100 / 60 = 735 samples per sync */ + +BYTE ApuCtrl; +BYTE ApuCtrlNew; + +/*-------------------------------------------------------------------*/ +/* APU Quality resources */ +/*-------------------------------------------------------------------*/ + +int ApuQuality; + +DWORD ApuPulseMagic; +DWORD ApuTriangleMagic; +DWORD ApuNoiseMagic; +unsigned int ApuSamplesPerSync; +unsigned int ApuCyclesPerSample; +unsigned int ApuSampleRate; +DWORD ApuCycleRate; + +struct ApuQualityData_t +{ + DWORD pulse_magic; + DWORD triangle_magic; + DWORD noise_magic; + unsigned int samples_per_sync; + unsigned int cycles_per_sample; + unsigned int sample_rate; + DWORD cycle_rate; +} ApuQual[] = { + { 0xa2567000, 0xa2567000, 0xa2567000, 183, 164, 11025, 1062658 }, + { 0x512b3800, 0x512b3800, 0x512b3800, 367, 82, 22050, 531329 }, + { 0x289d9c00, 0x289d9c00, 0x289d9c00, 735, 41, 44100, 265664 }, +}; + +/*-------------------------------------------------------------------*/ +/* Rectangle Wave #1 resources */ +/*-------------------------------------------------------------------*/ +BYTE ApuC1a, ApuC1b, ApuC1c, ApuC1d; + +BYTE* ApuC1Wave; +DWORD ApuC1Skip; +DWORD ApuC1Index; +DWORD ApuC1EnvPhase; +BYTE ApuC1EnvVol; +BYTE ApuC1Atl; +DWORD ApuC1SweepPhase; +DWORD ApuC1Freq; + +/*-------------------------------------------------------------------*/ +/* Rectangle Wave #2 resources */ +/*-------------------------------------------------------------------*/ +BYTE ApuC2a, ApuC2b, ApuC2c, ApuC2d; + +BYTE* ApuC2Wave; +DWORD ApuC2Skip; +DWORD ApuC2Index; +DWORD ApuC2EnvPhase; +BYTE ApuC2EnvVol; +BYTE ApuC2Atl; +DWORD ApuC2SweepPhase; +DWORD ApuC2Freq; + +/*-------------------------------------------------------------------*/ +/* Triangle Wave resources */ +/*-------------------------------------------------------------------*/ +BYTE ApuC3a, ApuC3b, ApuC3c, ApuC3d; + +DWORD ApuC3Skip; +DWORD ApuC3Index; +BYTE ApuC3Atl; +DWORD ApuC3Llc; /* Linear Length Counter */ +BYTE ApuC3WriteLatency; +BYTE ApuC3CounterStarted; + +/*-------------------------------------------------------------------*/ +/* Noise resources */ +/*-------------------------------------------------------------------*/ +BYTE ApuC4a, ApuC4b, ApuC4c, ApuC4d; + +DWORD ApuC4Sr; /* Shift register */ +DWORD ApuC4Fdc; /* Frequency divide counter */ +DWORD ApuC4Skip; +DWORD ApuC4Index; +BYTE ApuC4Atl; +BYTE ApuC4EnvVol; +DWORD ApuC4EnvPhase; + +/*-------------------------------------------------------------------*/ +/* DPCM resources */ +/*-------------------------------------------------------------------*/ +BYTE ApuC5Reg[4]; +BYTE ApuC5Enable; +BYTE ApuC5Looping; +BYTE ApuC5CurByte; +BYTE ApuC5DpcmValue; + +int ApuC5Freq; +int ApuC5Phaseacc; + +WORD ApuC5Address, ApuC5CacheAddr; +int ApuC5DmaLength, ApuC5CacheDmaLength; + +/*-------------------------------------------------------------------*/ +/* Wave Data */ +/*-------------------------------------------------------------------*/ +BYTE pulse_25[0x20] = { + 0x11, 0x11, 0x11, 0x11, + 0x11, 0x11, 0x11, 0x11, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, +}; + +BYTE pulse_50[0x20] = { + 0x11, 0x11, 0x11, 0x11, + 0x11, 0x11, 0x11, 0x11, + 0x11, 0x11, 0x11, 0x11, + 0x11, 0x11, 0x11, 0x11, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, +}; + +BYTE pulse_75[0x20] = { + 0x11, 0x11, 0x11, 0x11, + 0x11, 0x11, 0x11, 0x11, + 0x11, 0x11, 0x11, 0x11, + 0x11, 0x11, 0x11, 0x11, + 0x11, 0x11, 0x11, 0x11, + 0x11, 0x11, 0x11, 0x11, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, +}; + +BYTE pulse_87[0x20] = { + 0x11, 0x11, 0x11, 0x11, + 0x11, 0x11, 0x11, 0x11, + 0x11, 0x11, 0x11, 0x11, + 0x11, 0x11, 0x11, 0x11, + 0x11, 0x11, 0x11, 0x11, + 0x11, 0x11, 0x11, 0x11, + 0x11, 0x11, 0x11, 0x11, + 0x00, 0x00, 0x00, 0x00, +}; + +BYTE triangle_50[0x20] = { + 0x00, 0x10, 0x20, 0x30, + 0x40, 0x50, 0x60, 0x70, + 0x80, 0x90, 0xa0, 0xb0, + 0xc0, 0xd0, 0xe0, 0xf0, + 0xff, 0xef, 0xdf, 0xcf, + 0xbf, 0xaf, 0x9f, 0x8f, + 0x7f, 0x6f, 0x5f, 0x4f, + 0x3f, 0x2f, 0x1f, 0x0f, +}; + +BYTE *pulse_waves[4] = { + pulse_87, pulse_75, pulse_50, pulse_25, +}; + +/*-------------------------------------------------------------------*/ +/* Active Time Left Data */ +/*-------------------------------------------------------------------*/ +BYTE ApuAtl[0x20] = +{ + 5, 127, 10, 1, 19, 2, 40, 3, 80, 4, 30, 5, 7, 6, 13, 7, + 6, 8, 12, 9, 24, 10, 48, 11, 96, 12, 36, 13, 8, 14, 16, 15, +}; + +/*-------------------------------------------------------------------*/ +/* Frequency Limit of Rectangle Channels */ +/*-------------------------------------------------------------------*/ +WORD ApuFreqLimit[8] = +{ + 0x3FF, 0x555, 0x666, 0x71C, 0x787, 0x7C1, 0x7E0, 0x7F0 +}; + +/*-------------------------------------------------------------------*/ +/* Noise Frequency Lookup Table */ +/*-------------------------------------------------------------------*/ +DWORD ApuNoiseFreq[ 16 ] = +{ + 4, 8, 16, 32, 64, 96, 128, 160, + 202, 254, 380, 508, 762, 1016, 2034, 4068 +}; + +/*-------------------------------------------------------------------*/ +/* DMC Transfer Clocks Table */ +/*-------------------------------------------------------------------*/ +DWORD ApuDpcmCycles[ 16 ] = +{ + 428, 380, 340, 320, 286, 254, 226, 214, + 190, 160, 142, 128, 106, 85, 72, 54 +}; + +/*===================================================================*/ +/* */ +/* ApuRenderingWave1() : Rendering Rectangular Wave #1 */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Write registers of rectangular wave #1 */ +/*-------------------------------------------------------------------*/ + +int ApuWriteWave1( int cycles, int event ) +{ + /* APU Reg Write Event */ + while ( ( event < cur_event ) && ( ApuEventQueue[event].time < cycles ) ) + { + if ( ( ApuEventQueue[event].type & APUET_MASK ) == APUET_C1 ) + { + switch ( ApuEventQueue[event].type & 0x03 ) + { + case 0: + ApuC1a = ApuEventQueue[event].data; + ApuC1Wave = pulse_waves[ ApuC1DutyCycle >> 6 ]; + break; + + case 1: + ApuC1b = ApuEventQueue[event].data; + break; + + case 2: + ApuC1c = ApuEventQueue[event].data; + ApuC1Freq = ( ( ( (WORD)ApuC1d & 0x07 ) << 8 ) + ApuC1c ); + ApuC1Atl = ApuAtl[ ( ApuC1d & 0xf8 ) >> 3 ]; + + if ( ApuC1Freq ) + { + ApuC1Skip = ( ApuPulseMagic << 1 ) / ApuC1Freq; + } else { + ApuC1Skip = 0; + } + break; + + case 3: + ApuC1d = ApuEventQueue[event].data; + ApuC1Freq = ( ( ( (WORD)ApuC1d & 0x07 ) << 8 ) + ApuC1c ); + ApuC1Atl = ApuAtl[ ( ApuC1d & 0xf8 ) >> 3 ]; + + if ( ApuC1Freq ) + { + ApuC1Skip = ( ApuPulseMagic << 1 ) / ApuC1Freq; + } else { + ApuC1Skip = 0; + } + break; + } + } + else if ( ApuEventQueue[event].type == APUET_W_CTRL ) + { + ApuCtrlNew = ApuEventQueue[event].data; + + if( !(ApuEventQueue[event].data&(1<<0)) ) { + ApuC1Atl = 0; + } + } + event++; + } + return event; +} + +/*-------------------------------------------------------------------*/ +/* Rendering rectangular wave #1 */ +/*-------------------------------------------------------------------*/ + +void ApuRenderingWave1( void ) +{ + int cycles = 0; + int event = 0; + + unsigned int i; + + /* note: 41 CPU cycles occur between increments of i */ + ApuCtrlNew = ApuCtrl; + for ( i = 0; i < ApuSamplesPerSync; i++ ) + { + /* Write registers */ + cycles += ApuCyclesPerSample; + event = ApuWriteWave1( cycles, event ); + + /* Envelope decay at a rate of ( Envelope Delay + 1 ) / 240 secs */ + ApuC1EnvPhase -= 4; + while ( ApuC1EnvPhase < 0 ) + { + ApuC1EnvPhase += ApuC1EnvDelay; + + if ( ApuC1Hold ) + { + ApuC1EnvVol = ( ApuC1EnvVol + 1 ) & 0x0f; + } + else if ( ApuC1EnvVol < 0x0f ) + { + ApuC1EnvVol++; + } + } + + /* + * TODO: using a table of max frequencies is not technically + * clean, but it is fast and (or should be) accurate + */ + if ( ApuC1Freq < 8 || ( !ApuC1SweepIncDec && ApuC1Freq > ApuC1FreqLimit ) ) + { + wave_buffers[0][i] = 0; + break; + } + + /* Frequency sweeping at a rate of ( Sweep Delay + 1) / 120 secs */ + if ( ApuC1SweepOn && ApuC1SweepShifts ) + { + ApuC1SweepPhase -= 2; /* 120/60 */ + while ( ApuC1SweepPhase < 0 ) + { + ApuC1SweepPhase += ApuC1SweepDelay; + + if ( ApuC1SweepIncDec ) /* ramp up */ + { + /* Rectangular #1 */ + ApuC1Freq += ~( ApuC1Freq >> ApuC1SweepShifts ); + } else { + /* ramp down */ + ApuC1Freq += ( ApuC1Freq >> ApuC1SweepShifts ); + } + } + if ( ApuC1Freq ) { + ApuC1Skip = ( ApuPulseMagic << 1 ) / ApuC1Freq; + } + } + + /* Wave Rendering */ + if ( ( ApuCtrlNew & 0x01 ) && ( ApuC1Atl || ApuC1Hold ) ) + { + ApuC1Index += ApuC1Skip; + ApuC1Index &= 0x1fffffff; + + if ( ApuC1Env ) + { + wave_buffers[0][i] = ApuC1Wave[ApuC1Index >> 24] * ( ApuC1Vol + ApuC1EnvVol ); + } else { + wave_buffers[0][i] = ApuC1Wave[ApuC1Index >> 24] * ApuC1Vol; + } + } else { + wave_buffers[0][i] = 0; + } + } + if ( ApuC1Atl ) { ApuC1Atl--; } +} + +/*===================================================================*/ +/* */ +/* ApuRenderingWave2() : Rendering Rectangular Wave #2 */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Write registers of rectangular wave #2 */ +/*-------------------------------------------------------------------*/ + +int ApuWriteWave2( int cycles, int event ) +{ + /* APU Reg Write Event */ + while ( ( event < cur_event ) && ( ApuEventQueue[event].time < cycles ) ) + { + if ( ( ApuEventQueue[event].type & APUET_MASK ) == APUET_C2 ) + { + switch ( ApuEventQueue[event].type & 0x03 ) + { + case 0: + ApuC2a = ApuEventQueue[event].data; + ApuC2Wave = pulse_waves[ ApuC2DutyCycle >> 6 ]; + break; + + case 1: + ApuC2b = ApuEventQueue[event].data; + break; + + case 2: + ApuC2c = ApuEventQueue[event].data; + ApuC2Freq = ( ( ( (WORD)ApuC2d & 0x07 ) << 8 ) + ApuC2c ); + ApuC2Atl = ApuAtl[ ( ApuC2d & 0xf8 ) >> 3 ]; + + if ( ApuC2Freq ) + { + ApuC2Skip = ( ApuPulseMagic << 1 ) / ApuC2Freq; + } else { + ApuC2Skip = 0; + } + break; + + case 3: + ApuC2d = ApuEventQueue[event].data; + ApuC2Freq = ( ( ( (WORD)ApuC2d & 0x07 ) << 8 ) + ApuC2c ); + ApuC2Atl = ApuAtl[ ( ApuC2d & 0xf8 ) >> 3 ]; + + if ( ApuC2Freq ) + { + ApuC2Skip = ( ApuPulseMagic << 1 ) / ApuC2Freq; + } else { + ApuC2Skip = 0; + } + break; + } + } + else if ( ApuEventQueue[event].type == APUET_W_CTRL ) + { + ApuCtrlNew = ApuEventQueue[event].data; + + if( !(ApuEventQueue[event].data&(1<<1)) ) { + ApuC2Atl = 0; + } + } + event++; + } + return event; +} + +/*-------------------------------------------------------------------*/ +/* Rendering rectangular wave #2 */ +/*-------------------------------------------------------------------*/ + +void ApuRenderingWave2( void ) +{ + int cycles = 0; + int event = 0; + + unsigned int i; + + /* note: 41 CPU cycles occur between increments of i */ + ApuCtrlNew = ApuCtrl; + for ( i = 0; i < ApuSamplesPerSync; i++ ) + { + /* Write registers */ + cycles += ApuCyclesPerSample; + event = ApuWriteWave2( cycles, event ); + + /* Envelope decay at a rate of ( Envelope Delay + 1 ) / 240 secs */ + ApuC2EnvPhase -= 4; + while ( ApuC2EnvPhase < 0 ) + { + ApuC2EnvPhase += ApuC2EnvDelay; + + if ( ApuC2Hold ) + { + ApuC2EnvVol = ( ApuC2EnvVol + 1 ) & 0x0f; + } + else if ( ApuC2EnvVol < 0x0f ) + { + ApuC2EnvVol++; + } + } + + /* + * TODO: using a table of max frequencies is not technically + * clean, but it is fast and (or should be) accurate + */ + if ( ApuC2Freq < 8 || ( !ApuC2SweepIncDec && ApuC2Freq > ApuC2FreqLimit ) ) + { + wave_buffers[1][i] = 0; + break; + } + + /* Frequency sweeping at a rate of ( Sweep Delay + 1) / 120 secs */ + if ( ApuC2SweepOn && ApuC2SweepShifts ) + { + ApuC2SweepPhase -= 2; /* 120/60 */ + while ( ApuC2SweepPhase < 0) + { + ApuC2SweepPhase += ApuC2SweepDelay; + + if ( ApuC2SweepIncDec ) /* ramp up */ + { + /* Rectangular #2 */ + ApuC2Freq -= ~( ApuC2Freq >> ApuC2SweepShifts ); + } else { + /* ramp down */ + ApuC2Freq += ( ApuC2Freq >> ApuC2SweepShifts ); + } + } + if ( ApuC2Freq ) { + ApuC2Skip = ( ApuPulseMagic << 1 ) / ApuC2Freq; + } + } + + /* Wave Rendering */ + if ( ( ApuCtrlNew & 0x02 ) && ( ApuC2Atl || ApuC2Hold ) ) + { + ApuC2Index += ApuC2Skip; + ApuC2Index &= 0x1fffffff; + + if ( ApuC2Env ) + { + wave_buffers[1][i] = ApuC2Wave[ApuC2Index >> 24] * ( ApuC2Vol + ApuC2EnvVol ); + } else { + wave_buffers[1][i] = ApuC2Wave[ApuC2Index >> 24] * ApuC2Vol; + } + } else { + wave_buffers[1][i] = 0; + } + } + if ( ApuC2Atl ) { ApuC2Atl--; } +} + +/*===================================================================*/ +/* */ +/* ApuRenderingWave3() : Rendering Triangle Wave */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Write registers of triangle wave #3 */ +/*-------------------------------------------------------------------*/ + +int ApuWriteWave3( int cycles, int event ) +{ + /* APU Reg Write Event */ + while (( event < cur_event ) && ( ApuEventQueue[event].time < cycles ) ) + { + if ( ( ApuEventQueue[event].type & APUET_MASK ) == APUET_C3 ) + { + switch ( ApuEventQueue[event].type & 3 ) + { + case 0: + ApuC3a = ApuEventQueue[event].data; + ApuC3Llc = ApuC3LinearLength; + break; + + case 1: + ApuC3b = ApuEventQueue[event].data; + break; + + case 2: + ApuC3c = ApuEventQueue[event].data; + if ( ApuC3Freq ) + { + ApuC3Skip = ApuTriangleMagic / ApuC3Freq; + } else { + ApuC3Skip = 0; + } + break; + + case 3: + ApuC3d = ApuEventQueue[event].data; + ApuC3Atl = ApuC3LengthCounter; + if ( ApuC3Freq ) + { + ApuC3Skip = ApuTriangleMagic / ApuC3Freq; + } else { + ApuC3Skip = 0; + } + } + } else if ( ApuEventQueue[event].type == APUET_W_CTRL ) { + ApuCtrlNew = ApuEventQueue[event].data; + + if( !(ApuEventQueue[event].data&(1<<2)) ) { + ApuC3Atl = 0; + ApuC3Llc = 0; + } + } + event++; + } + return event; +} + +/*-------------------------------------------------------------------*/ +/* Rendering triangle wave #3 */ +/*-------------------------------------------------------------------*/ + +void ApuRenderingWave3( void ) +{ + int cycles = 0; + int event = 0; + + unsigned int i; + + /* note: 41 CPU cycles occur between increments of i */ + ApuCtrlNew = ApuCtrl; + for ( i = 0; i < ApuSamplesPerSync; i++) + { + /* Write registers */ + cycles += ApuCyclesPerSample; + event = ApuWriteWave3( cycles, event ); + + /* Cutting Min Frequency */ + if ( ApuC3Freq < 8 ) + { + wave_buffers[2][i] = 0; + break; + } + + /* Counter Control */ + if ( ApuC3CounterStarted ) + { + if ( ApuC3Atl > 0 && !ApuC3Holdnote ) + { + ApuC3Atl--; + } + if ( ApuC3Llc > 0 ) + { + ApuC3Llc--; + } + } else if ( !ApuC3Holdnote && ApuC3WriteLatency > 0 ) { + if ( --ApuC3WriteLatency == 0 ) + { + ApuC3CounterStarted = 0x01; + } + } + + /* Wave Rendering */ + if ( ( ApuCtrlNew & 0x04 ) && ( ( ApuC3Atl > 0 || ApuC3Holdnote ) && ApuC3Llc > 0 ) ) + { + ApuC3Index += ApuC3Skip; + ApuC3Index &= 0x1fffffff; + wave_buffers[2][i] = triangle_50[ ApuC3Index >> 24 ]; + } else { + wave_buffers[2][i] = 0; + } + } +} + +/*===================================================================*/ +/* */ +/* ApuRenderingWave4() : Rendering Noise */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Write registers of noise channel #4 */ +/*-------------------------------------------------------------------*/ + +int ApuWriteWave4( int cycles, int event ) +{ + /* APU Reg Write Event */ + while ( (event < cur_event) && (ApuEventQueue[event].time < cycles) ) + { + if ( ( ApuEventQueue[event].type & APUET_MASK ) == APUET_C4 ) + { + switch (ApuEventQueue[event].type & 3) { + case 0: + ApuC4a = ApuEventQueue[event].data; + break; + + case 1: + ApuC4b = ApuEventQueue[event].data; + break; + + case 2: + ApuC4c = ApuEventQueue[event].data; + + if ( ApuC4Small ) { + ApuC4Sr = 0x001f; + } else { + ApuC4Sr = 0x01ff; + } + + /* Frequency */ + if ( ApuC4Freq ) { + ApuC4Skip = ApuNoiseMagic / ApuC4Freq; + } else { + ApuC4Skip = 0; + } + ApuC4Atl = ApuC4LengthCounter; + break; + + case 3: + ApuC4d = ApuEventQueue[event].data; + + /* Frequency */ + if ( ApuC4Freq ) { + ApuC4Skip = ApuNoiseMagic / ApuC4Freq; + } else { + ApuC4Skip = 0; + } + ApuC4Atl = ApuC4LengthCounter; + } + } else if (ApuEventQueue[event].type == APUET_W_CTRL) { + ApuCtrlNew = ApuEventQueue[event].data; + + if( !(ApuEventQueue[event].data&(1<<3)) ) { + ApuC4Atl = 0; + } + } + event++; + } + return event; +} + +/*-------------------------------------------------------------------*/ +/* Rendering noise channel #4 */ +/*-------------------------------------------------------------------*/ + +void ApuRenderingWave4(void) +{ + int cycles = 0; + int event = 0; + + unsigned int i; + + ApuCtrlNew = ApuCtrl; + for ( i = 0; i < ApuSamplesPerSync; i++ ) + { + /* Write registers */ + cycles += ApuCyclesPerSample; + event = ApuWriteWave4( cycles, event ); + + /* Envelope decay at a rate of ( Envelope Delay + 1 ) / 240 secs */ + ApuC4EnvPhase -= 4; + while ( ApuC4EnvPhase < 0 ) + { + ApuC4EnvPhase += ApuC4EnvDelay; + + if ( ApuC4Hold ) + { + ApuC4EnvVol = ( ApuC4EnvVol + 1 ) & 0x0f; + } + else if ( ApuC4EnvVol < 0x0f ) + { + ApuC4EnvVol++; + } + } + + /* Wave Rendering */ + if ( ApuCtrlNew & 0x08 ) + { + ApuC4Index += ApuC4Skip; + if ( ApuC4Index > 0x1fffffff ) + { + if ( ApuC4Small ) /* FIXME: may be wrong */ + { + ApuC4Sr |= ((!(ApuC4Sr & 1)) ^ (!(ApuC4Sr & 4))) << 5; + } else { + ApuC4Sr |= ((!(ApuC4Sr & 1)) ^ (!(ApuC4Sr & 16))) << 9; + } + ApuC4Sr >>= 1; + } + ApuC4Index &= 0x1fffffff; + + if ( ApuC4Atl && ( ApuC4Sr & 1 ) ) + { + if ( !ApuC4Env ) + { + wave_buffers[3][i] = ApuC4Vol; + } else { + wave_buffers[3][i] = ApuC4EnvVol ^ 0x0f; + } + } else { + wave_buffers[3][i] = 0; + } + } else { + wave_buffers[3][i] = 0; + } + } + if ( ApuC4Atl && !ApuC4Hold ) + { + ApuC4Atl--; + } +} + +/*===================================================================*/ +/* */ +/* ApuRenderingWave5() : Rendering DPCM channel #5 */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Write registers of DPCM channel #5 */ +/*-------------------------------------------------------------------*/ + +int ApuWriteWave5( int cycles, int event ) +{ + /* APU Reg Write Event */ + while ( (event < cur_event) && (ApuEventQueue[event].time < cycles) ) + { + if ( ( ApuEventQueue[event].type & APUET_MASK ) == APUET_C5 ) + { + ApuC5Reg[ ApuEventQueue[event].type & 3 ] = ApuEventQueue[event].data; + + switch (ApuEventQueue[event].type & 3) { + case 0: + ApuC5Freq = ApuDpcmCycles[ ( ApuEventQueue[event].data & 0x0F ) ] << 16; + ApuC5Looping = ApuEventQueue[event].data & 0x40; + break; + case 1: + ApuC5DpcmValue = ( ApuEventQueue[event].data & 0x7F ) >> 1; + break; + case 2: + ApuC5CacheAddr = 0xC000 + (WORD)( ApuEventQueue[event].data << 6 ); + break; + case 3: + ApuC5CacheDmaLength = ( ( ApuEventQueue[event].data << 4 ) + 1 ) << 3; + break; + } + } else if (ApuEventQueue[event].type == APUET_W_CTRL) { + ApuCtrlNew = ApuEventQueue[event].data; + + if( !(ApuEventQueue[event].data&(1<<4)) ) { + ApuC5Enable = 0; + ApuC5DmaLength = 0; + } else { + ApuC5Enable = 0xFF; + if( !ApuC5DmaLength ) { + ApuC5Address = ApuC5CacheAddr; + ApuC5DmaLength = ApuC5CacheDmaLength; + } + } + } + event++; + } + return event; +} + +/*-------------------------------------------------------------------*/ +/* Rendering DPCM channel #5 */ +/*-------------------------------------------------------------------*/ + +void ApuRenderingWave5(void) +{ + int cycles = 0; + int event = 0; + + unsigned int i; + + ApuCtrlNew = ApuCtrl; + for ( i = 0; i < ApuSamplesPerSync; i++ ) + { + /* Write registers */ + cycles += ApuCyclesPerSample; + event = ApuWriteWave5( cycles, event ); + + if( ApuC5DmaLength ) { + ApuC5Phaseacc -= ApuCycleRate; + + while( ApuC5Phaseacc < 0 ) { + ApuC5Phaseacc += ApuC5Freq; + if( !( ApuC5DmaLength & 7 ) ) { + ApuC5CurByte = K6502_Read( ApuC5Address ); + if( 0xFFFF == ApuC5Address ) + ApuC5Address = 0x8000; + else + ApuC5Address++; + } + if( !(--ApuC5DmaLength) ) { + if( ApuC5Looping ) { + ApuC5Address = ApuC5CacheAddr; + ApuC5DmaLength = ApuC5CacheDmaLength; + } else { + ApuC5Enable = 0; + break; + } + } + + // positive delta + if( ApuC5CurByte & ( 1 << ((ApuC5DmaLength&7)^7)) ) { + if( ApuC5DpcmValue < 0x3F ) + ApuC5DpcmValue += 1; + } else { + // negative delta + if( ApuC5DpcmValue > 1 ) + ApuC5DpcmValue -= 1; + } + } + } + + /* Wave Rendering */ + if ( ApuCtrlNew & 0x10 ) { + wave_buffers[4][i] = ( ApuC5Reg[1]&0x01 ) + ( ApuC5DpcmValue << 1 ); + } + } +} + + +/*===================================================================*/ +/* */ +/* InfoNES_pApuVsync() : Callback Function per Vsync */ +/* */ +/*===================================================================*/ + +void InfoNES_pAPUVsync(void) +{ + ApuRenderingWave1(); + ApuRenderingWave2(); + ApuRenderingWave3(); + ApuRenderingWave4(); + ApuRenderingWave5(); + + ApuCtrl = ApuCtrlNew; + + InfoNES_SoundOutput(ApuSamplesPerSync, + wave_buffers[0], wave_buffers[1], wave_buffers[2], + wave_buffers[3], wave_buffers[4]); + + entertime = g_wPassedClocks; + cur_event = 0; +} + +/*===================================================================*/ +/* */ +/* InfoNES_pApuInit() : Initialize pApu */ +/* */ +/*===================================================================*/ + +void InfoNES_pAPUInit(void) +{ + /* Sound Hardware Init */ + InfoNES_SoundInit(); + + ApuQuality = pAPU_QUALITY - 1; // 1: 22050, 2: 44100 [samples/sec] + + ApuPulseMagic = ApuQual[ ApuQuality ].pulse_magic; + ApuTriangleMagic = ApuQual[ ApuQuality ].triangle_magic; + ApuNoiseMagic = ApuQual[ ApuQuality ].noise_magic; + ApuSamplesPerSync = ApuQual[ ApuQuality ].samples_per_sync; + ApuCyclesPerSample = ApuQual[ ApuQuality ].cycles_per_sample; + ApuSampleRate = ApuQual[ ApuQuality ].sample_rate; + ApuCycleRate = ApuQual[ ApuQuality ].cycle_rate; + + InfoNES_SoundOpen( ApuSamplesPerSync, ApuSampleRate ); + + /*-------------------------------------------------------------------*/ + /* Initialize Rectangular, Noise Wave's Regs */ + /*-------------------------------------------------------------------*/ + ApuCtrl = ApuCtrlNew = 0; + ApuC1Wave = pulse_50; + ApuC2Wave = pulse_50; + + ApuC1a = ApuC1b = ApuC1c = ApuC1d = 0; + ApuC2a = ApuC2b = ApuC2c = ApuC2d = 0; + ApuC4a = ApuC4b = ApuC4c = ApuC4d = 0; + + ApuC1Skip = ApuC2Skip = ApuC4Skip = 0; + ApuC1Index = ApuC2Index = ApuC4Index = 0; + ApuC1EnvPhase = ApuC2EnvPhase = ApuC4EnvPhase = 0; + ApuC1EnvVol = ApuC2EnvVol = ApuC4EnvVol = 0; + ApuC1Atl = ApuC2Atl = ApuC4Atl = 0; + ApuC1SweepPhase = ApuC2SweepPhase = 0; + ApuC1Freq = ApuC2Freq = ApuC4Freq = 0; + ApuC4Sr = ApuC4Fdc = 0; + + /*-------------------------------------------------------------------*/ + /* Initialize Triangle Wave's Regs */ + /*-------------------------------------------------------------------*/ + ApuC3a = ApuC3b = ApuC3c = ApuC3d = 0; + ApuC3Atl = ApuC3Llc = 0; + ApuC3WriteLatency = 3; /* Magic Number */ + ApuC3CounterStarted = 0x00; + + /*-------------------------------------------------------------------*/ + /* Initialize DPCM's Regs */ + /*-------------------------------------------------------------------*/ + ApuC5Reg[0] = ApuC5Reg[1] = ApuC5Reg[2] = ApuC5Reg[3] = 0; + ApuC5Enable = ApuC5Looping = ApuC5CurByte = ApuC5DpcmValue = 0; + ApuC5Freq = ApuC5Phaseacc; + ApuC5Address = ApuC5CacheAddr = 0; + ApuC5DmaLength = ApuC5CacheDmaLength = 0; + + /*-------------------------------------------------------------------*/ + /* Initialize Wave Buffers */ + /*-------------------------------------------------------------------*/ + InfoNES_MemorySet( (void *)wave_buffers[0], 0, 735 ); + InfoNES_MemorySet( (void *)wave_buffers[1], 0, 735 ); + InfoNES_MemorySet( (void *)wave_buffers[2], 0, 735 ); + InfoNES_MemorySet( (void *)wave_buffers[3], 0, 735 ); + InfoNES_MemorySet( (void *)wave_buffers[4], 0, 735 ); + + entertime = g_wPassedClocks; + cur_event = 0; +} + +/*===================================================================*/ +/* */ +/* InfoNES_pApuDone() : Finalize pApu */ +/* */ +/*===================================================================*/ + +void InfoNES_pAPUDone(void) +{ + InfoNES_SoundClose(); +} + +/* + * End of InfoNES_pAPU.cpp + */ diff --git a/apps/plugins/infones/InfoNES_pAPU.h b/apps/plugins/infones/InfoNES_pAPU.h new file mode 100644 index 0000000..be00736 --- /dev/null +++ b/apps/plugins/infones/InfoNES_pAPU.h @@ -0,0 +1,200 @@ +/*===================================================================*/ +/* */ +/* InfoNES_pAPU.h : InfoNES Sound Emulation Function */ +/* */ +/* 2000/05/29 InfoNES Project ( based on DarcNES and NesterJ ) */ +/* */ +/*===================================================================*/ + +#ifndef InfoNES_PAPU_H_INCLUDED +#define InfoNES_PAPU_H_INCLUDED + +/*-------------------------------------------------------------------*/ +/* Macros */ +/*-------------------------------------------------------------------*/ + +/*-------------------------------------------------------------------*/ +/* Rectangle Wave #0 */ +/* Reg0: 0-3=Volume, 4=Envelope, 5=Hold, 6-7=Duty Cycle */ +/* Reg1: 0-2=sweep shifts, 3=sweep inc, 4-6=sweep length, 7=sweep on */ +/* Reg2: 8 bits of freq */ +/* Reg3: 0-2=high freq, 7-4=vbl length counter */ +/*-------------------------------------------------------------------*/ +#define ApuC1Vol ( ApuC1a & 0x0f ) +#define ApuC1Env ( ApuC1a & 0x10 ) +#define ApuC1Hold ( ApuC1a & 0x20 ) +#define ApuC1DutyCycle ( ApuC1a & 0xc0 ) +//#define ApuC1EnvDelay ( ( WORD )( ApuC1a & 0x0f ) << 8 ) +#define ApuC1EnvDelay ( ( ApuC1a & 0x0f ) + 1 ) +#define ApuC1SweepOn ( ApuC1b & 0x80 ) +#define ApuC1SweepIncDec ( ApuC1b & 0x08 ) +#define ApuC1SweepShifts ( ApuC1b & 0x07 ) +//#define ApuC1SweepDelay ( ( ( ( WORD )ApuC1b & 0x70 ) >> 4 ) << 8 ) +#define ApuC1SweepDelay ( ( ( ApuC1b & 0x70 ) >> 4 ) + 1 ) +#define ApuC1FreqLimit ( ApuFreqLimit[ ( ApuC1b & 0x07 ) ] ) + +/*-------------------------------------------------------------------*/ +/* Rectangle Wave #1 */ +/* Reg0: 0-3=Volume, 4=Envelope, 5=Hold, 6-7=Duty Cycle */ +/* Reg1: 0-2=sweep shifts, 3=sweep inc, 4-6=sweep length, 7=sweep on */ +/* Reg2: 8 bits of freq */ +/* Reg3: 0-2=high freq, 7-4=vbl length counter */ +/*-------------------------------------------------------------------*/ +#define ApuC2Vol ( ApuC2a & 0x0f ) +#define ApuC2Env ( ApuC2a & 0x10 ) +#define ApuC2Hold ( ApuC2a & 0x20 ) +#define ApuC2DutyCycle ( ApuC2a & 0xc0 ) +//#define ApuC2EnvDelay ( ( WORD )( ApuC2a & 0x0f ) << 8 ) +#define ApuC2EnvDelay ( ( ApuC2a & 0x0f ) + 1 ) +#define ApuC2SweepOn ( ApuC2b & 0x80 ) +#define ApuC2SweepIncDec ( ApuC2b & 0x08 ) +#define ApuC2SweepShifts ( ApuC2b & 0x07 ) +//#define ApuC2SweepDelay ( ( ( ( WORD )ApuC2b & 0x70 ) >> 4 ) << 8 ) +#define ApuC2SweepDelay ( ( ( ApuC2b & 0x70 ) >> 4 ) + 1 ) +#define ApuC2FreqLimit ( ApuFreqLimit[ ( ApuC2b & 0x07 ) ] ) + +/*-------------------------------------------------------------------*/ +/* Triangle Wave */ +/* Reg0: 7=Holdnote, 6-0=Linear Length Counter */ +/* Reg2: 8 bits of freq */ +/* Reg3: 0-2=high freq, 7-4=vbl length counter */ +/*-------------------------------------------------------------------*/ +#define ApuC3Holdnote ( ApuC3a & 0x80 ) +#define ApuC3LinearLength ( ( (WORD)ApuC3a & 0x7f ) << 6 ) +#define ApuC3LengthCounter ( ApuAtl[ ( ( ApuC3d & 0xf8) >> 3 ) ] ) +#define ApuC3Freq ( ( ( (WORD)ApuC3d & 0x07) << 8) + ApuC3c ) + +/*-------------------------------------------------------------------*/ +/* White Noise Channel */ +/* Reg0: 0-3=Volume, 4=Envelope, 5=Hold */ +/* Reg2: 7=Small(93byte) sample, 3-0=Freq Lookup */ +/* Reg3: 7-3=vbl length counter */ +/*-------------------------------------------------------------------*/ +//#define ApuC4Vol ( ( ApuC4a & 0x0f ) | ( ( ApuC4a & 0x0f ) << 4 ) ) +#define ApuC4Vol ( ApuC4a & 0x0f ) +//#define ApuC4EnvDelay ( ( WORD )( ApuC4a & 0x0f ) << 8 ) +#define ApuC4EnvDelay ( ( ApuC4a & 0x0f ) + 1 ) +#define ApuC4Env ( ApuC4a & 0x10 ) +#define ApuC4Hold ( ApuC4a & 0x20 ) +#define ApuC4Freq ( ApuNoiseFreq [ ( ApuC4c & 0x0f ) ] ) +#define ApuC4Small ( ApuC4c & 0x80 ) +//#define ApuC4LengthCounter ( ApuAtl[ ( ( ApuC4d & 0xf8 ) >> 3 ) ] ) +#define ApuC4LengthCounter ( ApuAtl[ ( ApuC4d >> 3 ) ] << 1 ) + +/*-------------------------------------------------------------------*/ +/* DPCM Channel */ +/* Reg0: 0-3=Frequency, 6=Looping */ +/* Reg1: 0-6=DPCM Value */ +/* Reg2: 0-7=Cache Addr */ +/* Reg3: 0-7=Cache DMA Length */ +/*-------------------------------------------------------------------*/ +#if 0 +#define ApuC5Freq ( ApuDpcmCycles[ ( ApuC5a & 0x0F ) ] ) +#define ApuC5Looping ( ApuC5a & 0x40 ) +#define ApuC5DpcmValue ( ( ApuC5b & 0x7F ) >> 1 ) +#define ApuC5CacheAddr ( 0xc000 + (WORD)(ApuC5c << 6) ) +#define ApuC5CacheDmaLength ( ( ( ApuC5d << 4 ) + 1 ) << 3 ) +#endif + +/*-------------------------------------------------------------------*/ +/* pAPU Event resources */ +/*-------------------------------------------------------------------*/ + +#define APU_EVENT_MAX 15000 + +struct ApuEvent_t { + long time; + BYTE type; + BYTE data; +}; + +#define APUET_MASK 0xfc +#define APUET_C1 0x00 +#define APUET_W_C1A 0x00 +#define APUET_W_C1B 0x01 +#define APUET_W_C1C 0x02 +#define APUET_W_C1D 0x03 +#define APUET_C2 0x04 +#define APUET_W_C2A 0x04 +#define APUET_W_C2B 0x05 +#define APUET_W_C2C 0x06 +#define APUET_W_C2D 0x07 +#define APUET_C3 0x08 +#define APUET_W_C3A 0x08 +#define APUET_W_C3B 0x09 +#define APUET_W_C3C 0x0a +#define APUET_W_C3D 0x0b +#define APUET_C4 0x0c +#define APUET_W_C4A 0x0c +#define APUET_W_C4B 0x0d +#define APUET_W_C4C 0x0e +#define APUET_W_C4D 0x0f +#define APUET_C5 0x10 +#define APUET_W_C5A 0x10 +#define APUET_W_C5B 0x11 +#define APUET_W_C5C 0x12 +#define APUET_W_C5D 0x13 +#define APUET_W_CTRL 0x20 +#define APUET_SYNC 0x40 + +/*-------------------------------------------------------------------*/ +/* Function prototypes */ +/*-------------------------------------------------------------------*/ +typedef void (*ApuWritefunc)(WORD addr, BYTE value); +extern ApuWritefunc pAPUSoundRegs[20]; +void ApuWriteControl(WORD addr, BYTE value); + +#define InfoNES_pAPUWriteControl(addr,value) \ +{ \ + ApuWriteControl(addr,value); \ +} + +void InfoNES_pAPUInit(void); +void InfoNES_pAPUDone(void); +void InfoNES_pAPUVsync(void); + +/*-------------------------------------------------------------------*/ +/* pAPU Quality resources */ +/*-------------------------------------------------------------------*/ + +/*-------------------------------------------------------------------*/ +/* ApuQuality is used to control the sound playback rate. */ +/* 1 is 11015 Hz. */ +/* 2 is 22050 Hz. */ +/* 3 is 44100 Hz. */ +/* these values subject to change without notice. */ +/*-------------------------------------------------------------------*/ +extern int ApuQuality; +#define pAPU_QUALITY 3 + +/*-------------------------------------------------------------------*/ +/* Rectangle Wave #1 resources */ +/*-------------------------------------------------------------------*/ + +extern BYTE ApuC1Atl; + +/*-------------------------------------------------------------------*/ +/* Rectangle Wave #2 resources */ +/*-------------------------------------------------------------------*/ + +extern BYTE ApuC2Atl; + +/*-------------------------------------------------------------------*/ +/* Triangle Wave resources */ +/*-------------------------------------------------------------------*/ + +extern BYTE ApuC3a; +extern BYTE ApuC3Atl; +extern DWORD ApuC3Llc; /* Linear Length Counter */ + +/*-------------------------------------------------------------------*/ +/* Noise resources */ +/*-------------------------------------------------------------------*/ + +extern BYTE ApuC4Atl; + +#endif /* InfoNES_PAPU_H_INCLUDED */ + +/* + * End of InfoNES_pAPU.h + */ diff --git a/apps/plugins/infones/K6502.c b/apps/plugins/infones/K6502.c new file mode 100644 index 0000000..fd4d6b8 --- /dev/null +++ b/apps/plugins/infones/K6502.c @@ -0,0 +1,1109 @@ +/*************************************************************************** + * __________ __ ___. + * Open \______ \ ____ ____ | | _\_ |__ _______ ___ + * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / + * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < + * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ + * \/ \/ \/ \/ \/ + * + * Rockbox port of InfoNES + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY + * KIND, either express or implied. + * + ****************************************************************************/ + +#include "K6502.h" +#include "InfoNES_System.h" + + +// Clock Op. +#define CLK(a) g_wPassedClocks += (a); + +// Addressing Op. +// Address +// (Indirect,X) +#define AA_IX K6502_ReadZpW( K6502_Read( PC++ ) + X ) +// (Indirect),Y +#define AA_IY K6502_ReadZpW( K6502_Read( PC++ ) ) + Y +// Zero Page +#define AA_ZP K6502_Read( PC++ ) +// Zero Page,X +#define AA_ZPX (BYTE)( K6502_Read( PC++ ) + X ) +// Zero Page,Y +#define AA_ZPY (BYTE)( K6502_Read( PC++ ) + Y ) +// Absolute +#define AA_ABS ( K6502_Read( PC++ ) | (WORD)K6502_Read( PC++ ) << 8 ) +// Absolute2 ( PC-- ) +#define AA_ABS2 ( K6502_Read( PC++ ) | (WORD)K6502_Read( PC ) << 8 ) +// Absolute,X +#define AA_ABSX AA_ABS + X +// Absolute,Y +#define AA_ABSY AA_ABS + Y + +// Data +// (Indirect,X) +#define A_IX K6502_Read( AA_IX ) +// (Indirect),Y +#define A_IY K6502_ReadIY() +// Zero Page +#define A_ZP K6502_ReadZp( AA_ZP ) +// Zero Page,X +#define A_ZPX K6502_ReadZp( AA_ZPX ) +// Zero Page,Y +#define A_ZPY K6502_ReadZp( AA_ZPY ) +// Absolute +#define A_ABS K6502_Read( AA_ABS ) +// Absolute,X +#define A_ABSX K6502_ReadAbsX() +// Absolute,Y +#define A_ABSY K6502_ReadAbsY() +// Immediate +#define A_IMM K6502_Read( PC++ ) + +// Flag Op. +#define SETF(a) F |= (a) +#define RSTF(a) F &= ~(a) +#define TEST(a) RSTF( FLAG_N | FLAG_Z ); SETF( g_byTestTable[ a ] ) + +// Load & Store Op. +#define STA(a) K6502_Write( (a), A ); +#define STX(a) K6502_Write( (a), X ); +#define STY(a) K6502_Write( (a), Y ); +#define LDA(a) A = (a); TEST( A ); +#define LDX(a) X = (a); TEST( X ); +#define LDY(a) Y = (a); TEST( Y ); + +// Stack Op. +#define PUSH(a) K6502_Write( BASE_STACK + SP--, (a) ) +#define PUSHW(a) PUSH( (a) >> 8 ); PUSH( (a) & 0xff ) +#define POP(a) a = K6502_Read( BASE_STACK + ++SP ) +#define POPW(a) POP(a); a |= ( K6502_Read( BASE_STACK + ++SP ) << 8 ) + +// Logical Op. +#define ORA(a) A |= (a); TEST( A ) +#define AND(a) A &= (a); TEST( A ) +#define EOR(a) A ^= (a); TEST( A ) +#define BIT(a) byD0 = (a); RSTF( FLAG_N | FLAG_V | FLAG_Z ); SETF( ( byD0 & ( FLAG_N | FLAG_V ) ) | ( ( byD0 & A ) ? 0 : FLAG_Z ) ); +#define CMP(a) wD0 = (WORD)A - (a); RSTF( FLAG_N | FLAG_Z | FLAG_C ); SETF( g_byTestTable[ wD0 & 0xff ] | ( wD0 < 0x100 ? FLAG_C : 0 ) ); +#define CPX(a) wD0 = (WORD)X - (a); RSTF( FLAG_N | FLAG_Z | FLAG_C ); SETF( g_byTestTable[ wD0 & 0xff ] | ( wD0 < 0x100 ? FLAG_C : 0 ) ); +#define CPY(a) wD0 = (WORD)Y - (a); RSTF( FLAG_N | FLAG_Z | FLAG_C ); SETF( g_byTestTable[ wD0 & 0xff ] | ( wD0 < 0x100 ? FLAG_C : 0 ) ); + +// Math Op. (A D flag isn't being supported.) +#define ADC(a) byD0 = (a); \ + wD0 = A + byD0 + ( F & FLAG_C ); \ + byD1 = (BYTE)wD0; \ + RSTF( FLAG_N | FLAG_V | FLAG_Z | FLAG_C ); \ + SETF( g_byTestTable[ byD1 ] | ( ( ~( A ^ byD0 ) & ( A ^ byD1 ) & 0x80 ) ? FLAG_V : 0 ) | ( wD0 > 0xff ) ); \ + A = byD1; + +#define SBC(a) byD0 = (a); \ + wD0 = A - byD0 - ( ~F & FLAG_C ); \ + byD1 = (BYTE)wD0; \ + RSTF( FLAG_N | FLAG_V | FLAG_Z | FLAG_C ); \ + SETF( g_byTestTable[ byD1 ] | ( ( ( A ^ byD0 ) & ( A ^ byD1 ) & 0x80 ) ? FLAG_V : 0 ) | ( wD0 < 0x100 ) ); \ + A = byD1; + +#define DEC(a) wA0 = a; byD0 = K6502_Read( wA0 ); --byD0; K6502_Write( wA0, byD0 ); TEST( byD0 ) +#define INC(a) wA0 = a; byD0 = K6502_Read( wA0 ); ++byD0; K6502_Write( wA0, byD0 ); TEST( byD0 ) + +// Shift Op. +#define ASLA RSTF( FLAG_N | FLAG_Z | FLAG_C ); SETF( g_ASLTable[ A ].byFlag ); A = g_ASLTable[ A ].byValue +#define ASL(a) RSTF( FLAG_N | FLAG_Z | FLAG_C ); wA0 = a; byD0 = K6502_Read( wA0 ); SETF( g_ASLTable[ byD0 ].byFlag ); K6502_Write( wA0, g_ASLTable[ byD0 ].byValue ) +#define LSRA RSTF( FLAG_N | FLAG_Z | FLAG_C ); SETF( g_LSRTable[ A ].byFlag ); A = g_LSRTable[ A ].byValue +#define LSR(a) RSTF( FLAG_N | FLAG_Z | FLAG_C ); wA0 = a; byD0 = K6502_Read( wA0 ); SETF( g_LSRTable[ byD0 ].byFlag ); K6502_Write( wA0, g_LSRTable[ byD0 ].byValue ) +#define ROLA byD0 = F & FLAG_C; RSTF( FLAG_N | FLAG_Z | FLAG_C ); SETF( g_ROLTable[ byD0 ][ A ].byFlag ); A = g_ROLTable[ byD0 ][ A ].byValue +#define ROL(a) byD1 = F & FLAG_C; RSTF( FLAG_N | FLAG_Z | FLAG_C ); wA0 = a; byD0 = K6502_Read( wA0 ); SETF( g_ROLTable[ byD1 ][ byD0 ].byFlag ); K6502_Write( wA0, g_ROLTable[ byD1 ][ byD0 ].byValue ) +#define RORA byD0 = F & FLAG_C; RSTF( FLAG_N | FLAG_Z | FLAG_C ); SETF( g_RORTable[ byD0 ][ A ].byFlag ); A = g_RORTable[ byD0 ][ A ].byValue +#define ROR(a) byD1 = F & FLAG_C; RSTF( FLAG_N | FLAG_Z | FLAG_C ); wA0 = a; byD0 = K6502_Read( wA0 ); SETF( g_RORTable[ byD1 ][ byD0 ].byFlag ); K6502_Write( wA0, g_RORTable[ byD1 ][ byD0 ].byValue ) + +// Jump Op. +#define JSR wA0 = AA_ABS2; PUSHW( PC ); PC = wA0; +#if 0 +#define BRA(a) if ( a ) { wA0 = PC; PC += (char)K6502_Read( PC ); CLK( 3 + ( ( wA0 & 0x0100 ) != ( PC & 0x0100 ) ) ); ++PC; } else { ++PC; CLK( 2 ); } +#else +#define BRA(a) { \ + if ( a ) \ + { \ + wA0 = PC; \ + byD0 = K6502_Read( PC ); \ + PC += ( ( byD0 & 0x80 ) ? ( 0xFF00 | (WORD)byD0 ) : (WORD)byD0 ); \ + CLK( 3 + ( ( wA0 & 0x0100 ) != ( PC & 0x0100 ) ) ); \ + ++PC; \ + } else { \ + ++PC; \ + CLK( 2 ); \ + } \ +} +#endif +#define JMP(a) PC = a; + +/*-------------------------------------------------------------------*/ +/* Global valiables */ +/*-------------------------------------------------------------------*/ + +// 6502 Register +WORD PC; +BYTE SP; +BYTE F; +BYTE A; +BYTE X; +BYTE Y; + +// The state of the IRQ pin +BYTE IRQ_State; + +// Wiring of the IRQ pin +BYTE IRQ_Wiring; + +// The state of the NMI pin +BYTE NMI_State; + +// Wiring of the NMI pin +BYTE NMI_Wiring; + +// The number of the clocks that it passed +WORD g_wPassedClocks; + +// A table for the test +BYTE g_byTestTable[ 256 ]; + +// A table for ASL +struct value_table_tag g_ASLTable[ 256 ]; + +// A table for LSR +struct value_table_tag g_LSRTable[ 256 ]; + +// A table for ROL +struct value_table_tag g_ROLTable[ 2 ][ 256 ]; + +// A table for ROR +struct value_table_tag g_RORTable[ 2 ][ 256 ]; + +/*===================================================================*/ +/* */ +/* K6502_Init() : Initialize K6502 */ +/* */ +/*===================================================================*/ +void K6502_Init() +{ +/* + * Initialize K6502 + * + * You must call this function only once at first. + */ + + BYTE idx; + BYTE idx2; + + // The establishment of the IRQ pin + NMI_Wiring = NMI_State = 1; + IRQ_Wiring = IRQ_State = 1; + + // Make a table for the test + idx = 0; + do + { + if ( idx == 0 ) + g_byTestTable[ 0 ] = FLAG_Z; + else + if ( idx > 127 ) + g_byTestTable[ idx ] = FLAG_N; + else + g_byTestTable[ idx ] = 0; + + ++idx; + } while ( idx != 0 ); + + // Make a table ASL + idx = 0; + do + { + g_ASLTable[ idx ].byValue = idx << 1; + g_ASLTable[ idx ].byFlag = 0; + + if ( idx > 127 ) + g_ASLTable[ idx ].byFlag = FLAG_C; + + if ( g_ASLTable[ idx ].byValue == 0 ) + g_ASLTable[ idx ].byFlag |= FLAG_Z; + else + if ( g_ASLTable[ idx ].byValue & 0x80 ) + g_ASLTable[ idx ].byFlag |= FLAG_N; + + ++idx; + } while ( idx != 0 ); + + // Make a table LSR + idx = 0; + do + { + g_LSRTable[ idx ].byValue = idx >> 1; + g_LSRTable[ idx ].byFlag = 0; + + if ( idx & 1 ) + g_LSRTable[ idx ].byFlag = FLAG_C; + + if ( g_LSRTable[ idx ].byValue == 0 ) + g_LSRTable[ idx ].byFlag |= FLAG_Z; + + ++idx; + } while ( idx != 0 ); + + // Make a table ROL + for ( idx2 = 0; idx2 < 2; ++idx2 ) + { + idx = 0; + do + { + g_ROLTable[ idx2 ][ idx ].byValue = ( idx << 1 ) | idx2; + g_ROLTable[ idx2 ][ idx ].byFlag = 0; + + if ( idx > 127 ) + g_ROLTable[ idx2 ][ idx ].byFlag = FLAG_C; + + if ( g_ROLTable[ idx2 ][ idx ].byValue == 0 ) + g_ROLTable[ idx2 ][ idx ].byFlag |= FLAG_Z; + else + if ( g_ROLTable[ idx2 ][ idx ].byValue & 0x80 ) + g_ROLTable[ idx2 ][ idx ].byFlag |= FLAG_N; + + ++idx; + } while ( idx != 0 ); + } + + // Make a table ROR + for ( idx2 = 0; idx2 < 2; ++idx2 ) + { + idx = 0; + do + { + g_RORTable[ idx2 ][ idx ].byValue = ( idx >> 1 ) | ( idx2 << 7 ); + g_RORTable[ idx2 ][ idx ].byFlag = 0; + + if ( idx & 1 ) + g_RORTable[ idx2 ][ idx ].byFlag = FLAG_C; + + if ( g_RORTable[ idx2 ][ idx ].byValue == 0 ) + g_RORTable[ idx2 ][ idx ].byFlag |= FLAG_Z; + else + if ( g_RORTable[ idx2 ][ idx ].byValue & 0x80 ) + g_RORTable[ idx2 ][ idx ].byFlag |= FLAG_N; + + ++idx; + } while ( idx != 0 ); + } +} + +/*===================================================================*/ +/* */ +/* K6502_Reset() : Reset a CPU */ +/* */ +/*===================================================================*/ +void K6502_Reset() +{ +/* + * Reset a CPU + * + */ + + // Reset Registers + PC = K6502_ReadW( VECTOR_RESET ); + SP = 0xFF; + A = X = Y = 0; + F = FLAG_Z | FLAG_R | FLAG_I; + + // Set up the state of the Interrupt pin. + NMI_State = NMI_Wiring; + IRQ_State = IRQ_Wiring; + + // Reset Passed Clocks + g_wPassedClocks = 0; +} + +/*===================================================================*/ +/* */ +/* K6502_Set_Int_Wiring() : Set up wiring of the interrupt pin */ +/* */ +/*===================================================================*/ +void K6502_Set_Int_Wiring( BYTE byNMI_Wiring, BYTE byIRQ_Wiring ) +{ +/* + * Set up wiring of the interrupt pin + * + */ + + NMI_Wiring = byNMI_Wiring; + IRQ_Wiring = byIRQ_Wiring; +} + +/*===================================================================*/ +/* */ +/* K6502_Step() : */ +/* Only the specified number of the clocks execute Op. */ +/* */ +/*===================================================================*/ +void K6502_Step( WORD wClocks ) +{ +/* + * Only the specified number of the clocks execute Op. + * + * Parameters + * WORD wClocks (Read) + * The number of the clocks + */ + + BYTE byCode; + + WORD wA0; + BYTE byD0; + BYTE byD1; + WORD wD0; + + // Dispose of it if there is an interrupt requirement + if ( NMI_State != NMI_Wiring ) + { + // NMI Interrupt + NMI_State = NMI_Wiring; + CLK( 7 ); + + PUSHW( PC ); + PUSH( F & ~FLAG_B ); + + RSTF( FLAG_D ); + SETF( FLAG_I ); + + PC = K6502_ReadW( VECTOR_NMI ); + } + else + if ( IRQ_State != IRQ_Wiring ) + { + // IRQ Interrupt + // Execute IRQ if an I flag isn't being set + if ( !( F & FLAG_I ) ) + { + IRQ_State = IRQ_Wiring; + CLK( 7 ); + + PUSHW( PC ); + PUSH( F & ~FLAG_B ); + + RSTF( FLAG_D ); + SETF( FLAG_I ); + + PC = K6502_ReadW( VECTOR_IRQ ); + } + } + + // It has a loop until a constant clock passes + while ( g_wPassedClocks < wClocks ) + { + // Read an instruction + byCode = K6502_Read( PC++ ); + + // Execute an instruction. + switch ( byCode ) + { + case 0x00: // BRK + ++PC; PUSHW( PC ); SETF( FLAG_B ); PUSH( F ); SETF( FLAG_I ); RSTF( FLAG_D ); PC = K6502_ReadW( VECTOR_IRQ ); CLK( 7 ); + break; + + case 0x01: // ORA (Zpg,X) + ORA( A_IX ); CLK( 6 ); + break; + + case 0x05: // ORA Zpg + ORA( A_ZP ); CLK( 3 ); + break; + + case 0x06: // ASL Zpg + ASL( AA_ZP ); CLK( 5 ); + break; + + case 0x08: // PHP + SETF( FLAG_B ); PUSH( F ); CLK( 3 ); + break; + + case 0x09: // ORA #Oper + ORA( A_IMM ); CLK( 2 ); + break; + + case 0x0A: // ASL A + ASLA; CLK( 2 ); + break; + + case 0x0D: // ORA Abs + ORA( A_ABS ); CLK( 4 ); + break; + + case 0x0e: // ASL Abs + ASL( AA_ABS ); CLK( 6 ); + break; + + case 0x10: // BPL Oper + BRA( !( F & FLAG_N ) ); + break; + + case 0x11: // ORA (Zpg),Y + ORA( A_IY ); CLK( 5 ); + break; + + case 0x15: // ORA Zpg,X + ORA( A_ZPX ); CLK( 4 ); + break; + + case 0x16: // ASL Zpg,X + ASL( AA_ZPX ); CLK( 6 ); + break; + + case 0x18: // CLC + RSTF( FLAG_C ); CLK( 2 ); + break; + + case 0x19: // ORA Abs,Y + ORA( A_ABSY ); CLK( 4 ); + break; + + case 0x1D: // ORA Abs,X + ORA( A_ABSX ); CLK( 4 ); + break; + + case 0x1E: // ASL Abs,X + ASL( AA_ABSX ); CLK( 7 ); + break; + + case 0x20: // JSR Abs + JSR; CLK( 6 ); + break; + + case 0x21: // AND (Zpg,X) + AND( A_IX ); CLK( 6 ); + break; + + case 0x24: // BIT Zpg + BIT( A_ZP ); CLK( 3 ); + break; + + case 0x25: // AND Zpg + AND( A_ZP ); CLK( 3 ); + break; + + case 0x26: // ROL Zpg + ROL( AA_ZP ); CLK( 5 ); + break; + + case 0x28: // PLP + POP( F ); SETF( FLAG_R ); CLK( 4 ); + break; + + case 0x29: // AND #Oper + AND( A_IMM ); CLK( 2 ); + break; + + case 0x2A: // ROL A + ROLA; CLK( 2 ); + break; + + case 0x2C: // BIT Abs + BIT( A_ABS ); CLK( 4 ); + break; + + case 0x2D: // AND Abs + AND( A_ABS ); CLK( 4 ); + break; + + case 0x2E: // ROL Abs + ROL( AA_ABS ); CLK( 6 ); + break; + + case 0x30: // BMI Oper + BRA( F & FLAG_N ); + break; + + case 0x31: // AND (Zpg),Y + AND( A_IY ); CLK( 5 ); + break; + + case 0x35: // AND Zpg,X + AND( A_ZPX ); CLK( 4 ); + break; + + case 0x36: // ROL Zpg,X + ROL( AA_ZPX ); CLK( 6 ); + break; + + case 0x38: // SEC + SETF( FLAG_C ); CLK( 2 ); + break; + + case 0x39: // AND Abs,Y + AND( A_ABSY ); CLK( 4 ); + break; + + case 0x3D: // AND Abs,X + AND( A_ABSX ); CLK( 4 ); + break; + + case 0x3E: // ROL Abs,X + ROL( AA_ABSX ); CLK( 7 ); + break; + + case 0x40: // RTI + POP( F ); SETF( FLAG_R ); POPW( PC ); CLK( 6 ); + break; + + case 0x41: // EOR (Zpg,X) + EOR( A_IX ); CLK( 6 ); + break; + + case 0x45: // EOR Zpg + EOR( A_ZP ); CLK( 3 ); + break; + + case 0x46: // LSR Zpg + LSR( AA_ZP ); CLK( 5 ); + break; + + case 0x48: // PHA + PUSH( A ); CLK( 3 ); + break; + + case 0x49: // EOR #Oper + EOR( A_IMM ); CLK( 2 ); + break; + + case 0x4A: // LSR A + LSRA; CLK( 2 ); + break; + + case 0x4C: // JMP Abs + JMP( AA_ABS ); CLK( 3 ); + break; + + case 0x4D: // EOR Abs + EOR( A_ABS ); CLK( 4 ); + break; + + case 0x4E: // LSR Abs + LSR( AA_ABS ); CLK( 6 ); + break; + + case 0x50: // BVC + BRA( !( F & FLAG_V ) ); + break; + + case 0x51: // EOR (Zpg),Y + EOR( A_IY ); CLK( 5 ); + break; + + case 0x55: // EOR Zpg,X + EOR( A_ZPX ); CLK( 4 ); + break; + + case 0x56: // LSR Zpg,X + LSR( AA_ZPX ); CLK( 6 ); + break; + + case 0x58: // CLI + byD0 = F; + RSTF( FLAG_I ); CLK( 2 ); + if ( ( byD0 & FLAG_I ) && IRQ_State != IRQ_Wiring ) + { + IRQ_State = IRQ_Wiring; + CLK( 7 ); + + PUSHW( PC ); + PUSH( F & ~FLAG_B ); + + RSTF( FLAG_D ); + SETF( FLAG_I ); + + PC = K6502_ReadW( VECTOR_IRQ ); + } + break; + + case 0x59: // EOR Abs,Y + EOR( A_ABSY ); CLK( 4 ); + break; + + case 0x5D: // EOR Abs,X + EOR( A_ABSX ); CLK( 4 ); + break; + + case 0x5E: // LSR Abs,X + LSR( AA_ABSX ); CLK( 7 ); + break; + + case 0x60: // RTS + POPW( PC ); ++PC; CLK( 6 ); + break; + + case 0x61: // ADC (Zpg,X) + ADC( A_IX ); CLK( 6 ); + break; + + case 0x65: // ADC Zpg + ADC( A_ZP ); CLK( 3 ); + break; + + case 0x66: // ROR Zpg + ROR( AA_ZP ); CLK( 5 ); + break; + + case 0x68: // PLA + POP( A ); TEST( A ); CLK( 4 ); + break; + + case 0x69: // ADC #Oper + ADC( A_IMM ); CLK( 2 ); + break; + + case 0x6A: // ROR A + RORA; CLK( 2 ); + break; + + case 0x6C: // JMP (Abs) + JMP( K6502_ReadW2( AA_ABS ) ); CLK( 5 ); + break; + + case 0x6D: // ADC Abs + ADC( A_ABS ); CLK( 4 ); + break; + + case 0x6E: // ROR Abs + ROR( AA_ABS ); CLK( 6 ); + break; + + case 0x70: // BVS + BRA( F & FLAG_V ); + break; + + case 0x71: // ADC (Zpg),Y + ADC( A_IY ); CLK( 5 ); + break; + + case 0x75: // ADC Zpg,X + ADC( A_ZPX ); CLK( 4 ); + break; + + case 0x76: // ROR Zpg,X + ROR( AA_ZPX ); CLK( 6 ); + break; + + case 0x78: // SEI + SETF( FLAG_I ); CLK( 2 ); + break; + + case 0x79: // ADC Abs,Y + ADC( A_ABSY ); CLK( 4 ); + break; + + case 0x7D: // ADC Abs,X + ADC( A_ABSX ); CLK( 4 ); + break; + + case 0x7E: // ROR Abs,X + ROR( AA_ABSX ); CLK( 7 ); + break; + + case 0x81: // STA (Zpg,X) + STA( AA_IX ); CLK( 6 ); + break; + + case 0x84: // STY Zpg + STY( AA_ZP ); CLK( 3 ); + break; + + case 0x85: // STA Zpg + STA( AA_ZP ); CLK( 3 ); + break; + + case 0x86: // STX Zpg + STX( AA_ZP ); CLK( 3 ); + break; + + case 0x88: // DEY + --Y; TEST( Y ); CLK( 2 ); + break; + + case 0x8A: // TXA + A = X; TEST( A ); CLK( 2 ); + break; + + case 0x8C: // STY Abs + STY( AA_ABS ); CLK( 4 ); + break; + + case 0x8D: // STA Abs + STA( AA_ABS ); CLK( 4 ); + break; + + case 0x8E: // STX Abs + STX( AA_ABS ); CLK( 4 ); + break; + + case 0x90: // BCC + BRA( !( F & FLAG_C ) ); + break; + + case 0x91: // STA (Zpg),Y + STA( AA_IY ); CLK( 6 ); + break; + + case 0x94: // STY Zpg,X + STY( AA_ZPX ); CLK( 4 ); + break; + + case 0x95: // STA Zpg,X + STA( AA_ZPX ); CLK( 4 ); + break; + + case 0x96: // STX Zpg,Y + STX( AA_ZPY ); CLK( 4 ); + break; + + case 0x98: // TYA + A = Y; TEST( A ); CLK( 2 ); + break; + + case 0x99: // STA Abs,Y + STA( AA_ABSY ); CLK( 5 ); + break; + + case 0x9A: // TXS + SP = X; CLK( 2 ); + break; + + case 0x9D: // STA Abs,X + STA( AA_ABSX ); CLK( 5 ); + break; + + case 0xA0: // LDY #Oper + LDY( A_IMM ); CLK( 2 ); + break; + + case 0xA1: // LDA (Zpg,X) + LDA( A_IX ); CLK( 6 ); + break; + + case 0xA2: // LDX #Oper + LDX( A_IMM ); CLK( 2 ); + break; + + case 0xA4: // LDY Zpg + LDY( A_ZP ); CLK( 3 ); + break; + + case 0xA5: // LDA Zpg + LDA( A_ZP ); CLK( 3 ); + break; + + case 0xA6: // LDX Zpg + LDX( A_ZP ); CLK( 3 ); + break; + + case 0xA8: // TAY + Y = A; TEST( A ); CLK( 2 ); + break; + + case 0xA9: // LDA #Oper + LDA( A_IMM ); CLK( 2 ); + break; + + case 0xAA: // TAX + X = A; TEST( A ); CLK( 2 ); + break; + + case 0xAC: // LDY Abs + LDY( A_ABS ); CLK( 4 ); + break; + + case 0xAD: // LDA Abs + LDA( A_ABS ); CLK( 4 ); + break; + + case 0xAE: // LDX Abs + LDX( A_ABS ); CLK( 4 ); + break; + + case 0xB0: // BCS + BRA( F & FLAG_C ); + break; + + case 0xB1: // LDA (Zpg),Y + LDA( A_IY ); CLK( 5 ); + break; + + case 0xB4: // LDY Zpg,X + LDY( A_ZPX ); CLK( 4 ); + break; + + case 0xB5: // LDA Zpg,X + LDA( A_ZPX ); CLK( 4 ); + break; + + case 0xB6: // LDX Zpg,Y + LDX( A_ZPY ); CLK( 4 ); + break; + + case 0xB8: // CLV + RSTF( FLAG_V ); CLK( 2 ); + break; + + case 0xB9: // LDA Abs,Y + LDA( A_ABSY ); CLK( 4 ); + break; + + case 0xBA: // TSX + X = SP; TEST( X ); CLK( 2 ); + break; + + case 0xBC: // LDY Abs,X + LDY( A_ABSX ); CLK( 4 ); + break; + + case 0xBD: // LDA Abs,X + LDA( A_ABSX ); CLK( 4 ); + break; + + case 0xBE: // LDX Abs,Y + LDX( A_ABSY ); CLK( 4 ); + break; + + case 0xC0: // CPY #Oper + CPY( A_IMM ); CLK( 2 ); + break; + + case 0xC1: // CMP (Zpg,X) + CMP( A_IX ); CLK( 6 ); + break; + + case 0xC4: // CPY Zpg + CPY( A_ZP ); CLK( 3 ); + break; + + case 0xC5: // CMP Zpg + CMP( A_ZP ); CLK( 3 ); + break; + + case 0xC6: // DEC Zpg + DEC( AA_ZP ); CLK( 5 ); + break; + + case 0xC8: // INY + ++Y; TEST( Y ); CLK( 2 ); + break; + + case 0xC9: // CMP #Oper + CMP( A_IMM ); CLK( 2 ); + break; + + case 0xCA: // DEX + --X; TEST( X ); CLK( 2 ); + break; + + case 0xCC: // CPY Abs + CPY( A_ABS ); CLK( 4 ); + break; + + case 0xCD: // CMP Abs + CMP( A_ABS ); CLK( 4 ); + break; + + case 0xCE: // DEC Abs + DEC( AA_ABS ); CLK( 6 ); + break; + + case 0xD0: // BNE + BRA( !( F & FLAG_Z ) ); + break; + + case 0xD1: // CMP (Zpg),Y + CMP( A_IY ); CLK( 5 ); + break; + + case 0xD5: // CMP Zpg,X + CMP( A_ZPX ); CLK( 4 ); + break; + + case 0xD6: // DEC Zpg,X + DEC( AA_ZPX ); CLK( 6 ); + break; + + case 0xD8: // CLD + RSTF( FLAG_D ); CLK( 2 ); + break; + + case 0xD9: // CMP Abs,Y + CMP( A_ABSY ); CLK( 4 ); + break; + + case 0xDD: // CMP Abs,X + CMP( A_ABSX ); CLK( 4 ); + break; + + case 0xDE: // DEC Abs,X + DEC( AA_ABSX ); CLK( 7 ); + break; + + case 0xE0: // CPX #Oper + CPX( A_IMM ); CLK( 2 ); + break; + + case 0xE1: // SBC (Zpg,X) + SBC( A_IX ); CLK( 6 ); + break; + + case 0xE4: // CPX Zpg + CPX( A_ZP ); CLK( 3 ); + break; + + case 0xE5: // SBC Zpg + SBC( A_ZP ); CLK( 3 ); + break; + + case 0xE6: // INC Zpg + INC( AA_ZP ); CLK( 5 ); + break; + + case 0xE8: // INX + ++X; TEST( X ); CLK( 2 ); + break; + + case 0xE9: // SBC #Oper + SBC( A_IMM ); CLK( 2 ); + break; + + case 0xEA: // NOP + CLK( 2 ); + break; + + case 0xEC: // CPX Abs + CPX( A_ABS ); CLK( 4 ); + break; + + case 0xED: // SBC Abs + SBC( A_ABS ); CLK( 4 ); + break; + + case 0xEE: // INC Abs + INC( AA_ABS ); CLK( 6 ); + break; + + case 0xF0: // BEQ + BRA( F & FLAG_Z ); + break; + + case 0xF1: // SBC (Zpg),Y + SBC( A_IY ); CLK( 5 ); + break; + + case 0xF5: // SBC Zpg,X + SBC( A_ZPX ); CLK( 4 ); + break; + + case 0xF6: // INC Zpg,X + INC( AA_ZPX ); CLK( 6 ); + break; + + case 0xF8: // SED + SETF( FLAG_D ); CLK( 2 ); + break; + + case 0xF9: // SBC Abs,Y + SBC( A_ABSY ); CLK( 4 ); + break; + + case 0xFD: // SBC Abs,X + SBC( A_ABSX ); CLK( 4 ); + break; + + case 0xFE: // INC Abs,X + INC( AA_ABSX ); CLK( 7 ); + break; + + /*-----------------------------------------------------------*/ + /* Unlisted Instructions ( thanks to virtualnes ) */ + /*-----------------------------------------------------------*/ + + case 0x1A: // NOP (Unofficial) + case 0x3A: // NOP (Unofficial) + case 0x5A: // NOP (Unofficial) + case 0x7A: // NOP (Unofficial) + case 0xDA: // NOP (Unofficial) + case 0xFA: // NOP (Unofficial) + CLK( 2 ); + break; + + case 0x80: // DOP (CYCLES 2) + case 0x82: // DOP (CYCLES 2) + case 0x89: // DOP (CYCLES 2) + case 0xC2: // DOP (CYCLES 2) + case 0xE2: // DOP (CYCLES 2) + PC++; + CLK( 2 ); + break; + + case 0x04: // DOP (CYCLES 3) + case 0x44: // DOP (CYCLES 3) + case 0x64: // DOP (CYCLES 3) + PC++; + CLK( 3 ); + break; + + case 0x14: // DOP (CYCLES 4) + case 0x34: // DOP (CYCLES 4) + case 0x54: // DOP (CYCLES 4) + case 0x74: // DOP (CYCLES 4) + case 0xD4: // DOP (CYCLES 4) + case 0xF4: // DOP (CYCLES 4) + PC++; + CLK( 4 ); + break; + + case 0x0C: // TOP + case 0x1C: // TOP + case 0x3C: // TOP + case 0x5C: // TOP + case 0x7C: // TOP + case 0xDC: // TOP + case 0xFC: // TOP + PC+=2; + CLK( 4 ); + break; + + default: // Unknown Instruction + CLK( 2 ); +#if 0 + InfoNES_MessageBox( "0x%02x is unknown instruction.\n", byCode ) ; +#endif + break; + + } /* end of switch ( byCode ) */ + + } /* end of while ... */ + + // Correct the number of the clocks + g_wPassedClocks -= wClocks; +} + +// Addressing Op. +// Data +// Absolute,X +static inline BYTE K6502_ReadAbsX(){ WORD wA0, wA1; wA0 = AA_ABS; wA1 = wA0 + X; CLK( ( wA0 & 0x0100 ) != ( wA1 & 0x0100 ) ); return K6502_Read( wA1 ); }; +// Absolute,Y +static inline BYTE K6502_ReadAbsY(){ WORD wA0, wA1; wA0 = AA_ABS; wA1 = wA0 + Y; CLK( ( wA0 & 0x0100 ) != ( wA1 & 0x0100 ) ); return K6502_Read( wA1 ); }; +// (Indirect),Y +static inline BYTE K6502_ReadIY(){ WORD wA0, wA1; wA0 = K6502_ReadZpW( K6502_Read( PC++ ) ); wA1 = wA0 + Y; CLK( ( wA0 & 0x0100 ) != ( wA1 & 0x0100 ) ); return K6502_Read( wA1 ); }; + +/*===================================================================*/ +/* */ +/* 6502 Reading/Writing Operation */ +/* */ +/*===================================================================*/ +#include "K6502_rw.h" diff --git a/apps/plugins/infones/K6502.h b/apps/plugins/infones/K6502.h new file mode 100644 index 0000000..e20bbd0 --- /dev/null +++ b/apps/plugins/infones/K6502.h @@ -0,0 +1,58 @@ +#include "InfoNES_Types.h" + +#ifndef K6502_H_INCLUDED +#define K6502_H_INCLUDED + +/* 6502 Flags */ +#define FLAG_C 0x01 +#define FLAG_Z 0x02 +#define FLAG_I 0x04 +#define FLAG_D 0x08 +#define FLAG_B 0x10 +#define FLAG_R 0x20 +#define FLAG_V 0x40 +#define FLAG_N 0x80 + +/* Stack Address */ +#define BASE_STACK 0x100 + +/* Interrupt Vectors */ +#define VECTOR_NMI 0xfffa +#define VECTOR_RESET 0xfffc +#define VECTOR_IRQ 0xfffe + +// NMI Request +#define NMI_REQ NMI_State = 0; + +// IRQ Request +#define IRQ_REQ IRQ_State = 0; + +// Emulator Operation +void K6502_Init(void); +void K6502_Reset(void); +void K6502_Set_Int_Wiring( BYTE byNMI_Wiring, BYTE byIRQ_Wiring ); +void K6502_Step( register WORD wClocks ); + +// I/O Operation (User definition) +static inline BYTE K6502_Read( WORD wAddr); +static inline WORD K6502_ReadW( WORD wAddr ); +static inline WORD K6502_ReadW2( WORD wAddr ); +static inline BYTE K6502_ReadZp( BYTE byAddr ); +static inline WORD K6502_ReadZpW( BYTE byAddr ); +static inline BYTE K6502_ReadAbsX(void); +static inline BYTE K6502_ReadAbsY(void); +static inline BYTE K6502_ReadIY(void); + +static inline void K6502_Write( WORD wAddr, BYTE byData ); +static inline void K6502_WriteW( WORD wAddr, WORD wData ); + +// The state of the IRQ pin +extern BYTE IRQ_State; + +// The state of the NMI pin +extern BYTE NMI_State; + +// The number of the clocks that it passed +extern WORD g_wPassedClocks; + +#endif /* !K6502_H_INCLUDED */ diff --git a/apps/plugins/infones/K6502_rw.h b/apps/plugins/infones/K6502_rw.h new file mode 100644 index 0000000..afcbeab --- /dev/null +++ b/apps/plugins/infones/K6502_rw.h @@ -0,0 +1,501 @@ +/*===================================================================*/ +/* */ +/* K6502_RW.h : 6502 Reading/Writing Operation for NES */ +/* This file is included in K6502.cpp */ +/* */ +/* 2000/5/23 InfoNES Project ( based on pNesX ) */ +/* */ +/*===================================================================*/ + +#ifndef K6502_RW_H_INCLUDED +#define K6502_RW_H_INCLUDED + +/*-------------------------------------------------------------------*/ +/* Include files */ +/*-------------------------------------------------------------------*/ + +#include "InfoNES.h" +#include "InfoNES_System.h" +#include "InfoNES_pAPU.h" + +/*===================================================================*/ +/* */ +/* K6502_ReadZp() : Reading from the zero page */ +/* */ +/*===================================================================*/ +static inline BYTE K6502_ReadZp( BYTE byAddr ) +{ +/* + * Reading from the zero page + * + * Parameters + * BYTE byAddr (Read) + * An address inside the zero page + * + * Return values + * Read Data + */ + + return RAM[ byAddr ]; +} + +/*===================================================================*/ +/* */ +/* K6502_Read() : Reading operation */ +/* */ +/*===================================================================*/ +static inline BYTE K6502_Read( WORD wAddr ) +{ +/* + * Reading operation + * + * Parameters + * WORD wAddr (Read) + * Address to read + * + * Return values + * Read data + * + * Remarks + * 0x0000 - 0x1fff RAM ( 0x800 - 0x1fff is mirror of 0x0 - 0x7ff ) + * 0x2000 - 0x3fff PPU + * 0x4000 - 0x5fff Sound + * 0x6000 - 0x7fff SRAM ( Battery Backed ) + * 0x8000 - 0xffff ROM + * + */ + BYTE byRet; + + switch ( wAddr & 0xe000 ) + { + case 0x0000: /* RAM */ + return RAM[ wAddr & 0x7ff ]; + + case 0x2000: /* PPU */ + if ( ( wAddr & 0x7 ) == 0x7 ) /* PPU Memory */ + { + WORD addr = PPU_Addr & 0x3fff; + + // Set return value; + byRet = PPU_R7; + + // Increment PPU Address + PPU_Addr += PPU_Increment; + + // Read PPU Memory + PPU_R7 = PPUBANK[ addr >> 10 ][ addr & 0x3ff ]; + + return byRet; + } + else + if ( ( wAddr & 0x7 ) == 0x4 ) /* SPR_RAM I/O Register */ + { + return SPRRAM[ PPU_R3++ ]; + } + else + if ( ( wAddr & 0x7 ) == 0x2 ) /* PPU Status */ + { + // Set return value + byRet = PPU_R2; + +#if 0 + // Reset a V-Blank flag + PPU_R2 &= ~R2_IN_VBLANK; +#endif + + // Reset address latch + PPU_Latch_Flag = 0; + + // Make a Nametable 0 in V-Blank + if ( PPU_Scanline >= SCAN_VBLANK_START && !( PPU_R0 & R0_NMI_VB ) ) + { + PPU_R0 &= ~R0_NAME_ADDR; + PPU_NameTableBank = NAME_TABLE0; + } + return byRet; + } + else /* $2000, $2001, $2003, $2005, $2006 */ + { + return PPU_R7; + } + break; + + case 0x4000: /* Sound */ + if ( wAddr == 0x4014 ) + { + return wAddr & 0xff; + } + else + if ( wAddr == 0x4015 ) + { + // APU control + byRet = APU_Reg[ 0x4015 ]; + if ( ApuC1Atl > 0 ) byRet |= (1<<0); + if ( ApuC2Atl > 0 ) byRet |= (1<<1); + if ( !ApuC3Holdnote ) { + if ( ApuC3Atl > 0 ) byRet |= (1<<2); + } else { + if ( ApuC3Llc > 0 ) byRet |= (1<<2); + } + if ( ApuC4Atl > 0 ) byRet |= (1<<3); + + // FrameIRQ + APU_Reg[ 0x4015 ] &= ~0x40; + return byRet; + } + else + if ( wAddr == 0x4016 ) + { + // Set Joypad1 data + byRet = (BYTE)( ( PAD1_Latch >> PAD1_Bit ) & 1 ) | 0x40; + PAD1_Bit = ( PAD1_Bit == 23 ) ? 0 : ( PAD1_Bit + 1 ); + return byRet; + } + else + if ( wAddr == 0x4017 ) + { + // Set Joypad2 data + byRet = (BYTE)( ( PAD2_Latch >> PAD2_Bit ) & 1 ) | 0x40; + PAD2_Bit = ( PAD2_Bit == 23 ) ? 0 : ( PAD2_Bit + 1 ); + return byRet; + } + else + { + /* Return Mapper Register*/ + return MapperReadApu( wAddr ); + } + break; + // The other sound registers are not readable. + + case 0x6000: /* SRAM */ + if ( ROM_SRAM ) + { + return SRAM[ wAddr & 0x1fff ]; + } else { /* SRAM BANK */ + return SRAMBANK[ wAddr & 0x1fff ]; + } + + case 0x8000: /* ROM BANK 0 */ + return ROMBANK0[ wAddr & 0x1fff ]; + + case 0xa000: /* ROM BANK 1 */ + return ROMBANK1[ wAddr & 0x1fff ]; + + case 0xc000: /* ROM BANK 2 */ + return ROMBANK2[ wAddr & 0x1fff ]; + + case 0xe000: /* ROM BANK 3 */ + return ROMBANK3[ wAddr & 0x1fff ]; + } + + return ( wAddr >> 8 ); /* when a register is not readable the upper half + address is returned. */ +} + +/*===================================================================*/ +/* */ +/* K6502_Write() : Writing operation */ +/* */ +/*===================================================================*/ +static inline void K6502_Write( WORD wAddr, BYTE byData ) +{ +/* + * Writing operation + * + * Parameters + * WORD wAddr (Read) + * Address to write + * + * BYTE byData (Read) + * Data to write + * + * Remarks + * 0x0000 - 0x1fff RAM ( 0x800 - 0x1fff is mirror of 0x0 - 0x7ff ) + * 0x2000 - 0x3fff PPU + * 0x4000 - 0x5fff Sound + * 0x6000 - 0x7fff SRAM ( Battery Backed ) + * 0x8000 - 0xffff ROM + * + */ + + switch ( wAddr & 0xe000 ) + { + case 0x0000: /* RAM */ + RAM[ wAddr & 0x7ff ] = byData; + break; + + case 0x2000: /* PPU */ + switch ( wAddr & 0x7 ) + { + case 0: /* 0x2000 */ + PPU_R0 = byData; + PPU_Increment = ( PPU_R0 & R0_INC_ADDR ) ? 32 : 1; + PPU_NameTableBank = NAME_TABLE0 + ( PPU_R0 & R0_NAME_ADDR ); + PPU_BG_Base = ( PPU_R0 & R0_BG_ADDR ) ? ChrBuf + 256 * 64 : ChrBuf; + PPU_SP_Base = ( PPU_R0 & R0_SP_ADDR ) ? ChrBuf + 256 * 64 : ChrBuf; + PPU_SP_Height = ( PPU_R0 & R0_SP_SIZE ) ? 16 : 8; + + // Account for Loopy's scrolling discoveries + PPU_Temp = ( PPU_Temp & 0xF3FF ) | ( ( ( (WORD)byData ) & 0x0003 ) << 10 ); + break; + + case 1: /* 0x2001 */ + PPU_R1 = byData; + break; + + case 2: /* 0x2002 */ +#if 0 + PPU_R2 = byData; // 0x2002 is not writable +#endif + break; + + case 3: /* 0x2003 */ + // Sprite RAM Address + PPU_R3 = byData; + break; + + case 4: /* 0x2004 */ + // Write data to Sprite RAM + SPRRAM[ PPU_R3++ ] = byData; + break; + + case 5: /* 0x2005 */ + // Set Scroll Register + if ( PPU_Latch_Flag ) + { + // V-Scroll Register + PPU_Scr_V_Next = ( byData > 239 ) ? byData - 240 : byData; + if ( byData > 239 ) PPU_NameTableBank ^= NAME_TABLE_V_MASK; + PPU_Scr_V_Byte_Next = PPU_Scr_V_Next >> 3; + PPU_Scr_V_Bit_Next = PPU_Scr_V_Next & 7; + + // Added : more Loopy Stuff + PPU_Temp = ( PPU_Temp & 0xFC1F ) | ( ( ( (WORD)byData ) & 0xF8 ) << 2); + PPU_Temp = ( PPU_Temp & 0x8FFF ) | ( ( ( (WORD)byData ) & 0x07 ) << 12); + } + else + { + // H-Scroll Register + PPU_Scr_H_Next = byData; + PPU_Scr_H_Byte_Next = PPU_Scr_H_Next >> 3; + PPU_Scr_H_Bit_Next = PPU_Scr_H_Next & 7; + + // Added : more Loopy Stuff + PPU_Temp = ( PPU_Temp & 0xFFE0 ) | ( ( ( (WORD)byData ) & 0xF8 ) >> 3 ); + } + PPU_Latch_Flag ^= 1; + break; + + case 6: /* 0x2006 */ + // Set PPU Address + if ( PPU_Latch_Flag ) + { + /* Low */ +#if 0 + PPU_Addr = ( PPU_Addr & 0xff00 ) | ( (WORD)byData ); +#else + PPU_Temp = ( PPU_Temp & 0xFF00 ) | ( ( (WORD)byData ) & 0x00FF); + PPU_Addr = PPU_Temp; +#endif + if ( !( PPU_R2 & R2_IN_VBLANK ) ) { + InfoNES_SetupScr(); + } + } + else + { + /* High */ +#if 0 + PPU_Addr = ( PPU_Addr & 0x00ff ) | ( (WORD)( byData & 0x3f ) << 8 ); + InfoNES_SetupScr(); +#else + PPU_Temp = ( PPU_Temp & 0x00FF ) | ( ( ((WORD)byData) & 0x003F ) << 8 ); +#endif + } + PPU_Latch_Flag ^= 1; + break; + + case 7: /* 0x2007 */ + { + WORD addr = PPU_Addr; + + // Increment PPU Address + PPU_Addr += PPU_Increment; + addr &= 0x3fff; + + // Write to PPU Memory + if ( addr < 0x2000 && byVramWriteEnable ) + { + // Pattern Data + ChrBufUpdate |= ( 1 << ( addr >> 10 ) ); + PPUBANK[ addr >> 10 ][ addr & 0x3ff ] = byData; + } + else + if ( addr < 0x3f00 ) /* 0x2000 - 0x3eff */ + { + // Name Table and mirror + PPUBANK[ addr >> 10 ][ addr & 0x3ff ] = byData; + PPUBANK[ ( addr ^ 0x1000 ) >> 10 ][ addr & 0x3ff ] = byData; + } + else + if ( !( addr & 0xf ) ) /* 0x3f00 or 0x3f10 */ + { + // Palette mirror + PPURAM[ 0x3f10 ] = PPURAM[ 0x3f14 ] = PPURAM[ 0x3f18 ] = PPURAM[ 0x3f1c ] = + PPURAM[ 0x3f00 ] = PPURAM[ 0x3f04 ] = PPURAM[ 0x3f08 ] = PPURAM[ 0x3f0c ] = byData; + PalTable[ 0x00 ] = PalTable[ 0x04 ] = PalTable[ 0x08 ] = PalTable[ 0x0c ] = + PalTable[ 0x10 ] = PalTable[ 0x14 ] = PalTable[ 0x18 ] = PalTable[ 0x1c ] = NesPalette[ byData ]; + //PalTable[ 0x10 ] = PalTable[ 0x14 ] = PalTable[ 0x18 ] = PalTable[ 0x1c ] = NesPalette[ byData ] | 0x8000; + } + else + if ( addr & 3 ) + { + // Palette + PPURAM[ addr ] = byData; + PalTable[ addr & 0x1f ] = NesPalette[ byData ]; + } + } + break; + } + break; + + case 0x4000: /* Sound */ + switch ( wAddr & 0x1f ) + { + case 0x00: + case 0x01: + case 0x02: + case 0x03: + case 0x04: + case 0x05: + case 0x06: + case 0x07: + case 0x08: + case 0x09: + case 0x0a: + case 0x0b: + case 0x0c: + case 0x0d: + case 0x0e: + case 0x0f: + case 0x10: + case 0x11: + case 0x12: + case 0x13: + // Call Function corresponding to Sound Registers + if ( !APU_Mute ) + pAPUSoundRegs[ wAddr & 0x1f ]( wAddr, byData ); + break; + + case 0x14: /* 0x4014 */ + // Sprite DMA + switch ( byData >> 5 ) + { + case 0x0: /* RAM */ + InfoNES_MemoryCopy( SPRRAM, &RAM[ ( (WORD)byData << 8 ) & 0x7ff ], SPRRAM_SIZE ); + break; + + case 0x3: /* SRAM */ + InfoNES_MemoryCopy( SPRRAM, &SRAM[ ( (WORD)byData << 8 ) & 0x1fff ], SPRRAM_SIZE ); + break; + + case 0x4: /* ROM BANK 0 */ + InfoNES_MemoryCopy( SPRRAM, &ROMBANK0[ ( (WORD)byData << 8 ) & 0x1fff ], SPRRAM_SIZE ); + break; + + case 0x5: /* ROM BANK 1 */ + InfoNES_MemoryCopy( SPRRAM, &ROMBANK1[ ( (WORD)byData << 8 ) & 0x1fff ], SPRRAM_SIZE ); + break; + + case 0x6: /* ROM BANK 2 */ + InfoNES_MemoryCopy( SPRRAM, &ROMBANK2[ ( (WORD)byData << 8 ) & 0x1fff ], SPRRAM_SIZE ); + break; + + case 0x7: /* ROM BANK 3 */ + InfoNES_MemoryCopy( SPRRAM, &ROMBANK3[ ( (WORD)byData << 8 ) & 0x1fff ], SPRRAM_SIZE ); + break; + } + break; + + case 0x15: /* 0x4015 */ + InfoNES_pAPUWriteControl( wAddr, byData ); +#if 0 + /* Unknown */ + if ( byData & 0x10 ) + { + byData &= ~0x80; + } +#endif + break; + + case 0x16: /* 0x4016 */ + // For VS-Unisystem + MapperApu( wAddr, byData ); + // Reset joypad + if ( !( APU_Reg[ 0x16 ] & 1 ) && ( byData & 1 ) ) + { + PAD1_Bit = 0; + PAD2_Bit = 0; + } + break; + + case 0x17: /* 0x4017 */ + // Frame IRQ + FrameStep = 0; + if ( !( byData & 0xc0 ) ) + { + FrameIRQ_Enable = 1; + } else { + FrameIRQ_Enable = 0; + } + break; + } + + if ( wAddr <= 0x4017 ) + { + /* Write to APU Register */ + APU_Reg[ wAddr & 0x1f ] = byData; + } + else + { + /* Write to APU */ + MapperApu( wAddr, byData ); + } + break; + + case 0x6000: /* SRAM */ + SRAM[ wAddr & 0x1fff ] = byData; + + /* Write to SRAM, when no SRAM */ + if ( !ROM_SRAM ) + { + MapperSram( wAddr, byData ); + } + break; + + case 0x8000: /* ROM BANK 0 */ + case 0xa000: /* ROM BANK 1 */ + case 0xc000: /* ROM BANK 2 */ + case 0xe000: /* ROM BANK 3 */ + // Write to Mapper + MapperWrite( wAddr, byData ); + break; + } +} + +// Reading/Writing operation (WORD version) +static inline WORD K6502_ReadW( WORD wAddr ){ return K6502_Read( wAddr ) | (WORD)K6502_Read( wAddr + 1 ) << 8; }; +static inline void K6502_WriteW( WORD wAddr, WORD wData ){ K6502_Write( wAddr, wData & 0xff ); K6502_Write( wAddr + 1, wData >> 8 ); }; +static inline WORD K6502_ReadZpW( BYTE byAddr ){ return K6502_ReadZp( byAddr ) | ( K6502_ReadZp( byAddr + 1 ) << 8 ); }; + +// 6502's indirect absolute jmp(opcode: 6C) has a bug (added at 01/08/15 ) +static inline WORD K6502_ReadW2( WORD wAddr ) +{ + if ( 0x00ff == ( wAddr & 0x00ff ) ) + { + return K6502_Read( wAddr ) | (WORD)K6502_Read( wAddr - 0x00ff ) << 8; + } else { + return K6502_Read( wAddr ) | (WORD)K6502_Read( wAddr + 1 ) << 8; + } +} + +#endif /* !K6502_RW_H_INCLUDED */ diff --git a/apps/plugins/infones/LICENSE b/apps/plugins/infones/LICENSE new file mode 100644 index 0000000..32d0e60 --- /dev/null +++ b/apps/plugins/infones/LICENSE @@ -0,0 +1,340 @@ + GNU GENERAL PUBLIC LICENSE + Version 2, June 1991 + + Copyright (C) 1989, 1991 Free Software Foundation, Inc. + 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it is not allowed. + + Preamble + + The licenses for most software are designed to take away your +freedom to share and change it. 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It is safest +to attach them to the start of each source file to most effectively +convey the exclusion of warranty; and each file should have at least +the "copyright" line and a pointer to where the full notice is found. + + <one line to give the program's name and a brief idea of what it does.> + Copyright (C) 19yy <name of author> + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + + +Also add information on how to contact you by electronic and paper mail. + +If the program is interactive, make it output a short notice like this +when it starts in an interactive mode: + + Gnomovision version 69, Copyright (C) 19yy name of author + Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'. + This is free software, and you are welcome to redistribute it + under certain conditions; type `show c' for details. + +The hypothetical commands `show w' and `show c' should show the appropriate +parts of the General Public License. Of course, the commands you use may +be called something other than `show w' and `show c'; they could even be +mouse-clicks or menu items--whatever suits your program. + +You should also get your employer (if you work as a programmer) or your +school, if any, to sign a "copyright disclaimer" for the program, if +necessary. Here is a sample; alter the names: + + Yoyodyne, Inc., hereby disclaims all copyright interest in the program + `Gnomovision' (which makes passes at compilers) written by James Hacker. + + <signature of Ty Coon>, 1 April 1989 + Ty Coon, President of Vice + +This General Public License does not permit incorporating your program into +proprietary programs. If your program is a subroutine library, you may +consider it more useful to permit linking proprietary applications with the +library. If this is what you want to do, use the GNU Library General +Public License instead of this License. diff --git a/apps/plugins/infones/README b/apps/plugins/infones/README new file mode 100644 index 0000000..eaa1797 --- /dev/null +++ b/apps/plugins/infones/README @@ -0,0 +1,2 @@ +This is a port of InfoNES to Rockbox to play NES games. It is licensed under GPLv2. +The original can be found at "http://www.geocities.co.jp/SiliconValley/5604/infones/". diff --git a/apps/plugins/infones/SOURCES b/apps/plugins/infones/SOURCES new file mode 100644 index 0000000..2c1ad42 --- /dev/null +++ b/apps/plugins/infones/SOURCES @@ -0,0 +1,5 @@ +InfoNES_System_Rockbox.c +InfoNES.c +K6502.c +InfoNES_Mapper.c +InfoNES_pAPU.c diff --git a/apps/plugins/infones/infones.make b/apps/plugins/infones/infones.make new file mode 100644 index 0000000..911575f --- /dev/null +++ b/apps/plugins/infones/infones.make @@ -0,0 +1,38 @@ +# __________ __ ___. +# Open \______ \ ____ ____ | | _\_ |__ _______ ___ +# Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / +# Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < +# Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ +# \/ \/ \/ \/ \/ +# $Id: $ +# + +INFONESSRCDIR := $(APPSDIR)/plugins/infones +INFONESBUILDDIR := $(BUILDDIR)/apps/plugins/infones + +ROCKS += $(INFONESBUILDDIR)/infones.rock + +INFONES_SRC := $(call preprocess, $(INFONESSRCDIR)/SOURCES) +INFONES_OBJ := $(call c2obj, $(INFONES_SRC)) + +# add source files to OTHER_SRC to get automatic dependencies +OTHER_SRC += $(INFONES_SRC) + +INFONESCFLAGS += $(PLUGINFLAGS) -O3 -w + +# new rule needed to use extra compile flags +$(INFONESBUILDDIR)/%.o: $(INFONESSRCDIR)/%.c + $(SILENT)mkdir -p $(dir $@) + $(call PRINTS,CC $(subst $(ROOTDIR)/,,$<))$(CC) $(INFONESCFLAGS) -c $< -o $@ + +$(INFONESBUILDDIR)/infones.rock: $(INFONES_OBJ) + $(call PRINTS,LD $(@F)) + $(SILENT)$(CC) $(PLUGINFLAGS) -o $*.elf \ + $(filter %.o, $^) \ + $(filter %.a, $^) \ + -lgcc $(PLUGINLDFLAGS) -Wl,-Map,$(basename $@).map +ifdef SIMVER + $(SILENT)cp $*.elf $@ +else + $(SILENT)$(OC) -O binary $*.elf $@ +endif diff --git a/apps/plugins/infones/keymaps.h b/apps/plugins/infones/keymaps.h new file mode 100644 index 0000000..cb8ec66 --- /dev/null +++ b/apps/plugins/infones/keymaps.h @@ -0,0 +1,208 @@ +#ifndef _INFONES_KEYMAPS_H +#define _INFONES_KEYMAPS_H +#endif + +/* Keymaps copied from Rockboy */ + +#include <plugin.h> + +#ifdef HAVE_TOUCHSCREEN +#define NES_BUTTON_LEFT BUTTON_MIDLEFT +#define NES_BUTTON_RIGHT BUTTON_MIDRIGHT +#else +#define NES_BUTTON_LEFT BUTTON_LEFT +#define NES_BUTTON_RIGHT BUTTON_RIGHT +#endif + +#ifdef HAVE_TOUCHSCREEN +#define NES_BUTTON_UP BUTTON_TOPMIDDLE +#define NES_BUTTON_DOWN BUTTON_BOTTOMMIDDLE +#define NES_BUTTON_START BUTTON_TOPRIGHT +#define NES_BUTTON_SELECT BUTTON_CENTER +#if CONFIG_KEYPAD != COWOND2_PAD +#define NES_BUTTON_A BUTTON_BOTTOMLEFT +#define NES_BUTTON_B BUTTON_BOTTOMRIGHT +#define NES_BUTTON_MENU BUTTON_TOPLEFT +#endif +#endif + +#if CONFIG_KEYPAD == IRIVER_H100_PAD + +#define NES_BUTTON_UP BUTTON_UP +#define NES_BUTTON_DOWN BUTTON_DOWN +#define NES_BUTTON_A BUTTON_ON +#define NES_BUTTON_B BUTTON_OFF +#define NES_BUTTON_START BUTTON_REC +#define NES_BUTTON_SELECT BUTTON_SELECT +#define NES_BUTTON_MENU BUTTON_MODE + +#elif CONFIG_KEYPAD == IRIVER_H300_PAD + +#define NES_BUTTON_UP BUTTON_UP +#define NES_BUTTON_DOWN BUTTON_DOWN +#define NES_BUTTON_A BUTTON_REC +#define NES_BUTTON_B BUTTON_MODE +#define NES_BUTTON_START BUTTON_ON +#define NES_BUTTON_SELECT BUTTON_SELECT +#define NES_BUTTON_MENU BUTTON_OFF + +#elif CONFIG_KEYPAD == RECORDER_PAD + +#define NES_BUTTON_UP BUTTON_UP +#define NES_BUTTON_DOWN BUTTON_DOWN +#define NES_BUTTON_A BUTTON_F1 +#define NES_BUTTON_B BUTTON_F2 +#define NES_BUTTON_START BUTTON_F3 +#define NES_BUTTON_SELECT BUTTON_PLAY +#define NES_BUTTON_MENU BUTTON_OFF + +#elif CONFIG_KEYPAD == IPOD_4G_PAD + +#define NES_BUTTON_UP BUTTON_NONE +#define NES_BUTTON_DOWN BUTTON_PLAY +#define NES_BUTTON_A BUTTON_SELECT +#define NES_BUTTON_B BUTTON_NONE +#define NES_BUTTON_START (BUTTON_SELECT | BUTTON_PLAY) +#define NES_BUTTON_SELECT BUTTON_NONE +#define NES_BUTTON_MENU BUTTON_MENU + +#elif CONFIG_KEYPAD == IRIVER_IFP7XX_PAD + +#define NES_BUTTON_UP BUTTON_UP +#define NES_BUTTON_DOWN BUTTON_DOWN +#define NES_BUTTON_A BUTTON_PLAY +#define NES_BUTTON_B BUTTON_EQ +#define NES_BUTTON_START BUTTON_MODE +#define NES_BUTTON_SELECT (BUTTON_SELECT | BUTTON_REL) +#define NES_BUTTON_MENU (BUTTON_SELECT | BUTTON_REPEAT) + +#elif CONFIG_KEYPAD == GIGABEAT_PAD + +#define NES_BUTTON_UP BUTTON_UP +#define NES_BUTTON_DOWN BUTTON_DOWN +#define NES_BUTTON_A BUTTON_VOL_UP +#define NES_BUTTON_B BUTTON_VOL_DOWN +#define NES_BUTTON_START BUTTON_A +#define NES_BUTTON_SELECT BUTTON_SELECT +#define NES_BUTTON_MENU BUTTON_MENU + +#elif CONFIG_KEYPAD == SANSA_E200_PAD + +#define INFONES_SCROLLWHEEL +#define SCROLL_CC BUTTON_SCROLL_BACK +#define SCROLL_CW BUTTON_SCROLL_FWD +#define NES_BUTTON_UP BUTTON_UP +#define NES_BUTTON_DOWN BUTTON_DOWN +#define NES_BUTTON_A BUTTON_SELECT +#define NES_BUTTON_B BUTTON_SCROLL_BACK +#define NES_BUTTON_START BUTTON_SCROLL_FWD +#define NES_BUTTON_SELECT BUTTON_REC +#define NES_BUTTON_MENU BUTTON_POWER + +#elif CONFIG_KEYPAD == SANSA_FUZE_PAD + +#define INFONES_SCROLLWHEEL +#define SCROLL_CC BUTTON_SCROLL_BACK +#define SCROLL_CW BUTTON_SCROLL_FWD +#define NES_BUTTON_UP BUTTON_UP +#define NES_BUTTON_DOWN BUTTON_DOWN +#define NES_BUTTON_A BUTTON_SELECT +#define NES_BUTTON_B BUTTON_HOME +#define NES_BUTTON_START BUTTON_SCROLL_BACK +#define NES_BUTTON_SELECT BUTTON_SCROLL_FWD +#define NES_BUTTON_MENU BUTTON_POWER + +#elif CONFIG_KEYPAD == SANSA_FUZEPLUS_PAD + +#define NES_BUTTON_UP BUTTON_UP +#define NES_BUTTON_DOWN BUTTON_DOWN +#define NES_BUTTON_A BUTTON_VOL_UP +#define NES_BUTTON_B BUTTON_VOL_DOWN +#define NES_BUTTON_START BUTTON_PLAYPAUSE +#define NES_BUTTON_SELECT BUTTON_BACK +#define NES_BUTTON_MENU BUTTON_POWER + +#elif CONFIG_KEYPAD == SANSA_C200_PAD + +#define NES_BUTTON_UP BUTTON_UP +#define NES_BUTTON_DOWN BUTTON_DOWN +#define NES_BUTTON_A BUTTON_SELECT +#define NES_BUTTON_B BUTTON_REC +#define NES_BUTTON_START BUTTON_VOL_DOWN +#define NES_BUTTON_SELECT BUTTON_VOL_UP +#define NES_BUTTON_MENU BUTTON_POWER + +#elif CONFIG_KEYPAD == IAUDIO_X5M5_PAD + +#define NES_BUTTON_UP BUTTON_UP +#define NES_BUTTON_DOWN BUTTON_DOWN +#define NES_BUTTON_A BUTTON_PLAY +#define NES_BUTTON_B BUTTON_REC +#define NES_BUTTON_START BUTTON_SELECT +#define NES_BUTTON_SELECT BUTTON_NONE +#define NES_BUTTON_MENU BUTTON_POWER + +#elif CONFIG_KEYPAD == IRIVER_H10_PAD + +#define NES_BUTTON_UP BUTTON_SCROLL_UP +#define NES_BUTTON_DOWN BUTTON_SCROLL_DOWN +#define NES_BUTTON_A BUTTON_PLAY +#define NES_BUTTON_B BUTTON_FF +#define NES_BUTTON_START BUTTON_REW +#define NES_BUTTON_SELECT BUTTON_NONE +#define NES_BUTTON_MENU BUTTON_POWER + +#elif CONFIG_KEYPAD == MROBE500_PAD + +#define NES_BUTTON_UP BUTTON_RC_PLAY +#define NES_BUTTON_DOWN BUTTON_RC_DOWN +#define NES_BUTTON_LEFT BUTTON_RC_REW +#define NES_BUTTON_RIGHT BUTTON_RC_FF +#define NES_BUTTON_A BUTTON_RC_VOL_DOWN +#define NES_BUTTON_B BUTTON_RC_VOL_UP +#define NES_BUTTON_START BUTTON_RC_HEART +#define NES_BUTTON_SELECT BUTTON_RC_MODE +#define NES_BUTTON_MENU BUTTON_POWER + +#elif CONFIG_KEYPAD == COWOND2_PAD + +#define NES_BUTTON_A BUTTON_PLUS +#define NES_BUTTON_B BUTTON_MINUS +#define NES_BUTTON_MENU BUTTON_MENU + +#elif CONFIG_KEYPAD == GIGABEAT_S_PAD +#define NES_BUTTON_UP BUTTON_UP +#define NES_BUTTON_DOWN BUTTON_DOWN +#define NES_BUTTON_A BUTTON_VOL_UP +#define NES_BUTTON_B BUTTON_VOL_DOWN +#define NES_BUTTON_START BUTTON_PLAY +#define NES_BUTTON_SELECT BUTTON_SELECT +#define NES_BUTTON_MENU BUTTON_MENU + +#elif CONFIG_KEYPAD == CREATIVEZVM_PAD +#define NES_BUTTON_UP BUTTON_UP +#define NES_BUTTON_DOWN BUTTON_DOWN +#define NES_BUTTON_A BUTTON_CUSTOM +#define NES_BUTTON_B BUTTON_PLAY +#define NES_BUTTON_START BUTTON_BACK +#define NES_BUTTON_SELECT BUTTON_SELECT +#define NES_BUTTON_MENU BUTTON_MENU + +#elif CONFIG_KEYPAD == PHILIPS_HDD1630_PAD + +#define NES_BUTTON_UP BUTTON_UP +#define NES_BUTTON_DOWN BUTTON_DOWN +#define NES_BUTTON_A BUTTON_VOL_UP +#define NES_BUTTON_B BUTTON_VOL_DOWN +#define NES_BUTTON_START BUTTON_VIEW +#define NES_BUTTON_SELECT BUTTON_SELECT +#define NES_BUTTON_MENU BUTTON_MENU + +#elif CONFIG_KEYPAD == ONDAVX747_PAD +#define NES_BUTTON_A BUTTON_VOL_UP +#define NES_BUTTON_B BUTTON_VOL_DOWN +#define NES_BUTTON_MENU BUTTON_MENU + +#else +#error No keymap defined! +#endif diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_000.c b/apps/plugins/infones/mapper/InfoNES_Mapper_000.c new file mode 100644 index 0000000..32d924f --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_000.c @@ -0,0 +1,173 @@ +/*===================================================================*/ +/* */ +/* Mapper 0 */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 0 */ +/*-------------------------------------------------------------------*/ +void Map0_Init() +{ + int nPage; + /* Initialize Mapper */ + MapperInit = Map0_Init; + + /* Write to Mapper */ + MapperWrite = Map0_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + if ( NesHeader.byRomSize > 1 ) + { + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + } + else if ( NesHeader.byRomSize > 0 ) + { + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 0 ); + ROMBANK3 = ROMPAGE( 1 ); + } else { + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 0 ); + ROMBANK2 = ROMPAGE( 0 ); + ROMBANK3 = ROMPAGE( 0 ); + } + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 0 Write Function */ +/*-------------------------------------------------------------------*/ +void Map0_Write( WORD wAddr, BYTE byData ) +{ +/* + * Dummy Write to Mapper + * + */ +} + +/*-------------------------------------------------------------------*/ +/* Mapper 0 Write to SRAM Function */ +/*-------------------------------------------------------------------*/ +void Map0_Sram( WORD wAddr, BYTE byData ) +{ +/* + * Dummy Write to Sram + * + */ +} + +/*-------------------------------------------------------------------*/ +/* Mapper 0 Write to APU Function */ +/*-------------------------------------------------------------------*/ +void Map0_Apu( WORD wAddr, BYTE byData ) +{ +/* + * Dummy Write to Apu + * + */ +} + +/*-------------------------------------------------------------------*/ +/* Mapper 0 Read from APU Function */ +/*-------------------------------------------------------------------*/ +BYTE Map0_ReadApu( WORD wAddr ) +{ +/* + * Dummy Read from Apu + * + */ + return ( wAddr >> 8 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 0 V-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map0_VSync() +{ +/* + * Dummy Callback at VSync + * + */ +} + +/*-------------------------------------------------------------------*/ +/* Mapper 0 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map0_HSync() +{ +/* + * Dummy Callback at HSync + * + */ +#if 0 + // Frame IRQ + FrameStep += STEP_PER_SCANLINE; + if ( FrameStep > STEP_PER_FRAME && FrameIRQ_Enable ) + { + FrameStep %= STEP_PER_FRAME; + IRQ_REQ; + APU_Reg[ 0x4015 ] |= 0x40; + } +#endif +} + +/*-------------------------------------------------------------------*/ +/* Mapper 0 PPU Function */ +/*-------------------------------------------------------------------*/ +void Map0_PPU( WORD wAddr ) +{ +/* + * Dummy Callback at PPU + * + */ +} + +/*-------------------------------------------------------------------*/ +/* Mapper 0 Rendering Screen Function */ +/*-------------------------------------------------------------------*/ +void Map0_RenderScreen( BYTE byMode ) +{ +/* + * Dummy Callback at Rendering Screen + * + */ +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_001.c b/apps/plugins/infones/mapper/InfoNES_Mapper_001.c new file mode 100644 index 0000000..d0bba61 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_001.c @@ -0,0 +1,373 @@ +/*===================================================================*/ +/* */ +/* Mapper 1 */ +/* */ +/*===================================================================*/ + +BYTE Map1_Regs[ 4 ]; +DWORD Map1_Cnt; +BYTE Map1_Latch; +WORD Map1_Last_Write_Addr; + +enum Map1_Size_t +{ + Map1_SMALL, + Map1_512K, + Map1_1024K +}; + +/*Map1_Size_t Map1_Size; +enum Map1_Size +{ + Map1_SMALL, + Map1_512K, + Map1_1024K + +}*/ +enum Map1_Size_t Map1_Size; + +DWORD Map1_256K_base; +DWORD Map1_swap; + +// these are the 4 ROM banks currently selected +DWORD Map1_bank1; +DWORD Map1_bank2; +DWORD Map1_bank3; +DWORD Map1_bank4; + +DWORD Map1_HI1; +DWORD Map1_HI2; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 1 */ +/*-------------------------------------------------------------------*/ +void Map1_Init() +{ + DWORD size_in_K; + + /* Initialize Mapper */ + MapperInit = Map1_Init; + + /* Write to Mapper */ + MapperWrite = Map1_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Initialize State Registers */ + Map1_Cnt = 0; + Map1_Latch = 0x00; + + Map1_Regs[ 0 ] = 0x0c; + Map1_Regs[ 1 ] = 0x00; + Map1_Regs[ 2 ] = 0x00; + Map1_Regs[ 3 ] = 0x00; + + size_in_K = ( NesHeader.byRomSize << 1 ) * 8; + + if ( size_in_K == 1024 ) + { + Map1_Size = Map1_1024K; + } + else if(size_in_K == 512) + { + Map1_Size = Map1_512K; + } + else + { + Map1_Size = Map1_SMALL; + } + + Map1_256K_base = 0; // use first 256K + Map1_swap = 0; + + if( Map1_Size == Map1_SMALL ) + { + // set two high pages to last two banks + Map1_HI1 = ( NesHeader.byRomSize << 1 ) - 2; + Map1_HI2 = ( NesHeader.byRomSize << 1 ) - 1; + } + else + { + // set two high pages to last two banks of current 256K region + Map1_HI1 = ( 256 / 8 ) - 2; + Map1_HI2 = ( 256 / 8 ) - 1; + } + + // set CPU bank pointers + Map1_bank1 = 0; + Map1_bank2 = 1; + Map1_bank3 = Map1_HI1; + Map1_bank4 = Map1_HI2; + + /* Set ROM Banks */ + Map1_set_ROM_banks(); + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +void Map1_set_ROM_banks() +{ + ROMBANK0 = ROMPAGE( ( (Map1_256K_base << 5) + (Map1_bank1 & ((256/8)-1)) ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE( ( (Map1_256K_base << 5) + (Map1_bank2 & ((256/8)-1)) ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMPAGE( ( (Map1_256K_base << 5) + (Map1_bank3 & ((256/8)-1)) ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK3 = ROMPAGE( ( (Map1_256K_base << 5) + (Map1_bank4 & ((256/8)-1)) ) % ( NesHeader.byRomSize << 1 ) ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 1 Write Function */ +/*-------------------------------------------------------------------*/ +void Map1_Write( WORD wAddr, BYTE byData ) +{ +/* + * MMC1 + */ + DWORD dwRegNum; + + // if write is to a different reg, reset + if( ( wAddr & 0x6000 ) != ( Map1_Last_Write_Addr & 0x6000 ) ) + { + Map1_Cnt = 0; + Map1_Latch = 0x00; + } + Map1_Last_Write_Addr = wAddr; + + // if bit 7 set, reset and return + if ( byData & 0x80 ) + { + Map1_Cnt = 0; + Map1_Latch = 0x00; + return; + } + + if ( byData & 0x01 ) Map1_Latch |= ( 1 << Map1_Cnt ); + Map1_Cnt++; + if( Map1_Cnt < 5 ) return; + + dwRegNum = ( wAddr & 0x7FFF ) >> 13; + Map1_Regs[ dwRegNum ] = Map1_Latch; + + Map1_Cnt = 0; + Map1_Latch = 0x00; + + switch( dwRegNum ) + { + case 0: + { + // set mirroring + if( Map1_Regs[0] & 0x02 ) + { + if( Map1_Regs[0] & 0x01 ) + { + InfoNES_Mirroring( 0 ); + } + else + { + InfoNES_Mirroring( 1 ); + } + } + else + { + // one-screen mirroring + if( Map1_Regs[0] & 0x01 ) + { + InfoNES_Mirroring( 2 ); + } + else + { + InfoNES_Mirroring( 3 ); + } + } + } + break; + + case 1: + { + BYTE byBankNum = Map1_Regs[1]; + + if ( Map1_Size == Map1_1024K ) + { + if ( Map1_Regs[0] & 0x10 ) + { + if ( Map1_swap ) + { + Map1_256K_base = (Map1_Regs[1] & 0x10) >> 4; + if(Map1_Regs[0] & 0x08) + { + Map1_256K_base |= ((Map1_Regs[2] & 0x10) >> 3); + } + Map1_set_ROM_banks(); + Map1_swap = 0; + } + else + { + Map1_swap = 1; + } + } + else + { + // use 1st or 4th 256K banks + Map1_256K_base = ( Map1_Regs[1] & 0x10 ) ? 3 : 0; + Map1_set_ROM_banks(); + } + } + else if((Map1_Size == Map1_512K) && (!NesHeader.byVRomSize)) + { + Map1_256K_base = (Map1_Regs[1] & 0x10) >> 4; + Map1_set_ROM_banks(); + } + else if ( NesHeader.byVRomSize ) + { + // set VROM bank at $0000 + if ( Map1_Regs[0] & 0x10 ) + { + // swap 4K + byBankNum <<= 2; + PPUBANK[ 0 ] = VROMPAGE( (byBankNum+0) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 1 ] = VROMPAGE( (byBankNum+1) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 2 ] = VROMPAGE( (byBankNum+2) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 3 ] = VROMPAGE( (byBankNum+3) % (NesHeader.byVRomSize << 3) ); + InfoNES_SetupChr(); + } + else + { + // swap 8K + byBankNum <<= 2; + PPUBANK[ 0 ] = VROMPAGE( (byBankNum+0) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 1 ] = VROMPAGE( (byBankNum+1) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 2 ] = VROMPAGE( (byBankNum+2) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 3 ] = VROMPAGE( (byBankNum+3) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 4 ] = VROMPAGE( (byBankNum+4) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 5 ] = VROMPAGE( (byBankNum+5) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 6 ] = VROMPAGE( (byBankNum+6) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 7 ] = VROMPAGE( (byBankNum+7) % (NesHeader.byVRomSize << 3) ); + InfoNES_SetupChr(); + } + } + } + break; + + case 2: + { + BYTE byBankNum = Map1_Regs[2]; + + if((Map1_Size == Map1_1024K) && (Map1_Regs[0] & 0x08)) + { + if(Map1_swap) + { + Map1_256K_base = (Map1_Regs[1] & 0x10) >> 4; + Map1_256K_base |= ((Map1_Regs[2] & 0x10) >> 3); + Map1_set_ROM_banks(); + Map1_swap = 0; + } + else + { + Map1_swap = 1; + } + } + + if(!NesHeader.byVRomSize) + { + if ( Map1_Regs[ 0 ] & 0x10 ) + { + byBankNum <<= 2; +#if 0 + PPUBANK[ 4 ] = VRAMPAGE0( byBankNum+0 ); + PPUBANK[ 5 ] = VRAMPAGE0( byBankNum+1 ); + PPUBANK[ 6 ] = VRAMPAGE0( byBankNum+2 ); + PPUBANK[ 7 ] = VRAMPAGE0( byBankNum+3 ); +#else + PPUBANK[ 4 ] = CRAMPAGE( byBankNum+0 ); + PPUBANK[ 5 ] = CRAMPAGE( byBankNum+1 ); + PPUBANK[ 6 ] = CRAMPAGE( byBankNum+2 ); + PPUBANK[ 7 ] = CRAMPAGE( byBankNum+3 ); +#endif + InfoNES_SetupChr(); + break; + } + } + + // set 4K VROM bank at $1000 + if(Map1_Regs[0] & 0x10) + { + // swap 4K + byBankNum <<= 2; + PPUBANK[ 4 ] = VROMPAGE( (byBankNum+0) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 5 ] = VROMPAGE( (byBankNum+1) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 6 ] = VROMPAGE( (byBankNum+2) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 7 ] = VROMPAGE( (byBankNum+3) % (NesHeader.byVRomSize << 3) ); + InfoNES_SetupChr(); + } + } + break; + + case 3: + { + BYTE byBankNum = Map1_Regs[3]; + + // set ROM bank + if ( Map1_Regs[0] & 0x08 ) + { + // 16K of ROM + byBankNum <<= 1; + + if ( Map1_Regs[0] & 0x04 ) + { + // 16K of ROM at $8000 + Map1_bank1 = byBankNum; + Map1_bank2 = byBankNum+1; + Map1_bank3 = Map1_HI1; + Map1_bank4 = Map1_HI2; + } + else + { + // 16K of ROM at $C000 + if(Map1_Size == Map1_SMALL) + { + Map1_bank1 = 0; + Map1_bank2 = 1; + Map1_bank3 = byBankNum; + Map1_bank4 = byBankNum+1; + } + } + } + else + { + // 32K of ROM at $8000 + byBankNum <<= 1; + + Map1_bank1 = byBankNum; + Map1_bank2 = byBankNum+1; + if(Map1_Size == Map1_SMALL) + { + Map1_bank3 = byBankNum+2; + Map1_bank4 = byBankNum+3; + } + } + Map1_set_ROM_banks(); + } + break; + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_002.c b/apps/plugins/infones/mapper/InfoNES_Mapper_002.c new file mode 100644 index 0000000..77c5352 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_002.c @@ -0,0 +1,63 @@ +/*===================================================================*/ +/* */ +/* Mapper 2 (UNROM) */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 2 */ +/*-------------------------------------------------------------------*/ +void Map2_Init() +{ + /* Initialize Mapper */ + MapperInit = Map2_Init; + + /* Write to Mapper */ + MapperWrite = Map2_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 2 Write Function */ +/*-------------------------------------------------------------------*/ +void Map2_Write( WORD wAddr, BYTE byData ) +{ + /* Set ROM Banks */ + byData %= NesHeader.byRomSize; + byData <<= 1; + + ROMBANK0 = ROMPAGE( byData ); + ROMBANK1 = ROMPAGE( byData + 1 ); +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_003.c b/apps/plugins/infones/mapper/InfoNES_Mapper_003.c new file mode 100644 index 0000000..d783204 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_003.c @@ -0,0 +1,94 @@ +/*===================================================================*/ +/* */ +/* Mapper 3 (VROM Switch) */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 3 */ +/*-------------------------------------------------------------------*/ +void Map3_Init() +{ + int nPage; + + /* Initialize Mapper */ + MapperInit = Map3_Init; + + /* Write to Mapper */ + MapperWrite = Map3_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + if ( ( NesHeader.byRomSize << 1 ) > 2 ) + { + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + } else { + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 0 ); + ROMBANK3 = ROMPAGE( 1 ); + } + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( nPage = 0; nPage < 8; ++nPage ) + { + PPUBANK[ nPage ] = VROMPAGE( nPage ); + } + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + /* "DragonQuest" doesn't run if IRQ isn't made to occur in CLI */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 3 Write Function */ +/*-------------------------------------------------------------------*/ +void Map3_Write( WORD wAddr, BYTE byData ) +{ + DWORD dwBase; + + /* Set PPU Banks */ + byData %= NesHeader.byVRomSize; + dwBase = ( (DWORD)byData ) << 3; + + PPUBANK[ 0 ] = VROMPAGE( dwBase + 0 ); + PPUBANK[ 1 ] = VROMPAGE( dwBase + 1 ); + PPUBANK[ 2 ] = VROMPAGE( dwBase + 2 ); + PPUBANK[ 3 ] = VROMPAGE( dwBase + 3 ); + PPUBANK[ 4 ] = VROMPAGE( dwBase + 4 ); + PPUBANK[ 5 ] = VROMPAGE( dwBase + 5 ); + PPUBANK[ 6 ] = VROMPAGE( dwBase + 6 ); + PPUBANK[ 7 ] = VROMPAGE( dwBase + 7 ); + + InfoNES_SetupChr(); +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_004.c b/apps/plugins/infones/mapper/InfoNES_Mapper_004.c new file mode 100644 index 0000000..92375b8 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_004.c @@ -0,0 +1,363 @@ +/*===================================================================*/ +/* */ +/* Mapper 4 (MMC3) */ +/* */ +/*===================================================================*/ + +BYTE Map4_Regs[ 8 ]; +DWORD Map4_Rom_Bank; +DWORD Map4_Prg0, Map4_Prg1; +DWORD Map4_Chr01, Map4_Chr23; +DWORD Map4_Chr4, Map4_Chr5, Map4_Chr6, Map4_Chr7; + +#define Map4_Chr_Swap() ( Map4_Regs[ 0 ] & 0x80 ) +#define Map4_Prg_Swap() ( Map4_Regs[ 0 ] & 0x40 ) + +BYTE Map4_IRQ_Enable; +BYTE Map4_IRQ_Cnt; +BYTE Map4_IRQ_Latch; +BYTE Map4_IRQ_Request; +BYTE Map4_IRQ_Present; +BYTE Map4_IRQ_Present_Vbl; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 4 */ +/*-------------------------------------------------------------------*/ +void Map4_Init() +{ + int nPage; + /* Initialize Mapper */ + MapperInit = Map4_Init; + + /* Write to Mapper */ + MapperWrite = Map4_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map4_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Initialize State Registers */ + for ( nPage = 0; nPage < 8; nPage++ ) + { + Map4_Regs[ nPage ] = 0x00; + } + + /* Set ROM Banks */ + Map4_Prg0 = 0; + Map4_Prg1 = 1; + Map4_Set_CPU_Banks(); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + Map4_Chr01 = 0; + Map4_Chr23 = 2; + Map4_Chr4 = 4; + Map4_Chr5 = 5; + Map4_Chr6 = 6; + Map4_Chr7 = 7; + Map4_Set_PPU_Banks(); + } else { + Map4_Chr01 = Map4_Chr23 = 0; + Map4_Chr4 = Map4_Chr5 = Map4_Chr6 = Map4_Chr7 = 0; + } + + /* Initialize IRQ Registers */ + Map4_IRQ_Enable = 0; + Map4_IRQ_Cnt = 0; + Map4_IRQ_Latch = 0; + Map4_IRQ_Request = 0; + Map4_IRQ_Present = 0; + Map4_IRQ_Present_Vbl = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 4 Write Function */ +/*-------------------------------------------------------------------*/ +void Map4_Write( WORD wAddr, BYTE byData ) +{ + DWORD dwBankNum; + + switch ( wAddr & 0xe001 ) + { + case 0x8000: + Map4_Regs[ 0 ] = byData; + Map4_Set_PPU_Banks(); + Map4_Set_CPU_Banks(); + break; + + case 0x8001: + Map4_Regs[ 1 ] = byData; + dwBankNum = Map4_Regs[ 1 ]; + + switch ( Map4_Regs[ 0 ] & 0x07 ) + { + /* Set PPU Banks */ + case 0x00: + if ( NesHeader.byVRomSize > 0 ) + { + dwBankNum &= 0xfe; + Map4_Chr01 = dwBankNum; + Map4_Set_PPU_Banks(); + } + break; + + case 0x01: + if ( NesHeader.byVRomSize > 0 ) + { + dwBankNum &= 0xfe; + Map4_Chr23 = dwBankNum; + Map4_Set_PPU_Banks(); + } + break; + + case 0x02: + if ( NesHeader.byVRomSize > 0 ) + { + Map4_Chr4 = dwBankNum; + Map4_Set_PPU_Banks(); + } + break; + + case 0x03: + if ( NesHeader.byVRomSize > 0 ) + { + Map4_Chr5 = dwBankNum; + Map4_Set_PPU_Banks(); + } + break; + + case 0x04: + if ( NesHeader.byVRomSize > 0 ) + { + Map4_Chr6 = dwBankNum; + Map4_Set_PPU_Banks(); + } + break; + + case 0x05: + if ( NesHeader.byVRomSize > 0 ) + { + Map4_Chr7 = dwBankNum; + Map4_Set_PPU_Banks(); + } + break; + + /* Set ROM Banks */ + case 0x06: + Map4_Prg0 = dwBankNum; + Map4_Set_CPU_Banks(); + break; + + case 0x07: + Map4_Prg1 = dwBankNum; + Map4_Set_CPU_Banks(); + break; + } + break; + + case 0xa000: + Map4_Regs[ 2 ] = byData; + + if ( !ROM_FourScr ) + { + if ( byData & 0x01 ) + { + InfoNES_Mirroring( 0 ); + } else { + InfoNES_Mirroring( 1 ); + } + } + break; + + case 0xa001: + Map4_Regs[ 3 ] = byData; + break; + + case 0xc000: + Map4_Regs[ 4 ] = byData; + Map4_IRQ_Latch = byData; + break; + + case 0xc001: + Map4_Regs[ 5 ] = byData; + if ( PPU_Scanline < 240 ) + { + Map4_IRQ_Cnt |= 0x80; + Map4_IRQ_Present = 0xff; + } else { + Map4_IRQ_Cnt |= 0x80; + Map4_IRQ_Present_Vbl = 0xff; + Map4_IRQ_Present = 0; + } + break; + + case 0xe000: + Map4_Regs[ 6 ] = byData; + Map4_IRQ_Enable = 0; + Map4_IRQ_Request = 0; + break; + + case 0xe001: + Map4_Regs[ 7 ] = byData; + Map4_IRQ_Enable = 1; + Map4_IRQ_Request = 0; + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 4 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map4_HSync() +{ +/* + * Callback at HSync + * + */ + if ( ( /* 0 <= PPU_Scanline && */ PPU_Scanline <= 239 ) && + ( PPU_R1 & R1_SHOW_SCR || PPU_R1 & R1_SHOW_SP ) ) + { + if( Map4_IRQ_Present_Vbl ) { + Map4_IRQ_Cnt = Map4_IRQ_Latch; + Map4_IRQ_Present_Vbl = 0; + } + if( Map4_IRQ_Present ) { + Map4_IRQ_Cnt = Map4_IRQ_Latch; + Map4_IRQ_Present = 0; + } else if( Map4_IRQ_Cnt > 0 ) { + Map4_IRQ_Cnt--; + } + + if( Map4_IRQ_Cnt == 0 ) { + if( Map4_IRQ_Enable ) { + Map4_IRQ_Request = 0xFF; + } + Map4_IRQ_Present = 0xFF; + } + } + if( Map4_IRQ_Request ) { + IRQ_REQ; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 4 Set CPU Banks Function */ +/*-------------------------------------------------------------------*/ +void Map4_Set_CPU_Banks() +{ + if ( Map4_Prg_Swap() ) + { + ROMBANK0 = ROMLASTPAGE( 1 ); + ROMBANK1 = ROMPAGE( Map4_Prg1 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMPAGE( Map4_Prg0 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK3 = ROMLASTPAGE( 0 ); + } else { + ROMBANK0 = ROMPAGE( Map4_Prg0 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE( Map4_Prg1 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 4 Set PPU Banks Function */ +/*-------------------------------------------------------------------*/ +void Map4_Set_PPU_Banks() +{ + if ( NesHeader.byVRomSize > 0 ) + { + if ( Map4_Chr_Swap() ) + { + PPUBANK[ 0 ] = VROMPAGE( Map4_Chr4 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( Map4_Chr5 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( Map4_Chr6 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( Map4_Chr7 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 4 ] = VROMPAGE( ( Map4_Chr01 + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( ( Map4_Chr01 + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE( ( Map4_Chr23 + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( ( Map4_Chr23 + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + } else { + PPUBANK[ 0 ] = VROMPAGE( ( Map4_Chr01 + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( ( Map4_Chr01 + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( ( Map4_Chr23 + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( ( Map4_Chr23 + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 4 ] = VROMPAGE( Map4_Chr4 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( Map4_Chr5 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE( Map4_Chr6 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( Map4_Chr7 % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + } + } + else + { + if ( Map4_Chr_Swap() ) + { +#if 0 + PPUBANK[ 0 ] = VRAMPAGE0( 0 ); + PPUBANK[ 1 ] = VRAMPAGE0( 1 ); + PPUBANK[ 2 ] = VRAMPAGE0( 2 ); + PPUBANK[ 3 ] = VRAMPAGE0( 3 ); + PPUBANK[ 4 ] = VRAMPAGE1( 0 ); + PPUBANK[ 5 ] = VRAMPAGE1( 1 ); + PPUBANK[ 6 ] = VRAMPAGE1( 2 ); + PPUBANK[ 7 ] = VRAMPAGE1( 3 ); +#else + PPUBANK[ 0 ] = CRAMPAGE( 0 ); + PPUBANK[ 1 ] = CRAMPAGE( 1 ); + PPUBANK[ 2 ] = CRAMPAGE( 2 ); + PPUBANK[ 3 ] = CRAMPAGE( 3 ); + PPUBANK[ 4 ] = CRAMPAGE( 4 ); + PPUBANK[ 5 ] = CRAMPAGE( 5 ); + PPUBANK[ 6 ] = CRAMPAGE( 6 ); + PPUBANK[ 7 ] = CRAMPAGE( 7 ); +#endif + InfoNES_SetupChr(); + } else { +#if 0 + PPUBANK[ 0 ] = VRAMPAGE1( 0 ); + PPUBANK[ 1 ] = VRAMPAGE1( 1 ); + PPUBANK[ 2 ] = VRAMPAGE1( 2 ); + PPUBANK[ 3 ] = VRAMPAGE1( 3 ); + PPUBANK[ 4 ] = VRAMPAGE0( 0 ); + PPUBANK[ 5 ] = VRAMPAGE0( 1 ); + PPUBANK[ 6 ] = VRAMPAGE0( 2 ); + PPUBANK[ 7 ] = VRAMPAGE0( 3 ); +#else + PPUBANK[ 0 ] = CRAMPAGE( 0 ); + PPUBANK[ 1 ] = CRAMPAGE( 1 ); + PPUBANK[ 2 ] = CRAMPAGE( 2 ); + PPUBANK[ 3 ] = CRAMPAGE( 3 ); + PPUBANK[ 4 ] = CRAMPAGE( 4 ); + PPUBANK[ 5 ] = CRAMPAGE( 5 ); + PPUBANK[ 6 ] = CRAMPAGE( 6 ); + PPUBANK[ 7 ] = CRAMPAGE( 7 ); +#endif + InfoNES_SetupChr(); + } + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_005.c b/apps/plugins/infones/mapper/InfoNES_Mapper_005.c new file mode 100644 index 0000000..054b0c1 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_005.c @@ -0,0 +1,541 @@ +/*===================================================================*/ +/* */ +/* Mapper 5 (MMC5) */ +/* */ +/*===================================================================*/ + +BYTE Map5_Wram[ 0x2000 * 8 ]; +BYTE Map5_Ex_Ram[ 0x400 ]; +BYTE Map5_Ex_Vram[ 0x400 ]; +BYTE Map5_Ex_Nam[ 0x400 ]; + +BYTE Map5_Prg_Reg[ 8 ]; +BYTE Map5_Wram_Reg[ 8 ]; +BYTE Map5_Chr_Reg[ 8 ][ 2 ]; + +BYTE Map5_IRQ_Enable; +BYTE Map5_IRQ_Status; +BYTE Map5_IRQ_Line; + +DWORD Map5_Value0; +DWORD Map5_Value1; + +BYTE Map5_Wram_Protect0; +BYTE Map5_Wram_Protect1; +BYTE Map5_Prg_Size; +BYTE Map5_Chr_Size; +BYTE Map5_Gfx_Mode; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 5 */ +/*-------------------------------------------------------------------*/ +void Map5_Init() +{ + int nPage; + BYTE byPage; + + /* Initialize Mapper */ + MapperInit = Map5_Init; + + /* Write to Mapper */ + MapperWrite = Map5_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map5_Apu; + + /* Read from APU */ + MapperReadApu = Map5_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map5_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map5_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMLASTPAGE( 0 ); + ROMBANK1 = ROMLASTPAGE( 0 ); + ROMBANK2 = ROMLASTPAGE( 0 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set PPU Banks */ + for ( nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + + /* Initialize State Registers */ + for ( nPage = 4; nPage < 8; ++nPage ) + { + Map5_Prg_Reg[ nPage ] = ( NesHeader.byRomSize << 1 ) - 1; + Map5_Wram_Reg[ nPage ] = 0xff; + } + Map5_Wram_Reg[ 3 ] = 0xff; + + for ( byPage = 4; byPage < 8; ++byPage ) + { + Map5_Chr_Reg[ byPage ][ 0 ] = byPage; + Map5_Chr_Reg[ byPage ][ 1 ] = ( byPage & 0x03 ) + 4; + } + + InfoNES_MemorySet( Map5_Wram, 0x00, sizeof( Map5_Wram ) ); + InfoNES_MemorySet( Map5_Ex_Ram, 0x00, sizeof( Map5_Ex_Ram ) ); + InfoNES_MemorySet( Map5_Ex_Vram, 0x00, sizeof( Map5_Ex_Vram ) ); + InfoNES_MemorySet( Map5_Ex_Nam, 0x00, sizeof( Map5_Ex_Nam ) ); + + Map5_Prg_Size = 3; + Map5_Wram_Protect0 = 0; + Map5_Wram_Protect1 = 0; + Map5_Chr_Size = 3; + Map5_Gfx_Mode = 0; + + Map5_IRQ_Enable = 0; + Map5_IRQ_Status = 0; + Map5_IRQ_Line = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 5 Read from APU Function */ +/*-------------------------------------------------------------------*/ +BYTE Map5_ReadApu( WORD wAddr ) +{ + BYTE byRet = (BYTE)( wAddr >> 8 ); + + switch ( wAddr ) + { + case 0x5204: + byRet = Map5_IRQ_Status; + Map5_IRQ_Status = 0; + break; + + case 0x5205: + byRet = (BYTE)( ( Map5_Value0 * Map5_Value1 ) & 0x00ff ); + break; + + case 0x5206: + byRet = (BYTE)( ( ( Map5_Value0 * Map5_Value1 ) & 0xff00 ) >> 8 ); + break; + + default: + if ( 0x5c00 <= wAddr && wAddr <= 0x5fff ) + { + byRet = Map5_Ex_Ram[ wAddr - 0x5c00 ]; + } + break; + } + return byRet; +} + +/*-------------------------------------------------------------------*/ +/* Mapper 5 Write to APU Function */ +/*-------------------------------------------------------------------*/ +void Map5_Apu( WORD wAddr, BYTE byData ) +{ + int nPage; + + switch ( wAddr ) + { + case 0x5100: + Map5_Prg_Size = byData & 0x03; + break; + + case 0x5101: + Map5_Chr_Size = byData & 0x03; + break; + + case 0x5102: + Map5_Wram_Protect0 = byData & 0x03; + break; + + case 0x5103: + Map5_Wram_Protect1 = byData & 0x03; + break; + + case 0x5104: + Map5_Gfx_Mode = byData & 0x03; + break; + + case 0x5105: + for ( nPage = 0; nPage < 4; nPage++ ) + { + BYTE byNamReg; + + byNamReg = byData & 0x03; + byData = byData >> 2; + + switch ( byNamReg ) + { + case 0: +#if 1 + PPUBANK[ nPage + 8 ] = VRAMPAGE( 0 ); +#else + PPUBANK[ nPage + 8 ] = CRAMPAGE( 8 ); +#endif + break; + case 1: +#if 1 + PPUBANK[ nPage + 8 ] = VRAMPAGE( 1 ); +#else + PPUBANK[ nPage + 8 ] = CRAMPAGE( 9 ); +#endif + break; + case 2: + PPUBANK[ nPage + 8 ] = Map5_Ex_Vram; + break; + case 3: + PPUBANK[ nPage + 8 ] = Map5_Ex_Nam; + break; + } + } + break; + + case 0x5106: + InfoNES_MemorySet( Map5_Ex_Nam, byData, 0x3c0 ); + break; + + case 0x5107: + byData &= 0x03; + byData = byData | ( byData << 2 ) | ( byData << 4 ) | ( byData << 6 ); + InfoNES_MemorySet( &( Map5_Ex_Nam[ 0x3c0 ] ), byData, 0x400 - 0x3c0 ); + break; + + case 0x5113: + Map5_Wram_Reg[ 3 ] = byData & 0x07; + SRAMBANK = Map5_ROMPAGE( byData & 0x07 ); + break; + + case 0x5114: + case 0x5115: + case 0x5116: + case 0x5117: + Map5_Prg_Reg[ wAddr & 0x07 ] = byData; + Map5_Sync_Prg_Banks(); + break; + + case 0x5120: + case 0x5121: + case 0x5122: + case 0x5123: + case 0x5124: + case 0x5125: + case 0x5126: + case 0x5127: + Map5_Chr_Reg[ wAddr & 0x07 ][ 0 ] = byData; + Map5_Sync_Prg_Banks(); + break; + + case 0x5128: + case 0x5129: + case 0x512a: + case 0x512b: + Map5_Chr_Reg[ ( wAddr & 0x03 ) + 0 ][ 1 ] = byData; + Map5_Chr_Reg[ ( wAddr & 0x03 ) + 4 ][ 1 ] = byData; + break; + + case 0x5200: + case 0x5201: + case 0x5202: + /* Nothing to do */ + break; + + case 0x5203: + if ( Map5_IRQ_Line >= 0x40 ) + { + Map5_IRQ_Line = byData; + } else { + Map5_IRQ_Line += byData; + } + break; + + case 0x5204: + Map5_IRQ_Enable = byData; + break; + + case 0x5205: + Map5_Value0 = byData; + break; + + case 0x5206: + Map5_Value1 = byData; + break; + + default: + if ( 0x5000 <= wAddr && wAddr <= 0x5015 ) + { + /* Extra Sound */ + } else + if ( 0x5c00 <= wAddr && wAddr <= 0x5fff ) + { + switch ( Map5_Gfx_Mode ) + { + case 0: + Map5_Ex_Vram[ wAddr - 0x5c00 ] = byData; + break; + case 2: + Map5_Ex_Ram[ wAddr - 0x5c00 ] = byData; + break; + } + } + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 5 Write to SRAM Function */ +/*-------------------------------------------------------------------*/ +void Map5_Sram( WORD wAddr, BYTE byData ) +{ + if ( Map5_Wram_Protect0 == 0x02 && Map5_Wram_Protect1 == 0x01 ) + { + if ( Map5_Wram_Reg[ 3 ] != 0xff ) + { + Map5_Wram[ 0x2000 * Map5_Wram_Reg[ 3 ] + ( wAddr - 0x6000) ] = byData; + } + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 5 Write Function */ +/*-------------------------------------------------------------------*/ +void Map5_Write( WORD wAddr, BYTE byData ) +{ + if ( Map5_Wram_Protect0 == 0x02 && Map5_Wram_Protect1 == 0x01 ) + { + switch ( wAddr & 0xe000 ) + { + case 0x8000: /* $8000-$9fff */ + if ( Map5_Wram_Reg[ 4 ] != 0xff ) + { + Map5_Wram[ 0x2000 * Map5_Wram_Reg[ 4 ] + ( wAddr - 0x8000) ] = byData; + } + break; + + case 0xa000: /* $a000-$bfff */ + if ( Map5_Wram_Reg[ 5 ] != 0xff ) + { + Map5_Wram[ 0x2000 * Map5_Wram_Reg[ 5 ] + ( wAddr - 0xa000) ] = byData; + } + break; + + case 0xc000: /* $c000-$dfff */ + if ( Map5_Wram_Reg[ 6 ] != 0xff ) + { + Map5_Wram[ 0x2000 * Map5_Wram_Reg[ 6 ] + ( wAddr - 0xc000) ] = byData; + } + break; + } + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 5 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map5_HSync() +{ + if ( PPU_Scanline <= 240 ) + { + if ( PPU_Scanline == Map5_IRQ_Line ) + { + Map5_IRQ_Status |= 0x80; + + if ( Map5_IRQ_Enable && Map5_IRQ_Line < 0xf0 ) + { + IRQ_REQ; + } + if ( Map5_IRQ_Line >= 0x40 ) + { + Map5_IRQ_Enable = 0; + } + } + } else { + Map5_IRQ_Status |= 0x40; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 5 Rendering Screen Function */ +/*-------------------------------------------------------------------*/ +void Map5_RenderScreen( BYTE byMode ) +{ + DWORD dwPage[ 8 ]; + + switch ( Map5_Chr_Size ) + { + case 0: + dwPage[ 7 ] = ( (DWORD)Map5_Chr_Reg[7][byMode] << 3 ) % ( NesHeader.byVRomSize << 3 ); + + PPUBANK[ 0 ] = VROMPAGE( dwPage[ 7 ] + 0 ); + PPUBANK[ 1 ] = VROMPAGE( dwPage[ 7 ] + 1 ); + PPUBANK[ 2 ] = VROMPAGE( dwPage[ 7 ] + 2 ); + PPUBANK[ 3 ] = VROMPAGE( dwPage[ 7 ] + 3 ); + PPUBANK[ 4 ] = VROMPAGE( dwPage[ 7 ] + 4 ); + PPUBANK[ 5 ] = VROMPAGE( dwPage[ 7 ] + 5 ); + PPUBANK[ 6 ] = VROMPAGE( dwPage[ 7 ] + 6 ); + PPUBANK[ 7 ] = VROMPAGE( dwPage[ 7 ] + 7 ); + InfoNES_SetupChr(); + break; + + case 1: + dwPage[ 3 ] = ( (DWORD)Map5_Chr_Reg[3][byMode] << 2 ) % ( NesHeader.byVRomSize << 3 ); + dwPage[ 7 ] = ( (DWORD)Map5_Chr_Reg[7][byMode] << 2 ) % ( NesHeader.byVRomSize << 3 ); + + PPUBANK[ 0 ] = VROMPAGE( dwPage[ 3 ] + 0 ); + PPUBANK[ 1 ] = VROMPAGE( dwPage[ 3 ] + 1 ); + PPUBANK[ 2 ] = VROMPAGE( dwPage[ 3 ] + 2 ); + PPUBANK[ 3 ] = VROMPAGE( dwPage[ 3 ] + 3 ); + PPUBANK[ 4 ] = VROMPAGE( dwPage[ 7 ] + 0 ); + PPUBANK[ 5 ] = VROMPAGE( dwPage[ 7 ] + 1 ); + PPUBANK[ 6 ] = VROMPAGE( dwPage[ 7 ] + 2 ); + PPUBANK[ 7 ] = VROMPAGE( dwPage[ 7 ] + 3 ); + InfoNES_SetupChr(); + break; + + case 2: + dwPage[ 1 ] = ( (DWORD)Map5_Chr_Reg[1][byMode] << 1 ) % ( NesHeader.byVRomSize << 3 ); + dwPage[ 3 ] = ( (DWORD)Map5_Chr_Reg[3][byMode] << 1 ) % ( NesHeader.byVRomSize << 3 ); + dwPage[ 5 ] = ( (DWORD)Map5_Chr_Reg[5][byMode] << 1 ) % ( NesHeader.byVRomSize << 3 ); + dwPage[ 7 ] = ( (DWORD)Map5_Chr_Reg[7][byMode] << 1 ) % ( NesHeader.byVRomSize << 3 ); + + PPUBANK[ 0 ] = VROMPAGE( dwPage[ 1 ] + 0 ); + PPUBANK[ 1 ] = VROMPAGE( dwPage[ 1 ] + 1 ); + PPUBANK[ 2 ] = VROMPAGE( dwPage[ 3 ] + 0 ); + PPUBANK[ 3 ] = VROMPAGE( dwPage[ 3 ] + 1 ); + PPUBANK[ 4 ] = VROMPAGE( dwPage[ 5 ] + 0 ); + PPUBANK[ 5 ] = VROMPAGE( dwPage[ 5 ] + 1 ); + PPUBANK[ 6 ] = VROMPAGE( dwPage[ 7 ] + 0 ); + PPUBANK[ 7 ] = VROMPAGE( dwPage[ 7 ] + 1 ); + InfoNES_SetupChr(); + break; + + default: + dwPage[ 0 ] = (DWORD)Map5_Chr_Reg[0][byMode] % ( NesHeader.byVRomSize << 3 ); + dwPage[ 1 ] = (DWORD)Map5_Chr_Reg[1][byMode] % ( NesHeader.byVRomSize << 3 ); + dwPage[ 2 ] = (DWORD)Map5_Chr_Reg[2][byMode] % ( NesHeader.byVRomSize << 3 ); + dwPage[ 3 ] = (DWORD)Map5_Chr_Reg[3][byMode] % ( NesHeader.byVRomSize << 3 ); + dwPage[ 4 ] = (DWORD)Map5_Chr_Reg[4][byMode] % ( NesHeader.byVRomSize << 3 ); + dwPage[ 5 ] = (DWORD)Map5_Chr_Reg[5][byMode] % ( NesHeader.byVRomSize << 3 ); + dwPage[ 6 ] = (DWORD)Map5_Chr_Reg[6][byMode] % ( NesHeader.byVRomSize << 3 ); + dwPage[ 7 ] = (DWORD)Map5_Chr_Reg[7][byMode] % ( NesHeader.byVRomSize << 3 ); + + PPUBANK[ 0 ] = VROMPAGE( dwPage[ 0 ] ); + PPUBANK[ 1 ] = VROMPAGE( dwPage[ 1 ] ); + PPUBANK[ 2 ] = VROMPAGE( dwPage[ 2 ] ); + PPUBANK[ 3 ] = VROMPAGE( dwPage[ 3 ] ); + PPUBANK[ 4 ] = VROMPAGE( dwPage[ 4 ] ); + PPUBANK[ 5 ] = VROMPAGE( dwPage[ 5 ] ); + PPUBANK[ 6 ] = VROMPAGE( dwPage[ 6 ] ); + PPUBANK[ 7 ] = VROMPAGE( dwPage[ 7 ] ); + InfoNES_SetupChr(); + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 5 Sync Program Banks Function */ +/*-------------------------------------------------------------------*/ +void Map5_Sync_Prg_Banks( void ) +{ + switch( Map5_Prg_Size ) + { + case 0: + Map5_Wram_Reg[ 4 ] = 0xff; + Map5_Wram_Reg[ 5 ] = 0xff; + Map5_Wram_Reg[ 6 ] = 0xff; + + ROMBANK0 = ROMPAGE( ( (Map5_Prg_Reg[7] & 0x7c) + 0 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE( ( (Map5_Prg_Reg[7] & 0x7c) + 1 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMPAGE( ( (Map5_Prg_Reg[7] & 0x7c) + 2 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK3 = ROMPAGE( ( (Map5_Prg_Reg[7] & 0x7c) + 3 ) % ( NesHeader.byRomSize << 1 ) ); + break; + + case 1: + if ( Map5_Prg_Reg[ 5 ] & 0x80 ) + { + Map5_Wram_Reg[ 4 ] = 0xff; + Map5_Wram_Reg[ 5 ] = 0xff; + ROMBANK0 = ROMPAGE( ( (Map5_Prg_Reg[7] & 0x7e) + 0 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE( ( (Map5_Prg_Reg[7] & 0x7e) + 1 ) % ( NesHeader.byRomSize << 1 ) ); + } else { + Map5_Wram_Reg[ 4 ] = ( Map5_Prg_Reg[ 5 ] & 0x06 ) + 0; + Map5_Wram_Reg[ 5 ] = ( Map5_Prg_Reg[ 5 ] & 0x06 ) + 1; + ROMBANK0 = Map5_ROMPAGE( Map5_Wram_Reg[ 4 ] ); + ROMBANK1 = Map5_ROMPAGE( Map5_Wram_Reg[ 5 ] ); + } + + Map5_Wram_Reg[ 6 ] = 0xff; + ROMBANK2 = ROMPAGE( ( (Map5_Prg_Reg[7] & 0x7e) + 0 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK3 = ROMPAGE( ( (Map5_Prg_Reg[7] & 0x7e) + 1 ) % ( NesHeader.byRomSize << 1 ) ); + break; + + case 2: + if ( Map5_Prg_Reg[ 5 ] & 0x80 ) + { + Map5_Wram_Reg[ 4 ] = 0xff; + Map5_Wram_Reg[ 5 ] = 0xff; + ROMBANK0 = ROMPAGE( ( (Map5_Prg_Reg[5] & 0x7e) + 0 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE( ( (Map5_Prg_Reg[5] & 0x7e) + 1 ) % ( NesHeader.byRomSize << 1 ) ); + } else { + Map5_Wram_Reg[ 4 ] = ( Map5_Prg_Reg[ 5 ] & 0x06 ) + 0; + Map5_Wram_Reg[ 5 ] = ( Map5_Prg_Reg[ 5 ] & 0x06 ) + 1; + ROMBANK0 = Map5_ROMPAGE( Map5_Wram_Reg[ 4 ] ); + ROMBANK1 = Map5_ROMPAGE( Map5_Wram_Reg[ 5 ] ); + } + + if ( Map5_Prg_Reg[ 6 ] & 0x80 ) + { + Map5_Wram_Reg[ 6 ] = 0xff; + ROMBANK2 = ROMPAGE( (Map5_Prg_Reg[6] & 0x7f) % ( NesHeader.byRomSize << 1 ) ); + } else { + Map5_Wram_Reg[ 6 ] = Map5_Prg_Reg[ 6 ] & 0x07; + ROMBANK2 = Map5_ROMPAGE( Map5_Wram_Reg[ 6 ] ); + } + + ROMBANK3 = ROMPAGE( (Map5_Prg_Reg[7] & 0x7f) % ( NesHeader.byRomSize << 1 ) ); + break; + + default: + if ( Map5_Prg_Reg[ 4 ] & 0x80 ) + { + Map5_Wram_Reg[ 4 ] = 0xff; + ROMBANK0 = ROMPAGE( (Map5_Prg_Reg[4] & 0x7f) % ( NesHeader.byRomSize << 1 ) ); + } else { + Map5_Wram_Reg[ 4 ] = Map5_Prg_Reg[ 4 ] & 0x07; + ROMBANK0 = Map5_ROMPAGE( Map5_Wram_Reg[ 4 ] ); + } + + if ( Map5_Prg_Reg[ 5 ] & 0x80 ) + { + Map5_Wram_Reg[ 5 ] = 0xff; + ROMBANK1 = ROMPAGE( (Map5_Prg_Reg[5] & 0x7f) % ( NesHeader.byRomSize << 1 ) ); + } else { + Map5_Wram_Reg[ 5 ] = Map5_Prg_Reg[ 5 ] & 0x07; + ROMBANK1 = Map5_ROMPAGE( Map5_Wram_Reg[ 5 ] ); + } + + if ( Map5_Prg_Reg[ 6 ] & 0x80 ) + { + Map5_Wram_Reg[ 6 ] = 0xff; + ROMBANK2 = ROMPAGE( (Map5_Prg_Reg[6] & 0x7f) % ( NesHeader.byRomSize << 1 ) ); + } else { + Map5_Wram_Reg[ 6 ] = Map5_Prg_Reg[ 6 ] & 0x07; + ROMBANK2 = Map5_ROMPAGE( Map5_Wram_Reg[ 6 ] ); + } + + ROMBANK3 = ROMPAGE( (Map5_Prg_Reg[7] & 0x7f) % ( NesHeader.byRomSize << 1 ) ); + break; + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_006.c b/apps/plugins/infones/mapper/InfoNES_Mapper_006.c new file mode 100644 index 0000000..8ed22d2 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_006.c @@ -0,0 +1,158 @@ +/*===================================================================*/ +/* */ +/* Mapper 6 (FFE) */ +/* */ +/*===================================================================*/ + +BYTE Map6_IRQ_Enable; +DWORD Map6_IRQ_Cnt; +BYTE Map6_Chr_Ram[ 0x2000 * 4 ]; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 6 */ +/*-------------------------------------------------------------------*/ +void Map6_Init() +{ + int nPage; + + /* Initialize Mapper */ + MapperInit = Map6_Init; + + /* Write to Mapper */ + MapperWrite = Map6_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map6_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map6_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 14 ); + ROMBANK3 = ROMPAGE( 15 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( nPage = 0; nPage < 8; ++nPage ) + { + PPUBANK[ nPage ] = VROMPAGE( nPage ); + } + InfoNES_SetupChr(); + } + else + { + for ( nPage = 0; nPage < 8; ++nPage ) + { + PPUBANK[ nPage ] = Map6_VROMPAGE( nPage ); + } + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 6 Write to APU Function */ +/*-------------------------------------------------------------------*/ +void Map6_Apu( WORD wAddr, BYTE byData ) +{ + switch ( wAddr ) + { + /* Name Table Mirroring */ + case 0x42fe: + if ( byData & 0x10 ) + { + InfoNES_Mirroring( 2 ); + } else { + InfoNES_Mirroring( 3 ); + } + break; + + case 0x42ff: + if ( byData & 0x10 ) + { + InfoNES_Mirroring( 0 ); + } else { + InfoNES_Mirroring( 1 ); + } + break; + + case 0x4501: + Map6_IRQ_Enable = 0; + break; + + case 0x4502: + Map6_IRQ_Cnt = ( Map6_IRQ_Cnt & 0xff00 ) | (DWORD)byData; + break; + + case 0x4503: + Map6_IRQ_Cnt = ( Map6_IRQ_Cnt & 0x00ff ) | ( (DWORD)byData << 8 ); + Map6_IRQ_Enable = 1; + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 6 Write Function */ +/*-------------------------------------------------------------------*/ +void Map6_Write( WORD wAddr, BYTE byData ) +{ + BYTE byPrgBank = ( byData & 0x3c ) >> 2; + BYTE byChrBank = byData & 0x03; + + /* Set ROM Banks */ + byPrgBank <<= 1; + byPrgBank %= ( NesHeader.byRomSize << 1 ); + + ROMBANK0 = ROMPAGE( byPrgBank ); + ROMBANK1 = ROMPAGE( byPrgBank + 1 ); + + /* Set PPU Banks */ + PPUBANK[ 0 ] = &Map6_Chr_Ram[ byChrBank * 0x2000 + 0 * 0x400 ]; + PPUBANK[ 1 ] = &Map6_Chr_Ram[ byChrBank * 0x2000 + 1 * 0x400 ]; + PPUBANK[ 2 ] = &Map6_Chr_Ram[ byChrBank * 0x2000 + 2 * 0x400 ]; + PPUBANK[ 3 ] = &Map6_Chr_Ram[ byChrBank * 0x2000 + 3 * 0x400 ]; + PPUBANK[ 4 ] = &Map6_Chr_Ram[ byChrBank * 0x2000 + 4 * 0x400 ]; + PPUBANK[ 5 ] = &Map6_Chr_Ram[ byChrBank * 0x2000 + 5 * 0x400 ]; + PPUBANK[ 6 ] = &Map6_Chr_Ram[ byChrBank * 0x2000 + 6 * 0x400 ]; + PPUBANK[ 7 ] = &Map6_Chr_Ram[ byChrBank * 0x2000 + 7 * 0x400 ]; + InfoNES_SetupChr(); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 6 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map6_HSync() +{ + if ( Map6_IRQ_Enable ) + { + Map6_IRQ_Cnt += 133; + if ( Map6_IRQ_Cnt >= 0xffff ) + { + IRQ_REQ; + Map6_IRQ_Cnt = 0; + } + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_007.c b/apps/plugins/infones/mapper/InfoNES_Mapper_007.c new file mode 100644 index 0000000..74a4a9e --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_007.c @@ -0,0 +1,70 @@ +/*===================================================================*/ +/* */ +/* Mapper 7 (AOROM) */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 7 */ +/*-------------------------------------------------------------------*/ +void Map7_Init() +{ + /* Initialize Mapper */ + MapperInit = Map7_Init; + + /* Write to Mapper */ + MapperWrite = Map7_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 7 Write Function */ +/*-------------------------------------------------------------------*/ +void Map7_Write( WORD wAddr, BYTE byData ) +{ + BYTE byBank; + + /* Set ROM Banks */ + byBank = ( byData & 0x07 ) << 2; + byBank %= ( NesHeader.byRomSize << 1 ); + + ROMBANK0 = ROMPAGE( byBank ); + ROMBANK1 = ROMPAGE( byBank + 1 ); + ROMBANK2 = ROMPAGE( byBank + 2 ); + ROMBANK3 = ROMPAGE( byBank + 3 ); + + /* Name Table Mirroring */ + InfoNES_Mirroring( byData & 0x10 ? 2 : 3 ); +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_008.c b/apps/plugins/infones/mapper/InfoNES_Mapper_008.c new file mode 100644 index 0000000..545ea16 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_008.c @@ -0,0 +1,90 @@ +/*===================================================================*/ +/* */ +/* Mapper 8 (FFE F3xxx) */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 8 */ +/*-------------------------------------------------------------------*/ +void Map8_Init() +{ + int nPage; + + /* Initialize Mapper */ + MapperInit = Map8_Init; + + /* Write to Mapper */ + MapperWrite = Map8_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 8 Write Function */ +/*-------------------------------------------------------------------*/ +void Map8_Write( WORD wAddr, BYTE byData ) +{ + BYTE byPrgBank = ( byData & 0xf8 ) >> 3; + BYTE byChrBank = byData & 0x07; + + /* Set ROM Banks */ + byPrgBank <<= 1; + byPrgBank %= ( NesHeader.byRomSize << 1 ); + + ROMBANK0 = ROMPAGE( byPrgBank + 0 ); + ROMBANK1 = ROMPAGE( byPrgBank + 1 ); + + /* Set PPU Banks */ + byChrBank <<= 3; + byChrBank %= ( NesHeader.byVRomSize << 3 ); + + PPUBANK[ 0 ] = VROMPAGE( byChrBank + 0 ); + PPUBANK[ 1 ] = VROMPAGE( byChrBank + 1 ); + PPUBANK[ 2 ] = VROMPAGE( byChrBank + 2 ); + PPUBANK[ 3 ] = VROMPAGE( byChrBank + 3 ); + PPUBANK[ 4 ] = VROMPAGE( byChrBank + 4 ); + PPUBANK[ 5 ] = VROMPAGE( byChrBank + 5 ); + PPUBANK[ 6 ] = VROMPAGE( byChrBank + 6 ); + PPUBANK[ 7 ] = VROMPAGE( byChrBank + 7 ); + InfoNES_SetupChr(); +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_009.c b/apps/plugins/infones/mapper/InfoNES_Mapper_009.c new file mode 100644 index 0000000..3cf797e --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_009.c @@ -0,0 +1,231 @@ +/*===================================================================*/ +/* */ +/* Mapper 9 (MMC2) */ +/* */ +/*===================================================================*/ + +struct Map9_Latch +{ + BYTE lo_bank; + BYTE hi_bank; + BYTE state; +}; + +struct Map9_Latch latch1; +struct Map9_Latch latch2; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 9 */ +/*-------------------------------------------------------------------*/ +void Map9_Init() +{ + int nPage; + + /* Initialize Mapper */ + MapperInit = Map9_Init; + + /* Write to Mapper */ + MapperWrite = Map9_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map9_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMLASTPAGE( 2 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Init Latch Selector */ + latch1.state = 0xfe; + latch1.lo_bank = 0; + latch1.hi_bank = 0; + latch2.state = 0xfe; + latch2.lo_bank = 0; + latch2.hi_bank = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 9 Write Function */ +/*-------------------------------------------------------------------*/ +void Map9_Write( WORD wAddr, BYTE byData ) +{ + WORD wMapAddr; + + wMapAddr = wAddr & 0xf000; + switch ( wMapAddr ) + { + case 0xa000: + /* Set ROM Banks */ + byData %= ( NesHeader.byRomSize << 1 ); + ROMBANK0 = ROMPAGE( byData ); + break; + + case 0xb000: + /* Number of 4K Banks to Number of 1K Banks */ + byData %= ( NesHeader.byVRomSize << 1 ); + byData <<= 2; + + /* Latch Control */ + latch1.lo_bank = byData; + + if (0xfd == latch1.state) + { + /* Set PPU Banks */ + PPUBANK[ 0 ] = VROMPAGE( byData ); + PPUBANK[ 1 ] = VROMPAGE( byData + 1 ); + PPUBANK[ 2 ] = VROMPAGE( byData + 2 ); + PPUBANK[ 3 ] = VROMPAGE( byData + 3 ); + InfoNES_SetupChr(); + } + break; + + case 0xc000: + /* Number of 4K Banks to Number of 1K Banks */ + byData %= ( NesHeader.byVRomSize << 1 ); + byData <<= 2; + + /* Latch Control */ + latch1.hi_bank = byData; + + if (0xfe == latch1.state) + { + /* Set PPU Banks */ + PPUBANK[ 0 ] = VROMPAGE( byData ); + PPUBANK[ 1 ] = VROMPAGE( byData + 1 ); + PPUBANK[ 2 ] = VROMPAGE( byData + 2 ); + PPUBANK[ 3 ] = VROMPAGE( byData + 3 ); + InfoNES_SetupChr(); + } + break; + + case 0xd000: + /* Number of 4K Banks to Number of 1K Banks */ + byData %= ( NesHeader.byVRomSize << 1 ); + byData <<= 2; + + /* Latch Control */ + latch2.lo_bank = byData; + + if (0xfd == latch2.state) + { + /* Set PPU Banks */ + PPUBANK[ 4 ] = VROMPAGE( byData ); + PPUBANK[ 5 ] = VROMPAGE( byData + 1 ); + PPUBANK[ 6 ] = VROMPAGE( byData + 2 ); + PPUBANK[ 7 ] = VROMPAGE( byData + 3 ); + InfoNES_SetupChr(); + } + break; + + case 0xe000: + /* Number of 4K Banks to Number of 1K Banks */ + byData %= ( NesHeader.byVRomSize << 1 ); + byData <<= 2; + + /* Latch Control */ + latch2.hi_bank = byData; + + if (0xfe == latch2.state) + { + /* Set PPU Banks */ + PPUBANK[ 4 ] = VROMPAGE( byData ); + PPUBANK[ 5 ] = VROMPAGE( byData + 1 ); + PPUBANK[ 6 ] = VROMPAGE( byData + 2 ); + PPUBANK[ 7 ] = VROMPAGE( byData + 3 ); + InfoNES_SetupChr(); + } + break; + + case 0xf000: + /* Name Table Mirroring */ + InfoNES_Mirroring( byData & 0x01 ? 0 : 1); + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 9 PPU Function */ +/*-------------------------------------------------------------------*/ +void Map9_PPU( WORD wAddr ) +{ + /* Control Latch Selector */ + switch ( wAddr & 0x3ff0 ) + { + case 0x0fd0: + /* Latch Control */ + latch1.state = 0xfd; + /* Set PPU Banks */ + PPUBANK[ 0 ] = VROMPAGE( latch1.lo_bank ); + PPUBANK[ 1 ] = VROMPAGE( latch1.lo_bank + 1 ); + PPUBANK[ 2 ] = VROMPAGE( latch1.lo_bank + 2 ); + PPUBANK[ 3 ] = VROMPAGE( latch1.lo_bank + 3 ); + InfoNES_SetupChr(); + break; + + case 0x0fe0: + /* Latch Control */ + latch1.state = 0xfe; + /* Set PPU Banks */ + PPUBANK[ 0 ] = VROMPAGE( latch1.hi_bank ); + PPUBANK[ 1 ] = VROMPAGE( latch1.hi_bank + 1 ); + PPUBANK[ 2 ] = VROMPAGE( latch1.hi_bank + 2 ); + PPUBANK[ 3 ] = VROMPAGE( latch1.hi_bank + 3 ); + InfoNES_SetupChr(); + break; + + case 0x1fd0: + /* Latch Control */ + latch2.state = 0xfd; + /* Set PPU Banks */ + PPUBANK[ 4 ] = VROMPAGE( latch2.lo_bank ); + PPUBANK[ 5 ] = VROMPAGE( latch2.lo_bank + 1 ); + PPUBANK[ 6 ] = VROMPAGE( latch2.lo_bank + 2 ); + PPUBANK[ 7 ] = VROMPAGE( latch2.lo_bank + 3 ); + InfoNES_SetupChr(); + break; + + case 0x1fe0: + /* Latch Control */ + latch2.state = 0xfe; + /* Set PPU Banks */ + PPUBANK[ 4 ] = VROMPAGE( latch2.hi_bank ); + PPUBANK[ 5 ] = VROMPAGE( latch2.hi_bank + 1 ); + PPUBANK[ 6 ] = VROMPAGE( latch2.hi_bank + 2 ); + PPUBANK[ 7 ] = VROMPAGE( latch2.hi_bank + 3 ); + InfoNES_SetupChr(); + break; + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_010.c b/apps/plugins/infones/mapper/InfoNES_Mapper_010.c new file mode 100644 index 0000000..1d4f7db --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_010.c @@ -0,0 +1,233 @@ +/*===================================================================*/ +/* */ +/* Mapper 10 (MMC4) */ +/* */ +/*===================================================================*/ + +struct Map10_Latch +{ + BYTE lo_bank; + BYTE hi_bank; + BYTE state; +}; + +struct Map10_Latch latch3; // Latch Selector #1 +struct Map10_Latch latch4; // Latch Selector #2 + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 10 */ +/*-------------------------------------------------------------------*/ +void Map10_Init() +{ + int nPage; + + /* Initialize Mapper */ + MapperInit = Map10_Init; + + /* Write to Mapper */ + MapperWrite = Map10_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map10_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Init Latch Selector */ + latch3.state = 0xfe; + latch3.lo_bank = 0; + latch3.hi_bank = 0; + latch4.state = 0xfe; + latch4.lo_bank = 0; + latch4.hi_bank = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 10 Write Function */ +/*-------------------------------------------------------------------*/ +void Map10_Write( WORD wAddr, BYTE byData ) +{ + WORD wMapAddr; + + wMapAddr = wAddr & 0xf000; + switch ( wMapAddr ) + { + case 0xa000: + /* Set ROM Banks */ + byData %= NesHeader.byRomSize; + byData <<= 1; + ROMBANK0 = ROMPAGE( byData ); + ROMBANK1 = ROMPAGE( byData + 1 ); + break; + + case 0xb000: + /* Number of 4K Banks to Number of 1K Banks */ + byData %= ( NesHeader.byVRomSize << 1 ); + byData <<= 2; + + /* Latch Control */ + latch3.lo_bank = byData; + + if (0xfd == latch3.state) + { + /* Set PPU Banks */ + PPUBANK[ 0 ] = VROMPAGE( byData ); + PPUBANK[ 1 ] = VROMPAGE( byData + 1 ); + PPUBANK[ 2 ] = VROMPAGE( byData + 2 ); + PPUBANK[ 3 ] = VROMPAGE( byData + 3 ); + InfoNES_SetupChr(); + } + break; + + case 0xc000: + /* Number of 4K Banks to Number of 1K Banks */ + byData %= ( NesHeader.byVRomSize << 1 ); + byData <<= 2; + + /* Latch Control */ + latch3.hi_bank = byData; + + if (0xfe == latch3.state) + { + /* Set PPU Banks */ + PPUBANK[ 0 ] = VROMPAGE( byData ); + PPUBANK[ 1 ] = VROMPAGE( byData + 1 ); + PPUBANK[ 2 ] = VROMPAGE( byData + 2 ); + PPUBANK[ 3 ] = VROMPAGE( byData + 3 ); + InfoNES_SetupChr(); + } + break; + + case 0xd000: + /* Number of 4K Banks to Number of 1K Banks */ + byData %= ( NesHeader.byVRomSize << 1 ); + byData <<= 2; + + /* Latch Control */ + latch4.lo_bank = byData; + + if (0xfd == latch4.state) + { + /* Set PPU Banks */ + PPUBANK[ 4 ] = VROMPAGE( byData ); + PPUBANK[ 5 ] = VROMPAGE( byData + 1 ); + PPUBANK[ 6 ] = VROMPAGE( byData + 2 ); + PPUBANK[ 7 ] = VROMPAGE( byData + 3 ); + InfoNES_SetupChr(); + } + break; + + case 0xe000: + /* Number of 4K Banks to Number of 1K Banks */ + byData %= ( NesHeader.byVRomSize << 1 ); + byData <<= 2; + + /* Latch Control */ + latch4.hi_bank = byData; + + if (0xfe == latch4.state) + { + /* Set PPU Banks */ + PPUBANK[ 4 ] = VROMPAGE( byData ); + PPUBANK[ 5 ] = VROMPAGE( byData + 1 ); + PPUBANK[ 6 ] = VROMPAGE( byData + 2 ); + PPUBANK[ 7 ] = VROMPAGE( byData + 3 ); + InfoNES_SetupChr(); + } + break; + + case 0xf000: + /* Name Table Mirroring */ + InfoNES_Mirroring( byData & 0x01 ? 0 : 1); + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 10 PPU Function */ +/*-------------------------------------------------------------------*/ +void Map10_PPU( WORD wAddr ) +{ + /* Control Latch Selector */ + switch ( wAddr & 0x3ff0 ) + { + case 0x0fd0: + /* Latch Control */ + latch3.state = 0xfd; + /* Set PPU Banks */ + PPUBANK[ 0 ] = VROMPAGE( latch3.lo_bank ); + PPUBANK[ 1 ] = VROMPAGE( latch3.lo_bank + 1 ); + PPUBANK[ 2 ] = VROMPAGE( latch3.lo_bank + 2 ); + PPUBANK[ 3 ] = VROMPAGE( latch3.lo_bank + 3 ); + InfoNES_SetupChr(); + break; + + case 0x0fe0: + /* Latch Control */ + latch3.state = 0xfe; + /* Set PPU Banks */ + PPUBANK[ 0 ] = VROMPAGE( latch3.hi_bank ); + PPUBANK[ 1 ] = VROMPAGE( latch3.hi_bank + 1 ); + PPUBANK[ 2 ] = VROMPAGE( latch3.hi_bank + 2 ); + PPUBANK[ 3 ] = VROMPAGE( latch3.hi_bank + 3 ); + InfoNES_SetupChr(); + break; + + case 0x1fd0: + /* Latch Control */ + latch4.state = 0xfd; + /* Set PPU Banks */ + PPUBANK[ 4 ] = VROMPAGE( latch4.lo_bank ); + PPUBANK[ 5 ] = VROMPAGE( latch4.lo_bank + 1 ); + PPUBANK[ 6 ] = VROMPAGE( latch4.lo_bank + 2 ); + PPUBANK[ 7 ] = VROMPAGE( latch4.lo_bank + 3 ); + InfoNES_SetupChr(); + break; + + case 0x1fe0: + /* Latch Control */ + latch4.state = 0xfe; + /* Set PPU Banks */ + PPUBANK[ 4 ] = VROMPAGE( latch4.hi_bank ); + PPUBANK[ 5 ] = VROMPAGE( latch4.hi_bank + 1 ); + PPUBANK[ 6 ] = VROMPAGE( latch4.hi_bank + 2 ); + PPUBANK[ 7 ] = VROMPAGE( latch4.hi_bank + 3 ); + InfoNES_SetupChr(); + break; + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_011.c b/apps/plugins/infones/mapper/InfoNES_Mapper_011.c new file mode 100644 index 0000000..b0445f1 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_011.c @@ -0,0 +1,89 @@ +/*===================================================================*/ +/* */ +/* Mapper 11 (Color Dreams) */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 11 */ +/*-------------------------------------------------------------------*/ +void Map11_Init() +{ + int nPage; + + /* Initialize Mapper */ + MapperInit = Map11_Init; + + /* Write to Mapper */ + MapperWrite = Map11_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Name Table Mirroring */ + InfoNES_Mirroring( 1 ); + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 11 Write Function */ +/*-------------------------------------------------------------------*/ +void Map11_Write( WORD wAddr, BYTE byData ) +{ + BYTE byPrgBank = ( byData & 0x01 ) << 2; + BYTE byChrBank = ( ( byData & 0x70 ) >> 4 ) << 3; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( ( byPrgBank + 0 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE( ( byPrgBank + 1 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMPAGE( ( byPrgBank + 2 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK3 = ROMPAGE( ( byPrgBank + 3 ) % ( NesHeader.byRomSize << 1 ) ); + + /* Set PPU Banks */ + PPUBANK[ 0 ] = VROMPAGE( ( byChrBank + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( ( byChrBank + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( ( byChrBank + 2 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( ( byChrBank + 3 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 4 ] = VROMPAGE( ( byChrBank + 4 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( ( byChrBank + 5 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE( ( byChrBank + 6 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( ( byChrBank + 7 ) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_013.c b/apps/plugins/infones/mapper/InfoNES_Mapper_013.c new file mode 100644 index 0000000..d4132b8 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_013.c @@ -0,0 +1,80 @@ +/*===================================================================*/ +/* */ +/* Mapper 13 : CPROM */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 13 */ +/*-------------------------------------------------------------------*/ +void Map13_Init() +{ + /* Initialize Mapper */ + MapperInit = Map13_Init; + + /* Write to Mapper */ + MapperWrite = Map13_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + + /* Set PPU Banks */ + PPUBANK[ 0 ] = CRAMPAGE( 0 ); + PPUBANK[ 1 ] = CRAMPAGE( 1 ); + PPUBANK[ 2 ] = CRAMPAGE( 2 ); + PPUBANK[ 3 ] = CRAMPAGE( 3 ); + PPUBANK[ 4 ] = CRAMPAGE( 0 ); + PPUBANK[ 5 ] = CRAMPAGE( 1 ); + PPUBANK[ 6 ] = CRAMPAGE( 2 ); + PPUBANK[ 7 ] = CRAMPAGE( 3 ); + InfoNES_SetupChr(); + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 13 Write Function */ +/*-------------------------------------------------------------------*/ +void Map13_Write( WORD wAddr, BYTE byData ) +{ + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE((((byData&0x30)>>2)+0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE((((byData&0x30)>>2)+1) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE((((byData&0x30)>>2)+2) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE((((byData&0x30)>>2)+3) % (NesHeader.byRomSize<<1)); + + /* Set PPU Banks */ + PPUBANK[ 4 ] = CRAMPAGE(((byData&0x03)<<2)+0); + PPUBANK[ 5 ] = CRAMPAGE(((byData&0x03)<<2)+1); + PPUBANK[ 6 ] = CRAMPAGE(((byData&0x03)<<2)+2); + PPUBANK[ 7 ] = CRAMPAGE(((byData&0x03)<<2)+3); + InfoNES_SetupChr(); +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_015.c b/apps/plugins/infones/mapper/InfoNES_Mapper_015.c new file mode 100644 index 0000000..8bd66ec --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_015.c @@ -0,0 +1,112 @@ +/*===================================================================*/ +/* */ +/* Mapper 15 (100-in-1) */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 15 */ +/*-------------------------------------------------------------------*/ +void Map15_Init() +{ + /* Initialize Mapper */ + MapperInit = Map15_Init; + + /* Write to Mapper */ + MapperWrite = Map15_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 15 Write Function */ +/*-------------------------------------------------------------------*/ +void Map15_Write( WORD wAddr, BYTE byData ) +{ + BYTE byBank; + + switch ( wAddr ) + { + case 0x8000: + /* Name Table Mirroring */ + InfoNES_Mirroring( byData & 0x20 ? 0 : 1); + + /* Set ROM Banks */ + byBank = byData & 0x1f; + byBank %= ( NesHeader.byRomSize << 1 ); + byBank <<= 1; + + ROMBANK0 = ROMPAGE( byBank ); + ROMBANK1 = ROMPAGE( byBank + 1 ); + ROMBANK2 = ROMPAGE( byBank + 2 ); + ROMBANK3 = ROMPAGE( byBank + 3 ); + break; + + case 0x8001: + /* Set ROM Banks */ + byData &= 0x3f; + byData %= ( NesHeader.byRomSize << 1 ); + byData <<= 1; + + ROMBANK2 = ROMPAGE( byData ); + ROMBANK3 = ROMPAGE( byData + 1 ); + break; + + case 0x8002: + /* Set ROM Banks */ + byBank = byData & 0x3f; + byBank %= ( NesHeader.byRomSize << 1 ); + byBank <<= 1; + byBank += ( byData & 0x80 ? 1 : 0 ); + + ROMBANK0 = ROMPAGE( byBank ); + ROMBANK1 = ROMPAGE( byBank ); + ROMBANK2 = ROMPAGE( byBank ); + ROMBANK3 = ROMPAGE( byBank ); + break; + + case 0x8003: + /* Name Table Mirroring */ + InfoNES_Mirroring( byData & 0x20 ? 0 : 1); + + /* Set ROM Banks */ + byData &= 0x1f; + byData %= ( NesHeader.byRomSize << 1 ); + byData <<= 1; + + ROMBANK2 = ROMPAGE( byData ); + ROMBANK3 = ROMPAGE( byData + 1 ); + break; + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_016.c b/apps/plugins/infones/mapper/InfoNES_Mapper_016.c new file mode 100644 index 0000000..02fb3af --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_016.c @@ -0,0 +1,186 @@ +/*===================================================================*/ +/* */ +/* Mapper 16 (Bandai Mapper) */ +/* */ +/*===================================================================*/ + +BYTE Map16_Regs[3]; + +BYTE Map16_IRQ_Enable; +DWORD Map16_IRQ_Cnt; +DWORD Map16_IRQ_Latch; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 16 */ +/*-------------------------------------------------------------------*/ +void Map16_Init() +{ + /* Initialize Mapper */ + MapperInit = Map16_Init; + + /* Write to Mapper */ + MapperWrite = Map16_Write; + + /* Write to SRAM */ + MapperSram = Map16_Write; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map16_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Initialize State Flag */ + Map16_Regs[ 0 ] = 0; + Map16_Regs[ 1 ] = 0; + Map16_Regs[ 2 ] = 0; + + Map16_IRQ_Enable = 0; + Map16_IRQ_Cnt = 0; + Map16_IRQ_Latch = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 16 Write Function */ +/*-------------------------------------------------------------------*/ +void Map16_Write( WORD wAddr, BYTE byData ) +{ + switch ( wAddr & 0x000f ) + { + case 0x0000: + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 0 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0x0001: + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 1 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0x0002: + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 2 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0x0003: + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 3 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0x0004: + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 4 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0x0005: + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 5 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0x0006: + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 6 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0x0007: + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 7 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0x0008: + byData <<= 1; + byData %= ( NesHeader.byRomSize << 1 ); + ROMBANK0 = ROMPAGE( byData ); + ROMBANK1 = ROMPAGE( byData + 1 ); + break; + + case 0x0009: + switch ( byData & 0x03 ) + { + case 0x00: + InfoNES_Mirroring( 1 ); + break; + + case 0x01: + InfoNES_Mirroring( 0 ); + break; + + case 0x02: + InfoNES_Mirroring( 3 ); + break; + + case 0x03: + InfoNES_Mirroring( 2 ); + break; + } + break; + + case 0x000a: + Map16_IRQ_Enable = byData & 0x01; + Map16_IRQ_Cnt = Map16_IRQ_Latch; + break; + + case 0x000b: + Map16_IRQ_Latch = ( Map16_IRQ_Latch & 0xff00 ) | byData; + break; + + case 0x000c: + Map16_IRQ_Latch = ( (DWORD)byData << 8 ) | ( Map16_IRQ_Latch & 0x00ff ); + break; + + case 0x000d: + /* Write Protect */ + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 16 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map16_HSync() +{ + if ( Map16_IRQ_Enable ) + { + /* Normal IRQ */ + if ( Map16_IRQ_Cnt <= 114 ) + { + IRQ_REQ; + Map16_IRQ_Cnt = 0; + Map16_IRQ_Enable = 0; + } else { + Map16_IRQ_Cnt -= 114; + } + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_017.c b/apps/plugins/infones/mapper/InfoNES_Mapper_017.c new file mode 100644 index 0000000..fce8b9a --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_017.c @@ -0,0 +1,195 @@ +/*===================================================================*/ +/* */ +/* Mapper 17 (FFE F8 Series) */ +/* */ +/*===================================================================*/ + +BYTE Map17_IRQ_Enable; +DWORD Map17_IRQ_Cnt; +DWORD Map17_IRQ_Latch; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 17 */ +/*-------------------------------------------------------------------*/ +void Map17_Init() +{ + int nPage; + /* Initialize Mapper */ + MapperInit = Map17_Init; + + /* Write to Mapper */ + MapperWrite = Map0_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map17_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map17_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Initialize State Registers */ + Map17_IRQ_Enable = 0; + Map17_IRQ_Cnt = 0; + Map17_IRQ_Latch = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 17 Write to APU Function */ +/*-------------------------------------------------------------------*/ +void Map17_Apu( WORD wAddr, BYTE byData ) +{ + switch ( wAddr ) + { + case 0x42fe: + if ( ( byData & 0x10 ) == 0 ) + { + InfoNES_Mirroring( 3 ); + } else { + InfoNES_Mirroring( 2 ); + } + break; + + case 0x42ff: + if ( ( byData & 0x10 ) == 0 ) + { + InfoNES_Mirroring( 1 ); + } else { + InfoNES_Mirroring( 0 ); + } + break; + + case 0x4501: + Map17_IRQ_Enable = 0; + break; + + case 0x4502: + Map17_IRQ_Latch = ( Map17_IRQ_Latch & 0xff00 ) | byData; + break; + + case 0x4503: + Map17_IRQ_Latch = ( Map17_IRQ_Latch & 0x00ff ) | ( (DWORD)byData << 8 ); + Map17_IRQ_Cnt = Map17_IRQ_Latch; + Map17_IRQ_Enable = 1; + break; + + case 0x4504: + byData %= ( NesHeader.byRomSize << 1 ); + ROMBANK0 = ROMPAGE( byData ); + break; + + case 0x4505: + byData %= ( NesHeader.byRomSize << 1 ); + ROMBANK1 = ROMPAGE( byData ); + break; + + case 0x4506: + byData %= ( NesHeader.byRomSize << 1 ); + ROMBANK2 = ROMPAGE( byData ); + break; + + case 0x4507: + byData %= ( NesHeader.byRomSize << 1 ); + ROMBANK3 = ROMPAGE( byData ); + break; + + case 0x4510: + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 0 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0x4511: + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 1 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0x4512: + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 2 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0x4513: + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 3 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0x4514: + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 4 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0x4515: + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 5 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0x4516: + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 6 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0x4517: + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 7 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 17 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map17_HSync() +{ + if ( Map17_IRQ_Enable ) + { + if ( Map17_IRQ_Cnt >= 0xffff - 113 ) + { + IRQ_REQ; + Map17_IRQ_Cnt = 0; + Map17_IRQ_Enable = 0; + } else { + Map17_IRQ_Cnt += 113; + } + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_018.c b/apps/plugins/infones/mapper/InfoNES_Mapper_018.c new file mode 100644 index 0000000..591ad02 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_018.c @@ -0,0 +1,269 @@ +/*===================================================================*/ +/* */ +/* Mapper 18 (Jaleco SS8806) */ +/* */ +/*===================================================================*/ + +BYTE Map18_Regs[11]; +BYTE Map18_IRQ_Enable; +WORD Map18_IRQ_Latch; +WORD Map18_IRQ_Cnt; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 18 */ +/*-------------------------------------------------------------------*/ +void Map18_Init() +{ + int i; + /* Initialize Mapper */ + MapperInit = Map18_Init; + + /* Write to Mapper */ + MapperWrite = Map18_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map18_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Initialize Regs */ + for ( i = 0; i < sizeof( Map18_Regs ); i++ ) + { + Map18_Regs[ i ] = 0; + } + Map18_IRQ_Enable = 0; + Map18_IRQ_Latch = 0; + Map18_IRQ_Cnt = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 18 Write Function */ +/*-------------------------------------------------------------------*/ +void Map18_Write( WORD wAddr, BYTE byData ) +{ + switch( wAddr ) + { + /* Set ROM Banks */ + case 0x8000: + Map18_Regs[ 0 ] = ( Map18_Regs[ 0 ] & 0xf0 ) | ( byData & 0x0f ); + ROMBANK0 = ROMPAGE( Map18_Regs[ 0 ] % ( NesHeader.byRomSize << 1 ) ); + break; + + case 0x8001: + Map18_Regs[ 0 ] = ( Map18_Regs[ 0 ] & 0x0f ) | ( ( byData & 0x0f ) << 4 ); + ROMBANK0 = ROMPAGE( Map18_Regs[ 0 ] % ( NesHeader.byRomSize << 1 ) ); + break; + + case 0x8002: + Map18_Regs[ 1 ] = ( Map18_Regs[ 1 ] & 0xf0 ) | ( byData & 0x0f ); + ROMBANK1 = ROMPAGE( Map18_Regs[ 1 ] % ( NesHeader.byRomSize << 1 ) ); + break; + + case 0x8003: + Map18_Regs[ 1 ] = ( Map18_Regs[ 1 ] & 0x0f ) | ( ( byData & 0x0f ) << 4 ); + ROMBANK1 = ROMPAGE( Map18_Regs[ 1 ] % ( NesHeader.byRomSize << 1 ) ); + break; + + case 0x9000: + Map18_Regs[ 2 ] = ( Map18_Regs[ 2 ] & 0xf0 ) | ( byData & 0x0f ); + ROMBANK2 = ROMPAGE( Map18_Regs[ 2 ] % ( NesHeader.byRomSize << 1 ) ); + break; + + case 0x9001: + Map18_Regs[ 2 ] = ( Map18_Regs[ 2 ] & 0x0f ) | ( ( byData & 0x0f ) << 4 ); + ROMBANK2 = ROMPAGE( Map18_Regs[ 2 ] % ( NesHeader.byRomSize << 1 ) ); + break; + + /* Set PPU Banks */ + case 0xA000: + Map18_Regs[ 3 ] = ( Map18_Regs[ 3 ] & 0xf0 ) | ( byData & 0x0f ); + PPUBANK[ 0 ] = VROMPAGE( Map18_Regs[ 3 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xA001: + Map18_Regs[ 3 ] = ( Map18_Regs[ 3 ] & 0x0f ) | ( ( byData & 0x0f ) << 4 ); + PPUBANK[ 0 ] = VROMPAGE( Map18_Regs[ 3 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xA002: + Map18_Regs[ 4 ] = ( Map18_Regs[ 4 ] & 0xf0 ) | ( byData & 0x0f ); + PPUBANK[ 1 ] = VROMPAGE( Map18_Regs[ 4 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xA003: + Map18_Regs[ 4 ] = ( Map18_Regs[ 4 ] & 0x0f ) | ( ( byData & 0x0f ) << 4 ); + PPUBANK[ 1 ] = VROMPAGE( Map18_Regs[ 4 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xB000: + Map18_Regs[ 5 ] = ( Map18_Regs[ 5 ] & 0xf0 ) | ( byData & 0x0f ); + PPUBANK[ 2 ] = VROMPAGE( Map18_Regs[ 5 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xB001: + Map18_Regs[ 5 ] = ( Map18_Regs[ 5 ] &0x0f ) | ( ( byData & 0x0f ) << 4 ); + PPUBANK[ 2 ] = VROMPAGE( Map18_Regs[ 5 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xB002: + Map18_Regs[ 6 ] = ( Map18_Regs[ 6 ] & 0xf0 ) | ( byData & 0x0f ); + PPUBANK[ 3 ] = VROMPAGE( Map18_Regs[ 6 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xB003: + Map18_Regs[ 6 ] = ( Map18_Regs[ 6 ] & 0x0f ) | ( ( byData & 0x0f ) << 4 ); + PPUBANK[ 3 ] = VROMPAGE( Map18_Regs[ 6 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xC000: + Map18_Regs[ 7 ] = ( Map18_Regs[ 7 ] & 0xf0 ) | ( byData & 0x0f ); + PPUBANK[ 4 ] = VROMPAGE( Map18_Regs[ 7 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xC001: + Map18_Regs[ 7 ] = ( Map18_Regs[ 7 ] & 0x0f ) | ( ( byData & 0x0f ) << 4 ); + PPUBANK[ 4 ] = VROMPAGE( Map18_Regs[ 7 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xC002: + Map18_Regs[ 8 ] = ( Map18_Regs[ 8 ] & 0xf0 ) | ( byData & 0x0f ); + PPUBANK[ 5 ] = VROMPAGE( Map18_Regs[ 8 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xC003: + Map18_Regs[ 8 ] = ( Map18_Regs[ 8 ] & 0x0f ) | ( ( byData & 0x0f ) << 4 ); + PPUBANK[ 5 ] = VROMPAGE( Map18_Regs[ 8 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xD000: + Map18_Regs[ 9 ] = ( Map18_Regs[ 9 ] & 0xf0 ) | ( byData & 0x0f ); + PPUBANK[ 6 ] = VROMPAGE( Map18_Regs[ 9 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xD001: + Map18_Regs[ 9 ] = ( Map18_Regs[ 9 ] & 0x0f ) | ( ( byData & 0x0f ) << 4 ); + PPUBANK[ 6 ] = VROMPAGE( Map18_Regs[ 9 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xD002: + Map18_Regs[ 10 ] = ( Map18_Regs[ 10 ] & 0xf0 ) | ( byData & 0x0f ); + PPUBANK[ 7 ] = VROMPAGE( Map18_Regs[ 10 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xD003: + Map18_Regs[ 10 ] = ( Map18_Regs[ 10 ] & 0x0f ) | ( ( byData & 0x0f ) << 4 ); + PPUBANK[ 7 ] = VROMPAGE( Map18_Regs[ 10 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xE000: + Map18_IRQ_Latch = ( Map18_IRQ_Latch & 0xfff0 ) | ( byData & 0x0f ); + break; + + case 0xE001: + Map18_IRQ_Latch = ( Map18_IRQ_Latch & 0xff0f ) | ( ( byData & 0x0f ) << 4 ); + break; + + case 0xE002: + Map18_IRQ_Latch = ( Map18_IRQ_Latch & 0xf0ff ) | ( ( byData & 0x0f ) << 8 ); + break; + + case 0xE003: + Map18_IRQ_Latch = ( Map18_IRQ_Latch & 0x0fff ) | ( ( byData & 0x0f ) << 12 ); + break; + + case 0xF000: + if ( ( byData & 0x01 ) == 0 ) + { + Map18_IRQ_Cnt = 0; + } else { + Map18_IRQ_Cnt = Map18_IRQ_Latch; + } + break; + + case 0xF001: + Map18_IRQ_Enable = byData & 0x01; + break; + + /* Name Table Mirroring */ + case 0xF002: + switch ( byData & 0x03 ) + { + case 0: + InfoNES_Mirroring( 0 ); /* Horizontal */ + break; + case 1: + InfoNES_Mirroring( 1 ); /* Vertical */ + break; + case 2: + InfoNES_Mirroring( 3 ); /* One Screen 0x2000 */ + break; + } + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 18 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map18_HSync() +{ +/* + * Callback at HSync + * + */ + if ( Map18_IRQ_Enable ) + { + if ( Map18_IRQ_Cnt <= 113 ) + { + IRQ_REQ; + Map18_IRQ_Cnt = 0; + Map18_IRQ_Enable = 0; + } else { + Map18_IRQ_Cnt -= 113; + } + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_019.c b/apps/plugins/infones/mapper/InfoNES_Mapper_019.c new file mode 100644 index 0000000..7b3ca3f --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_019.c @@ -0,0 +1,315 @@ +/*===================================================================*/ +/* */ +/* Mapper 19 (Namcot 106) */ +/* */ +/*===================================================================*/ + +BYTE Map19_Chr_Ram[ 0x2000 ]; +BYTE Map19_Regs[ 2 ]; + +BYTE Map19_IRQ_Enable; +DWORD Map19_IRQ_Cnt; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 19 */ +/*-------------------------------------------------------------------*/ +void Map19_Init() +{ + /* Initialize Mapper */ + MapperInit = Map19_Init; + + /* Write to Mapper */ + MapperWrite = Map19_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map19_Apu; + + /* Read from APU */ + MapperReadApu = Map19_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map19_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + DWORD dwLastPage = (DWORD)NesHeader.byVRomSize << 3; + PPUBANK[ 0 ] = VROMPAGE( dwLastPage - 8 ); + PPUBANK[ 1 ] = VROMPAGE( dwLastPage - 7 ); + PPUBANK[ 2 ] = VROMPAGE( dwLastPage - 6 ); + PPUBANK[ 3 ] = VROMPAGE( dwLastPage - 5 ); + PPUBANK[ 4 ] = VROMPAGE( dwLastPage - 4 ); + PPUBANK[ 5 ] = VROMPAGE( dwLastPage - 3 ); + PPUBANK[ 6 ] = VROMPAGE( dwLastPage - 2 ); + PPUBANK[ 7 ] = VROMPAGE( dwLastPage - 1 ); + InfoNES_SetupChr(); + } + + /* Initialize State Register */ + Map19_Regs[ 0 ] = 0x00; + Map19_Regs[ 1 ] = 0x00; + Map19_Regs[ 2 ] = 0x00; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 19 Write Function */ +/*-------------------------------------------------------------------*/ +void Map19_Write( WORD wAddr, BYTE byData ) +{ + /* Set PPU Banks */ + switch ( wAddr & 0xf800 ) + { + case 0x8000: /* $8000-87ff */ + if ( byData < 0xe0 || Map19_Regs[ 0 ] == 1 ) + { + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 0 ] = VROMPAGE( byData ); + } else { + PPUBANK[ 0 ] = Map19_VROMPAGE( 0 ); + } + InfoNES_SetupChr(); + break; + + case 0x8800: /* $8800-8fff */ + if ( byData < 0xe0 || Map19_Regs[ 0 ] == 1 ) + { + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 1 ] = VROMPAGE( byData ); + } else { + PPUBANK[ 1 ] = Map19_VROMPAGE( 1 ); + } + InfoNES_SetupChr(); + break; + + case 0x9000: /* $9000-97ff */ + if ( byData < 0xe0 || Map19_Regs[ 0 ] == 1 ) + { + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 2 ] = VROMPAGE( byData ); + } else { + PPUBANK[ 2 ] = Map19_VROMPAGE( 2 ); + } + InfoNES_SetupChr(); + break; + + case 0x9800: /* $9800-9fff */ + if ( byData < 0xe0 || Map19_Regs[ 0 ] == 1 ) + { + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 3 ] = VROMPAGE( byData ); + } else { + PPUBANK[ 3 ] = Map19_VROMPAGE( 3 ); + } + InfoNES_SetupChr(); + break; + + case 0xa000: /* $a000-a7ff */ + if ( byData < 0xe0 || Map19_Regs[ 0 ] == 1 ) + { + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 4 ] = VROMPAGE( byData ); + } else { + PPUBANK[ 4 ] = Map19_VROMPAGE( 4 ); + } + InfoNES_SetupChr(); + break; + + case 0xa800: /* $a800-afff */ + if ( byData < 0xe0 || Map19_Regs[ 0 ] == 1 ) + { + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 5 ] = VROMPAGE( byData ); + } else { + PPUBANK[ 5 ] = Map19_VROMPAGE( 5 ); + } + InfoNES_SetupChr(); + break; + + case 0xb000: /* $b000-b7ff */ + if ( byData < 0xe0 || Map19_Regs[ 0 ] == 1 ) + { + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 6 ] = VROMPAGE( byData ); + } else { + PPUBANK[ 6 ] = Map19_VROMPAGE( 6 ); + } + InfoNES_SetupChr(); + break; + + case 0xb800: /* $b800-bfff */ + if ( byData < 0xe0 || Map19_Regs[ 0 ] == 1 ) + { + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 7 ] = VROMPAGE( byData ); + } else { + PPUBANK[ 7 ] = Map19_VROMPAGE( 7 ); + } + InfoNES_SetupChr(); + break; + + case 0xc000: /* $c000-c7ff */ + if ( byData < 0xe0 || Map19_Regs[ 0 ] == 1 ) + { + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ NAME_TABLE0 ] = VROMPAGE( byData ); + } else { + PPUBANK[ NAME_TABLE0 ] = VRAMPAGE( byData & 0x01 ); + } + break; + + case 0xc800: /* $c800-cfff */ + if ( byData < 0xe0 || Map19_Regs[ 0 ] == 1 ) + { + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ NAME_TABLE1 ] = VROMPAGE( byData ); + } else { + PPUBANK[ NAME_TABLE1 ] = VRAMPAGE( byData & 0x01 ); + } + break; + + case 0xd000: /* $d000-d7ff */ + if ( byData < 0xe0 || Map19_Regs[ 0 ] == 1 ) + { + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ NAME_TABLE2 ] = VROMPAGE( byData ); + } else { + PPUBANK[ NAME_TABLE2 ] = VRAMPAGE( byData & 0x01 ); + } + break; + + case 0xd800: /* $d800-dfff */ + if ( byData < 0xe0 || Map19_Regs[ 0 ] == 1 ) + { + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ NAME_TABLE3 ] = VROMPAGE( byData ); + } else { + PPUBANK[ NAME_TABLE3 ] = VRAMPAGE( byData & 0x01 ); + } + break; + + case 0xe000: /* $e000-e7ff */ + byData &= 0x3f; + byData %= ( NesHeader.byRomSize << 1 ); + ROMBANK0 = ROMPAGE( byData ); + break; + + case 0xe800: /* $e800-efff */ + Map19_Regs[ 0 ] = ( byData & 0x40 ) >> 6; + Map19_Regs[ 1 ] = ( byData & 0x80 ) >> 7; + + byData &= 0x3f; + byData %= ( NesHeader.byRomSize << 1 ); + ROMBANK1 = ROMPAGE( byData ); + break; + + case 0xf000: /* $f000-f7ff */ + byData &= 0x3f; + byData %= ( NesHeader.byRomSize << 1 ); + ROMBANK2 = ROMPAGE( byData ); + break; + + case 0xf800: /* $e800-efff */ + if ( wAddr == 0xf800 ) + { + // Extra Sound + } + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 19 Write to APU Function */ +/*-------------------------------------------------------------------*/ +void Map19_Apu( WORD wAddr, BYTE byData ) +{ + switch ( wAddr & 0xf800 ) + { + case 0x4800: + if ( wAddr == 0x4800 ) + { + // Extra Sound + } + break; + + case 0x5000: /* $5000-57ff */ + Map19_IRQ_Cnt = ( Map19_IRQ_Cnt & 0xff00 ) | byData; + break; + + case 0x5800: /* $5800-5fff */ + Map19_IRQ_Cnt = ( Map19_IRQ_Cnt & 0x00ff ) | ( (DWORD)( byData & 0x7f ) << 8 ); + Map19_IRQ_Enable = ( byData & 0x80 ) >> 7; + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 19 Read from APU Function */ +/*-------------------------------------------------------------------*/ +BYTE Map19_ReadApu( WORD wAddr ) +{ + switch ( wAddr & 0xf800 ) + { + case 0x4800: + if ( wAddr == 0x4800 ) + { + // Extra Sound + } + return (BYTE)( wAddr >> 8 ); + + case 0x5000: /* $5000-57ff */ + return (BYTE)(Map19_IRQ_Cnt & 0x00ff ); + + case 0x5800: /* $5800-5fff */ + return (BYTE)( (Map19_IRQ_Cnt & 0x7f00) >> 8 ); + + default: + return (BYTE)( wAddr >> 8 ); + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 19 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map19_HSync() +{ +/* + * Callback at HSync + * + */ + BYTE Map19_IRQ_Timing = 113; + + if ( Map19_IRQ_Enable ) + { + if ( Map19_IRQ_Cnt >= (DWORD)(0x7fff - Map19_IRQ_Timing) ) + { + Map19_IRQ_Cnt = 0x7fff; + IRQ_REQ; + } else { + Map19_IRQ_Cnt += Map19_IRQ_Timing; + } + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_021.c b/apps/plugins/infones/mapper/InfoNES_Mapper_021.c new file mode 100644 index 0000000..2d12299 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_021.c @@ -0,0 +1,276 @@ +/*===================================================================*/ +/* */ +/* Mapper 21 (Konami VRC4 2A) */ +/* */ +/*===================================================================*/ + +BYTE Map21_Regs[ 10 ]; +BYTE Map21_IRQ_Enable; +BYTE Map21_IRQ_Cnt; +BYTE Map21_IRQ_Latch; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 21 */ +/*-------------------------------------------------------------------*/ +void Map21_Init() +{ + int nPage; + /* Initialize Mapper */ + MapperInit = Map21_Init; + + /* Write to Mapper */ + MapperWrite = Map21_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map21_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Initialize State Registers */ + for ( nPage = 0; nPage < 8; nPage++ ) + { + Map21_Regs[ nPage ] = nPage; + } + Map21_Regs[ 8 ] = 0; + + Map21_IRQ_Enable = 0; + Map21_IRQ_Cnt = 0; + Map21_IRQ_Latch = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 21 Write Function */ +/*-------------------------------------------------------------------*/ +void Map21_Write( WORD wAddr, BYTE byData ) +{ + switch ( wAddr & 0xf00f ) + { + /* Set ROM Banks */ + case 0x8000: + if ( Map21_Regs[ 8 ] & 0x02 ) + { + byData %= ( NesHeader.byRomSize << 1 ); + ROMBANK2 = ROMPAGE( byData ); + } else { + byData %= ( NesHeader.byRomSize << 1 ); + ROMBANK0 = ROMPAGE( byData ); + } + break; + + case 0xa000: + byData %= ( NesHeader.byRomSize << 1 ); + ROMBANK1 = ROMPAGE( byData ); + break; + + /* Name Table Mirroring */ + case 0x9000: + switch ( byData & 0x03 ) + { + case 0: + InfoNES_Mirroring( 1 ); + break; + + case 1: + InfoNES_Mirroring( 0 ); + break; + + case 2: + InfoNES_Mirroring( 3 ); + break; + + case 3: + InfoNES_Mirroring( 2 ); + break; + } + break; + + case 0x9002: + Map21_Regs[ 8 ] = byData; + break; + + case 0xb000: + Map21_Regs[ 0 ] = ( Map21_Regs[ 0 ] & 0xf0 ) | ( byData & 0x0f ); + PPUBANK[ 0 ] = VROMPAGE( Map21_Regs[ 0 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xb002: + Map21_Regs[ 0 ] = ( Map21_Regs[ 0 ] & 0x0f ) | ( ( byData & 0x0f ) << 4 ); + PPUBANK[ 0 ] = VROMPAGE( Map21_Regs[ 0 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xb001: + case 0xb004: + Map21_Regs[ 1 ] = ( Map21_Regs[ 1 ] & 0xf0 ) | ( byData & 0x0f ); + PPUBANK[ 1 ] = VROMPAGE( Map21_Regs[ 1 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xb003: + case 0xb006: + Map21_Regs[ 1 ] = ( Map21_Regs[ 1 ] & 0x0f ) | ( ( byData & 0x0f ) << 4 ); + PPUBANK[ 1 ] = VROMPAGE( Map21_Regs[ 1 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xc000: + Map21_Regs[ 2 ] = ( Map21_Regs[ 2 ] & 0xf0 ) | ( byData & 0x0f ); + PPUBANK[ 2 ] = VROMPAGE( Map21_Regs[ 2 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xc002: + Map21_Regs[ 2 ] = ( Map21_Regs[ 2 ] & 0x0f ) | ( ( byData & 0x0f ) << 4 ); + PPUBANK[ 2 ] = VROMPAGE( Map21_Regs[ 2 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xc001: + case 0xc004: + Map21_Regs[ 3 ] = ( Map21_Regs[ 3 ] & 0xf0 ) | ( byData & 0x0f ); + PPUBANK[ 3 ] = VROMPAGE( Map21_Regs[ 3 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xc003: + case 0xc006: + Map21_Regs[ 3 ] = ( Map21_Regs[ 3 ] & 0x0f ) | ( ( byData & 0x0f ) << 4 ); + PPUBANK[ 3 ] = VROMPAGE( Map21_Regs[ 3 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xd000: + Map21_Regs[ 4 ] = ( Map21_Regs[ 4 ] & 0xf0 ) | ( byData & 0x0f ); + PPUBANK[ 4 ] = VROMPAGE( Map21_Regs[ 4 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xd002: + Map21_Regs[ 4 ] = ( Map21_Regs[ 4 ] & 0x0f ) | ( ( byData & 0x0f ) << 4 ); + PPUBANK[ 4 ] = VROMPAGE( Map21_Regs[ 4 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xd001: + case 0xd004: + Map21_Regs[ 5 ] = ( Map21_Regs[ 5 ] & 0xf0 ) | ( byData & 0x0f ); + PPUBANK[ 5 ] = VROMPAGE( Map21_Regs[ 5 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xd003: + case 0xd006: + Map21_Regs[ 5 ] = ( Map21_Regs[ 5 ] & 0x0f ) | ( ( byData & 0x0f ) << 4 ); + PPUBANK[ 5 ] = VROMPAGE( Map21_Regs[ 5 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xe000: + Map21_Regs[ 6 ] = ( Map21_Regs[ 6 ] & 0xf0 ) | ( byData & 0x0f ); + PPUBANK[ 6 ] = VROMPAGE( Map21_Regs[ 6 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xe002: + Map21_Regs[ 6 ] = ( Map21_Regs[ 6 ] & 0x0f ) | ( ( byData & 0x0f ) << 4 ); + PPUBANK[ 6 ] = VROMPAGE( Map21_Regs[ 6 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xe001: + case 0xe004: + Map21_Regs[ 7 ] = ( Map21_Regs[ 7 ] & 0xf0 ) | ( byData & 0x0f ); + PPUBANK[ 7 ] = VROMPAGE( Map21_Regs[ 7 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xe003: + case 0xe006: + Map21_Regs[ 7 ] = ( Map21_Regs[ 7 ] & 0x0f ) | ( ( byData & 0x0f ) << 4 ); + PPUBANK[ 7 ] = VROMPAGE( Map21_Regs[ 7 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xf000: + Map21_IRQ_Latch = ( Map21_IRQ_Latch & 0xf0 ) | ( byData & 0x0f ); + break; + + case 0xf002: + Map21_IRQ_Latch = ( Map21_IRQ_Latch & 0x0f ) | ( ( byData & 0x0f ) << 4 ); + break; + + case 0xf003: + if ( Map21_IRQ_Enable & 0x01 ) + { + Map21_IRQ_Enable |= 0x02; + } else { + Map21_IRQ_Enable &= 0x01; + } + break; + + case 0xf004: + Map21_IRQ_Enable = byData & 0x03; + if ( Map21_IRQ_Enable & 0x02 ) + { + Map21_IRQ_Cnt = Map21_IRQ_Latch; + } + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 21 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map21_HSync() +{ +/* + * Callback at HSync + * + */ + if ( Map21_IRQ_Enable & 0x02 ) + { + if ( Map21_IRQ_Cnt == 0xff ) + { + Map21_IRQ_Cnt = Map21_IRQ_Latch; + + if ( Map21_IRQ_Enable & 0x01 ) + { + Map21_IRQ_Enable |= 0x02; + } else { + Map21_IRQ_Enable &= 0x01; + } + IRQ_REQ; + } else { + Map21_IRQ_Cnt++; + } + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_022.c b/apps/plugins/infones/mapper/InfoNES_Mapper_022.c new file mode 100644 index 0000000..95bd519 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_022.c @@ -0,0 +1,163 @@ +/*===================================================================*/ +/* */ +/* Mapper 22 (Konami VRC2 type A) */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 22 */ +/*-------------------------------------------------------------------*/ +void Map22_Init() +{ + int nPage; + /* Initialize Mapper */ + MapperInit = Map22_Init; + + /* Write to Mapper */ + MapperWrite = Map22_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 22 Write Function */ +/*-------------------------------------------------------------------*/ +void Map22_Write( WORD wAddr, BYTE byData ) +{ + switch ( wAddr ) + { + case 0x8000: + /* Set ROM Banks */ + byData %= ( NesHeader.byRomSize << 1 ); + ROMBANK0 = ROMPAGE( byData ); + break; + + case 0x9000: + /* Name Table Mirroring */ + switch ( byData & 0x03 ) + { + case 0: + InfoNES_Mirroring( 1 ); /* Vertical */ + break; + case 1: + InfoNES_Mirroring( 0 ); /* Horizontal */ + break; + case 2: + InfoNES_Mirroring( 2 ); /* One Screen 0x2000 */ + break; + case 3: + InfoNES_Mirroring( 3 ); /* One Screen 0x2400 */ + break; + } + break; + + case 0xa000: + /* Set ROM Banks */ + byData %= ( NesHeader.byRomSize << 1 ); + ROMBANK1 = ROMPAGE( byData ); + break; + + case 0xb000: + /* Set PPU Banks */ + byData >>= 1; + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 0 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0xb001: + /* Set PPU Banks */ + byData >>= 1; + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 1 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0xc000: + /* Set PPU Banks */ + byData >>= 1; + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 2 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0xc001: + /* Set PPU Banks */ + byData >>= 1; + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 3 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0xd000: + /* Set PPU Banks */ + byData >>= 1; + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 4 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0xd001: + /* Set PPU Banks */ + byData >>= 1; + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 5 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0xe000: + /* Set PPU Banks */ + byData >>= 1; + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 6 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0xe001: + /* Set PPU Banks */ + byData >>= 1; + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 7 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_023.c b/apps/plugins/infones/mapper/InfoNES_Mapper_023.c new file mode 100644 index 0000000..4932bf4 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_023.c @@ -0,0 +1,294 @@ +/*===================================================================*/ +/* */ +/* Mapper 23 (Konami VRC2 type B) */ +/* */ +/*===================================================================*/ + +BYTE Map23_Regs[ 9 ]; + +BYTE Map23_IRQ_Enable; +BYTE Map23_IRQ_Cnt; +BYTE Map23_IRQ_Latch; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 23 */ +/*-------------------------------------------------------------------*/ +void Map23_Init() +{ + int nPage; + /* Initialize Mapper */ + MapperInit = Map23_Init; + + /* Write to Mapper */ + MapperWrite = Map23_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Initialize State Flag */ + Map23_Regs[ 0 ] = 0; + Map23_Regs[ 1 ] = 1; + Map23_Regs[ 2 ] = 2; + Map23_Regs[ 3 ] = 3; + Map23_Regs[ 4 ] = 4; + Map23_Regs[ 5 ] = 5; + Map23_Regs[ 6 ] = 6; + Map23_Regs[ 7 ] = 7; + Map23_Regs[ 8 ] = 0; + + Map23_IRQ_Enable = 0; + Map23_IRQ_Cnt = 0; + Map23_IRQ_Latch = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 23 Write Function */ +/*-------------------------------------------------------------------*/ +void Map23_Write( WORD wAddr, BYTE byData ) +{ + switch ( wAddr ) + { + case 0x8000: + case 0x8004: + case 0x8008: + case 0x800c: + byData %= ( NesHeader.byRomSize << 1 ); + + if ( Map23_Regs[ 8 ] ) + { + ROMBANK2 = ROMPAGE( byData ); + } else { + ROMBANK0 = ROMPAGE( byData ); + } + break; + + case 0x9000: + switch ( byData & 0x03 ) + { + case 0x00: + InfoNES_Mirroring( 1 ); + break; + case 0x01: + InfoNES_Mirroring( 0 ); + break; + case 0x02: + InfoNES_Mirroring( 3 ); + break; + case 0x03: + InfoNES_Mirroring( 2 ); + break; + } + break; + + case 0x9008: + Map23_Regs[ 8 ] = byData & 0x02; + break; + + case 0xa000: + case 0xa004: + case 0xa008: + case 0xa00c: + byData %= ( NesHeader.byRomSize << 1 ); + ROMBANK1 = ROMPAGE( byData ); + break; + + case 0xb000: + Map23_Regs[ 0 ] = ( Map23_Regs[ 0 ] & 0xf0 ) | ( byData & 0x0f ); + PPUBANK[ 0 ] = VROMPAGE( Map23_Regs[ 0 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xb001: + case 0xb004: + Map23_Regs[ 0 ] = ( Map23_Regs[ 0 ] & 0x0f ) | ( ( byData & 0x0f ) << 4 ); + PPUBANK[ 0 ] = VROMPAGE( Map23_Regs[ 0 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xb002: + case 0xb008: + Map23_Regs[ 1 ] = ( Map23_Regs[ 1 ] & 0xf0 ) | ( byData & 0x0f ); + PPUBANK[ 1 ] = VROMPAGE( Map23_Regs[ 1 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xb003: + case 0xb00c: + Map23_Regs[ 1 ] = ( Map23_Regs[ 1 ] & 0x0f ) | ( ( byData & 0x0f ) << 4 ); + PPUBANK[ 1 ] = VROMPAGE( Map23_Regs[ 1 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xc000: + Map23_Regs[ 2 ] = ( Map23_Regs[ 2 ] & 0xf0 ) | ( byData & 0x0f ); + PPUBANK[ 2 ] = VROMPAGE( Map23_Regs[ 2 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xc001: + case 0xc004: + Map23_Regs[ 2 ] = ( Map23_Regs[ 2 ] & 0x0f ) | ( ( byData & 0x0f ) << 4 ); + PPUBANK[ 2 ] = VROMPAGE( Map23_Regs[ 2 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xc002: + case 0xc008: + Map23_Regs[ 3 ] = ( Map23_Regs[ 3 ] & 0xf0 ) | ( byData & 0x0f ); + PPUBANK[ 3 ] = VROMPAGE( Map23_Regs[ 3 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xc003: + case 0xc00c: + Map23_Regs[ 3 ] = ( Map23_Regs[ 3 ] & 0x0f ) | ( ( byData & 0x0f ) << 4 ); + PPUBANK[ 3 ] = VROMPAGE( Map23_Regs[ 3 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xd000: + Map23_Regs[ 4 ] = ( Map23_Regs[ 4 ] & 0xf0 ) | ( byData & 0x0f ); + PPUBANK[ 4 ] = VROMPAGE( Map23_Regs[ 4 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xd001: + case 0xd004: + Map23_Regs[ 4 ] = ( Map23_Regs[ 4 ] & 0x0f ) | ( ( byData & 0x0f ) << 4 ); + PPUBANK[ 4 ] = VROMPAGE( Map23_Regs[ 4 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xd002: + case 0xd008: + Map23_Regs[ 5 ] = ( Map23_Regs[ 5 ] & 0xf0 ) | ( byData & 0x0f ); + PPUBANK[ 5 ] = VROMPAGE( Map23_Regs[ 5 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xd003: + case 0xd00c: + Map23_Regs[ 5 ] = ( Map23_Regs[ 5 ] & 0x0f ) | ( ( byData & 0x0f ) << 4 ); + PPUBANK[ 5 ] = VROMPAGE( Map23_Regs[ 5 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xe000: + Map23_Regs[ 6 ] = ( Map23_Regs[ 6 ] & 0xf0 ) | ( byData & 0x0f ); + PPUBANK[ 6 ] = VROMPAGE( Map23_Regs[ 6 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xe001: + case 0xe004: + Map23_Regs[ 6 ] = ( Map23_Regs[ 6 ] & 0x0f ) | ( ( byData & 0x0f ) << 4 ); + PPUBANK[ 6 ] = VROMPAGE( Map23_Regs[ 6 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xe002: + case 0xe008: + Map23_Regs[ 7 ] = ( Map23_Regs[ 7 ] & 0xf0 ) | ( byData & 0x0f ); + PPUBANK[ 7 ] = VROMPAGE( Map23_Regs[ 7 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xe003: + case 0xe00c: + Map23_Regs[ 7 ] = ( Map23_Regs[ 7 ] & 0x0f ) | ( ( byData & 0x0f ) << 4 ); + PPUBANK[ 7 ] = VROMPAGE( Map23_Regs[ 7 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xf000: + Map23_IRQ_Latch = ( Map23_IRQ_Latch & 0xf0 ) | ( byData & 0x0f ); + break; + + case 0xf004: + Map23_IRQ_Latch = ( Map23_IRQ_Latch & 0xf0 ) | ( ( byData & 0x0f ) << 4 ); + break; + + case 0xf008: + Map23_IRQ_Enable = byData & 0x03; + if ( Map23_IRQ_Enable & 0x02 ) + { + Map23_IRQ_Cnt = Map23_IRQ_Latch; + } + break; + + case 0xf00c: + if ( Map23_IRQ_Enable & 0x01 ) + { + Map23_IRQ_Enable |= 0x02; + } else { + Map23_IRQ_Enable &= 0x01; + } + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 23 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map23_HSync() +{ +/* + * Callback at HSync + * + */ + if ( Map23_IRQ_Enable & 0x02 ) + { + if ( Map23_IRQ_Cnt == 0xff ) + { + IRQ_REQ; + + Map23_IRQ_Cnt = Map23_IRQ_Latch; + if ( Map23_IRQ_Enable & 0x01 ) + { + Map23_IRQ_Enable |= 0x02; + } else { + Map23_IRQ_Enable &= 0x01; + } + } else { + Map23_IRQ_Cnt++; + } + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_024.c b/apps/plugins/infones/mapper/InfoNES_Mapper_024.c new file mode 100644 index 0000000..0b91480 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_024.c @@ -0,0 +1,178 @@ +/*===================================================================*/ +/* */ +/* Mapper 24 (Konami VRC6) */ +/* */ +/*===================================================================*/ + +BYTE Map24_IRQ_Count; +BYTE Map24_IRQ_State; +BYTE Map24_IRQ_Latch; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 24 */ +/*-------------------------------------------------------------------*/ +void Map24_Init() +{ + /* Initialize Mapper */ + MapperInit = Map24_Init; + + /* Write to Mapper */ + MapperWrite = Map24_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map24_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 24 Write Function */ +/*-------------------------------------------------------------------*/ +void Map24_Write( WORD wAddr, BYTE byData ) +{ + switch ( wAddr ) + { + case 0x8000: + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( ( byData + 0 ) % ( NesHeader.byRomSize << 1) ); + ROMBANK1 = ROMPAGE( ( byData + 1 ) % ( NesHeader.byRomSize << 1) ); + break; + + case 0xb003: + /* Name Table Mirroring */ + switch ( byData & 0x0c ) + { + case 0x00: + InfoNES_Mirroring( 1 ); /* Vertical */ + break; + case 0x04: + InfoNES_Mirroring( 0 ); /* Horizontal */ + break; + case 0x08: + InfoNES_Mirroring( 3 ); /* One Screen 0x2000 */ + break; + case 0x0c: + InfoNES_Mirroring( 2 ); /* One Screen 0x2400 */ + break; + } + break; + + case 0xC000: + ROMBANK2 = ROMPAGE( byData % ( NesHeader.byRomSize << 1) ); + break; + + case 0xD000: + PPUBANK[ 0 ] = VROMPAGE( byData % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xD001: + PPUBANK[ 1 ] = VROMPAGE( byData % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xD002: + PPUBANK[ 2 ] = VROMPAGE( byData % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xD003: + PPUBANK[ 3 ] = VROMPAGE( byData % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xE000: + PPUBANK[ 4 ] = VROMPAGE( byData % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xE001: + PPUBANK[ 5 ] = VROMPAGE( byData % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xE002: + PPUBANK[ 6 ] = VROMPAGE( byData % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xE003: + PPUBANK[ 7 ] = VROMPAGE( byData % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xF000: + Map24_IRQ_Latch = byData; + break; + + case 0xF001: + Map24_IRQ_State = byData & 0x03; + if(Map24_IRQ_State & 0x02) + { + Map24_IRQ_Count = Map24_IRQ_Latch; + } + break; + + case 0xF002: + if(Map24_IRQ_State & 0x01) + { + Map24_IRQ_State |= 0x02; + } + else + { + Map24_IRQ_State &= 0x01; + } + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 24 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map24_HSync() +{ +/* + * Callback at HSync + * + */ + if(Map24_IRQ_State & 0x02) + { + if(Map24_IRQ_Count == 0xFF) + { + IRQ_REQ; + Map24_IRQ_Count = Map24_IRQ_Latch; + } + else + { + Map24_IRQ_Count++; + } + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_025.c b/apps/plugins/infones/mapper/InfoNES_Mapper_025.c new file mode 100644 index 0000000..83f01ea --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_025.c @@ -0,0 +1,194 @@ +/*===================================================================*/ +/* */ +/* Mapper 25 (Konami VRC4 type B) */ +/* */ +/*===================================================================*/ + +BYTE Map25_Bank_Selector; +BYTE Map25_VBank[16]; + +BYTE Map25_IRQ_Count; +BYTE Map25_IRQ_State; +BYTE Map25_IRQ_Latch; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 25 */ +/*-------------------------------------------------------------------*/ +void Map25_Init() +{ + int nPage; + + /* Initialize Mapper */ + MapperInit = Map25_Init; + + /* Write to Mapper */ + MapperWrite = Map25_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map25_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Reset VBank Registers */ + for (nPage = 0; nPage < 16; nPage++) + Map25_VBank[ nPage ] = 0x00; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 25 Write Function */ +/*-------------------------------------------------------------------*/ +void Map25_Write( WORD wAddr, BYTE byData ) +{ + int nBank; + + switch ( wAddr ) + { + case 0x8000: + /* Set ROM Banks */ + byData %= ( NesHeader.byRomSize << 1 ); + if ( Map25_Bank_Selector ) + { + ROMBANK2 = ROMPAGE( byData ); + } else { + ROMBANK0 = ROMPAGE( byData ); + } + break; + + case 0x9000: + /* Name Table Mirroring */ + switch (byData & 0x03) + { + case 0: + InfoNES_Mirroring( 1 ); /* Vertical */ + break; + case 1: + InfoNES_Mirroring( 0 ); /* Horizontal */ + break; + case 2: + InfoNES_Mirroring( 2 ); /* One Screen 0x2000 */ + break; + case 3: + InfoNES_Mirroring( 3 ); /* One Screen 0x2400 */ + break; + } + break; + + case 0x9002: + /* TODO: SaveRAM Toggle */ + /* $8000 Switching Mode */ + Map25_Bank_Selector = byData & 0x02; + break; + + case 0xa000: + /* Set ROM Banks */ + byData %= ( NesHeader.byRomSize << 1 ); + ROMBANK1 = ROMPAGE( byData ); + break; + + default: + /* Set PPU Banks */ + switch ( wAddr & 0xfffc) + { + case 0xb000: + Map25_VBank[ 0 + ( wAddr & 0x0003 ) ] = byData & 0x0f; + nBank = 0 + ( wAddr & 0x0001 ); + Map25_Sync_Vrom( nBank ); + break; + + case 0xc000: + Map25_VBank[ 4 + ( wAddr & 0x0003 ) ] = byData & 0x0f; + nBank = 2 + ( wAddr & 0x0001 ); + Map25_Sync_Vrom( nBank ); + break; + + case 0xd000: + Map25_VBank[ 8 + ( wAddr & 0x0003 ) ] = byData & 0x0f; + nBank = 4 + ( wAddr & 0x0001 ); + Map25_Sync_Vrom( nBank ); + break; + + case 0xe000: + Map25_VBank[ 12 + ( wAddr & 0x0003 ) ] = byData & 0x0f; + nBank = 6 + ( wAddr & 0x0001 ); + Map25_Sync_Vrom( nBank ); + break; + + case 0xf000: + switch ( wAddr & 0x0003 ) + { + case 0: + case 1: + Map25_IRQ_Latch = byData; + break; + case 2: + Map25_IRQ_State = ( byData & 0x01 ) ? Map25_IRQ_State : 0x00; + Map25_IRQ_State = ( byData & 0x02 ) ? 0x01 : Map25_IRQ_State; + Map25_IRQ_Count = Map25_IRQ_Latch; + break; + case 3: + Map25_IRQ_State = ( Map25_IRQ_State << 1 ) | ( Map25_IRQ_State & 1 ); + break; + } + break; + } + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 25 Sync VROM Function */ +/*-------------------------------------------------------------------*/ +void Map25_Sync_Vrom( int nBank ) +{ + BYTE byValue; + + byValue = Map25_VBank[ ( nBank << 1 ) - ( nBank & 0x01 ) ]; + byValue |= Map25_VBank[ ( nBank << 1 ) - ( nBank & 0x01 ) + 2] << 4; + byValue %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ nBank ] = VROMPAGE( byValue ); + InfoNES_SetupChr(); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 25 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map25_HSync() +{ +/* + * Callback at HSync + * + */ + if ( ( Map25_IRQ_State & 0x02 ) && ( ++Map25_IRQ_Count == 0 ) ) + { + IRQ_REQ; + Map25_IRQ_Count = Map25_IRQ_Latch; + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_026.c b/apps/plugins/infones/mapper/InfoNES_Mapper_026.c new file mode 100644 index 0000000..c25216e --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_026.c @@ -0,0 +1,201 @@ +/*===================================================================*/ +/* */ +/* Mapper 26 (Konami VRC 6V) */ +/* */ +/*===================================================================*/ + +BYTE Map26_IRQ_Enable; +BYTE Map26_IRQ_Cnt; +BYTE Map26_IRQ_Latch; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 26 */ +/*-------------------------------------------------------------------*/ +void Map26_Init() +{ + int nPage; + /* Initialize Mapper */ + MapperInit = Map26_Init; + + /* Write to Mapper */ + MapperWrite = Map26_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map26_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Initialize IRQ Registers */ + Map26_IRQ_Enable = 0; + Map26_IRQ_Cnt = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 26 Write Function */ +/*-------------------------------------------------------------------*/ +void Map26_Write( WORD wAddr, BYTE byData ) +{ + switch ( wAddr ) + { + /* Set ROM Banks */ + case 0x8000: + byData <<= 1; + byData %= ( NesHeader.byRomSize << 1 ); + + ROMBANK0 = ROMPAGE( byData + 0 ); + ROMBANK1 = ROMPAGE( byData + 1 ); + break; + + /* Name Table Mirroring */ + case 0xb003: + switch ( byData & 0x7f ) + { + case 0x08: + case 0x2c: + InfoNES_Mirroring( 2 ); /* One Screen 0x2400 */ + break; + case 0x20: + InfoNES_Mirroring( 1 ); /* Vertical */ + break; + case 0x24: + InfoNES_Mirroring( 0 ); /* Horizontal */ + break; + case 0x28: + InfoNES_Mirroring( 3 ); /* One Screen 0x2000 */ + break; + } + break; + + /* Set ROM Banks */ + case 0xc000: + byData %= ( NesHeader.byRomSize << 1 ); + ROMBANK2 = ROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + /* Set PPU Bank */ + case 0xd000: + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 0 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0xd001: + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 2 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0xd002: + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 1 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0xd003: + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 3 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0xe000: + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 4 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0xe001: + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 6 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0xe002: + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 5 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0xe003: + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 7 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + /* Set IRQ Registers */ + case 0xf000: + Map26_IRQ_Latch = byData; + break; + + case 0xf001: + Map26_IRQ_Enable = byData & 0x01; + break; + + case 0xf002: + Map26_IRQ_Enable = byData & 0x03; + + if ( Map26_IRQ_Enable & 0x02 ) + { + Map26_IRQ_Cnt = Map26_IRQ_Latch; + } + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 26 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map26_HSync() +{ +/* + * Callback at HSync + * + */ + if ( Map26_IRQ_Enable & 0x03 ) + { + if ( Map26_IRQ_Cnt >= 0xfe ) + { + IRQ_REQ; + Map26_IRQ_Cnt = Map26_IRQ_Latch; + Map26_IRQ_Enable = 0; + } else { + Map26_IRQ_Cnt++; + } + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_032.c b/apps/plugins/infones/mapper/InfoNES_Mapper_032.c new file mode 100644 index 0000000..fe75b6e --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_032.c @@ -0,0 +1,108 @@ +/*===================================================================*/ +/* */ +/* Mapper 32 (Irem G-101) */ +/* */ +/*===================================================================*/ + +BYTE Map32_Saved; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 32 */ +/*-------------------------------------------------------------------*/ +void Map32_Init() +{ + int nPage; + /* Initialize Mapper */ + MapperInit = Map32_Init; + + /* Write to Mapper */ + MapperWrite = Map32_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Initialize state flag */ + Map32_Saved = 0x00; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 32 Write Function */ +/*-------------------------------------------------------------------*/ +void Map32_Write( WORD wAddr, BYTE byData ) +{ + switch ( wAddr & 0xf000 ) + { + case 0x8000: + /* Set ROM Banks */ + byData %= ( NesHeader.byRomSize << 1 ); + + if ( Map32_Saved & 0x02 ) + { + ROMBANK2 = ROMPAGE( byData ); + } else { + ROMBANK0 = ROMPAGE( byData ); + } + break; + + case 0x9000: + Map32_Saved = byData; + + // Name Table Mirroring + InfoNES_Mirroring( byData & 0x01 ); + break; + + case 0xa000: + /* Set ROM Banks */ + byData %= ( NesHeader.byRomSize << 1 ); + ROMBANK1 = ROMPAGE( byData ); + break; + + case 0xb000: + /* Set PPU Banks */ + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ wAddr & 0x0007 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + default: + break; + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_033.c b/apps/plugins/infones/mapper/InfoNES_Mapper_033.c new file mode 100644 index 0000000..e6c3cb1 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_033.c @@ -0,0 +1,199 @@ +/*===================================================================*/ +/* */ +/* Mapper 33 (Taito TC0190/TC0350) */ +/* */ +/*===================================================================*/ + +BYTE Map33_Regs[ 8 ]; +BYTE Map33_Switch; + +BYTE Map33_IRQ_Enable; +BYTE Map33_IRQ_Cnt; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 33 */ +/*-------------------------------------------------------------------*/ +void Map33_Init() +{ + int nPage; + /* Initialize Mapper */ + MapperInit = Map33_Init; + + /* Write to Mapper */ + MapperWrite = Map33_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( nPage = 0; nPage < 8; ++nPage ) + { + PPUBANK[ nPage ] = VROMPAGE( nPage ); + Map33_Regs[ nPage ] = nPage; + } + InfoNES_SetupChr(); + } + else + { + for ( nPage = 0; nPage < 8; ++nPage ) + { + Map33_Regs[ nPage ] = 0; + } + } + + /* Initialize State Registers */ + Map33_Switch = 0; + Map33_IRQ_Enable = 0; + Map33_IRQ_Cnt = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 33 Write Function */ +/*-------------------------------------------------------------------*/ +void Map33_Write( WORD wAddr, BYTE byData ) +{ + /* Set ROM Banks */ + switch ( wAddr ) + { + case 0x8000: + byData %= ( NesHeader.byRomSize << 1 ); + ROMBANK0 = ROMPAGE( byData ); + break; + + case 0x8001: + byData %= ( NesHeader.byRomSize << 1 ); + ROMBANK1 = ROMPAGE( byData ); + break; + + case 0x8002: + Map33_Regs[ 0 ] = byData * 2; + Map33_Regs[ 1 ] = byData * 2 + 1; + + PPUBANK[ 0 ] = VROMPAGE( Map33_Regs[ 0 ] % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( Map33_Regs[ 1 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0x8003: + Map33_Regs[ 2 ] = byData * 2; + Map33_Regs[ 3 ] = byData * 2 + 1; + + PPUBANK[ 2 ] = VROMPAGE( Map33_Regs[ 2 ] % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( Map33_Regs[ 3 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xa000: + Map33_Regs[ 4 ] = byData; + PPUBANK[ 4 ] = VROMPAGE( Map33_Regs[ 4 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xa001: + Map33_Regs[ 5 ] = byData; + PPUBANK[ 5 ] = VROMPAGE( Map33_Regs[ 5 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xa002: + Map33_Regs[ 6 ] = byData; + PPUBANK[ 6 ] = VROMPAGE( Map33_Regs[ 6 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xa003: + Map33_Regs[ 7 ] = byData; + PPUBANK[ 7 ] = VROMPAGE( Map33_Regs[ 7 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xc000: + Map33_IRQ_Cnt = byData; + break; + + case 0xc001: + case 0xc002: + case 0xe001: + case 0xe002: + if ( Map33_IRQ_Cnt == byData ) + { + Map33_IRQ_Enable = 0xff; + } else { + Map33_IRQ_Enable = byData; + } + break; + + case 0xe000: + if ( byData & 0x40 ) + { + InfoNES_Mirroring( 0 ); + } else { + InfoNES_Mirroring( 1 ); + } + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 33 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map33_HSync() +{ +/* + * Callback at HSync + * + */ + if ( Map33_IRQ_Enable ) + { + if ( Map33_IRQ_Enable == 0xff ) + { + if ( PPU_Scanline == (WORD)( 0xff - Map33_IRQ_Cnt ) ) + { + IRQ_REQ; + Map33_IRQ_Cnt = 0; + Map33_IRQ_Enable = 0; + } + } else { + if ( Map33_IRQ_Cnt == 0xff ) + { + IRQ_REQ; + Map33_IRQ_Cnt = 0; + Map33_IRQ_Enable = 0; + } else { + Map33_IRQ_Cnt++; + } + } + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_034.c b/apps/plugins/infones/mapper/InfoNES_Mapper_034.c new file mode 100644 index 0000000..d990d4c --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_034.c @@ -0,0 +1,118 @@ +/*===================================================================*/ +/* */ +/* Mapper 34 (Nina-1) */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 34 */ +/*-------------------------------------------------------------------*/ +void Map34_Init() +{ + int nPage; + /* Initialize Mapper */ + MapperInit = Map34_Init; + + /* Write to Mapper */ + MapperWrite = Map34_Write; + + /* Write to SRAM */ + MapperSram = Map34_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 34 Write Function */ +/*-------------------------------------------------------------------*/ +void Map34_Write( WORD wAddr, BYTE byData ) +{ + /* Set ROM Banks */ + byData <<= 2; + byData %= ( NesHeader.byRomSize << 1); + + ROMBANK0 = ROMPAGE( byData ); + ROMBANK1 = ROMPAGE( byData + 1 ); + ROMBANK2 = ROMPAGE( byData + 2 ); + ROMBANK3 = ROMPAGE( byData + 3 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 34 Write to SRAM Function */ +/*-------------------------------------------------------------------*/ +void Map34_Sram( WORD wAddr, BYTE byData ) +{ + switch(wAddr) + { + /* Set ROM Banks */ + case 0x7ffd: + byData <<= 2; + byData %= ( NesHeader.byRomSize << 1 ); + + ROMBANK0 = ROMPAGE( byData ); + ROMBANK1 = ROMPAGE( byData + 1 ); + ROMBANK2 = ROMPAGE( byData + 2 ); + ROMBANK3 = ROMPAGE( byData + 3 ); + break; + + /* Set PPU Banks */ + case 0x7ffe: + byData <<= 2; + byData %= ( NesHeader.byVRomSize << 3 ); + + PPUBANK[ 0 ] = VROMPAGE( byData ); + PPUBANK[ 1 ] = VROMPAGE( byData + 1 ); + PPUBANK[ 2 ] = VROMPAGE( byData + 2 ); + PPUBANK[ 3 ] = VROMPAGE( byData + 3 ); + InfoNES_SetupChr(); + break; + + /* Set PPU Banks */ + case 0x7fff: + byData <<= 2; + byData %= ( NesHeader.byVRomSize << 3 ); + + PPUBANK[ 4 ] = VROMPAGE( byData ); + PPUBANK[ 5 ] = VROMPAGE( byData + 1 ); + PPUBANK[ 6 ] = VROMPAGE( byData + 2 ); + PPUBANK[ 7 ] = VROMPAGE( byData + 3 ); + InfoNES_SetupChr(); + break; + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_040.c b/apps/plugins/infones/mapper/InfoNES_Mapper_040.c new file mode 100644 index 0000000..5c94f25 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_040.c @@ -0,0 +1,112 @@ +/*===================================================================*/ +/* */ +/* Mapper 40 (SMB2J) */ +/* */ +/*===================================================================*/ + +BYTE Map40_IRQ_Enable; +DWORD Map40_Line_To_IRQ; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 40 */ +/*-------------------------------------------------------------------*/ +void Map40_Init() +{ + int nPage; + /* Initialize Mapper */ + MapperInit = Map40_Init; + + /* Write to Mapper */ + MapperWrite = Map40_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map40_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = ROMPAGE( 6 ); + + /* Initialize IRQ Registers */ + Map40_IRQ_Enable = 0; + Map40_Line_To_IRQ = 0; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 4 ); + ROMBANK1 = ROMPAGE( 5 ); + ROMBANK2 = ROMPAGE( 0 ); + ROMBANK3 = ROMPAGE( 7 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 40 Write Function */ +/*-------------------------------------------------------------------*/ +void Map40_Write( WORD wAddr, BYTE byData ) +{ + switch ( wAddr & 0xe000 ) + { + case 0x8000: + Map40_IRQ_Enable = 0; + break; + + case 0xa000: + Map40_IRQ_Enable = 1; + Map40_Line_To_IRQ = 37; + break; + + case 0xc000: + break; + + case 0xe000: + /* Set ROM Banks */ + ROMBANK2 = ROMPAGE ( ( byData & 0x07 ) % ( NesHeader.byRomSize << 1 ) ); + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 40 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map40_HSync() +{ +/* + * Callback at HSync + * + */ + if ( Map40_IRQ_Enable ) + { + if ( ( --Map40_Line_To_IRQ ) <= 0 ) + { + IRQ_REQ; + } + } +} + +/* End of InfoNES_Mapper_40.cpp */ diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_041.c b/apps/plugins/infones/mapper/InfoNES_Mapper_041.c new file mode 100644 index 0000000..06dc2df --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_041.c @@ -0,0 +1,120 @@ +/*===================================================================*/ +/* */ +/* Mapper 41 () */ +/* */ +/*===================================================================*/ + +BYTE Map41_Regs[ 2 ]; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 41 */ +/*-------------------------------------------------------------------*/ +void Map41_Init() +{ + /* Initialize Mapper */ + MapperInit = Map41_Init; + + /* Write to Mapper */ + MapperWrite = Map41_Write; + + /* Write to SRAM */ + MapperSram = Map41_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 41 Write Function */ +/*-------------------------------------------------------------------*/ +void Map41_Write( WORD wAddr, BYTE byData ) +{ + /* Set PPU Banks */ + if ( Map41_Regs[ 0 ] ) + { + BYTE byChrBank; + + byChrBank = Map41_Regs[ 1 ] | ( byData & 0x0003 ); + byChrBank <<= 3; + byChrBank %= ( NesHeader.byVRomSize << 3 ); + + PPUBANK[ 0 ] = VROMPAGE( byChrBank ); + PPUBANK[ 1 ] = VROMPAGE( byChrBank + 1 ); + PPUBANK[ 2 ] = VROMPAGE( byChrBank + 2 ); + PPUBANK[ 3 ] = VROMPAGE( byChrBank + 3 ); + PPUBANK[ 4 ] = VROMPAGE( byChrBank + 4 ); + PPUBANK[ 5 ] = VROMPAGE( byChrBank + 5 ); + PPUBANK[ 6 ] = VROMPAGE( byChrBank + 6 ); + PPUBANK[ 7 ] = VROMPAGE( byChrBank + 7 ); + + InfoNES_SetupChr(); + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 41 Write to SRAM Function */ +/*-------------------------------------------------------------------*/ +void Map41_Sram( WORD wAddr, BYTE byData ) +{ + BYTE byBank; + + if ( wAddr < 0x6800 ) + { + byData = ( BYTE )( wAddr & 0xff ); + + /* Set CPU Banks */ + byBank = ( byData & 0x07 ) << 2; + byBank %= ( NesHeader.byRomSize << 1 ); + + ROMBANK0 = ROMPAGE( byBank ); + ROMBANK1 = ROMPAGE( byBank + 1 ); + ROMBANK2 = ROMPAGE( byBank + 2 ); + ROMBANK3 = ROMPAGE( byBank + 3 ); + + Map41_Regs[ 0 ] = ( byData & 0x04 ); + Map41_Regs[ 1 ] = ( byData & 0x18 ) >> 1; + + /* Name Table Mirroring */ + if ( byData & 0x20 ) + { + InfoNES_Mirroring( 0 ); /* Horizontal */ + } else { + InfoNES_Mirroring( 1 ); /* Vertical */ + } + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_042.c b/apps/plugins/infones/mapper/InfoNES_Mapper_042.c new file mode 100644 index 0000000..0411942 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_042.c @@ -0,0 +1,117 @@ +/*===================================================================*/ +/* */ +/* Mapper 42 (Pirates) */ +/* */ +/*===================================================================*/ + +BYTE Map42_IRQ_Cnt; +BYTE Map42_IRQ_Enable; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 42 */ +/*-------------------------------------------------------------------*/ +void Map42_Init() +{ + /* Initialize Mapper */ + MapperInit = Map42_Init; + + /* Write to Mapper */ + MapperWrite = Map42_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map42_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = ROMPAGE( 0 ); + + /* Set ROM Banks */ + ROMBANK0 = ROMLASTPAGE( 3 ); + ROMBANK1 = ROMLASTPAGE( 2 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 42 Write Function */ +/*-------------------------------------------------------------------*/ +void Map42_Write( WORD wAddr, BYTE byData ) +{ + switch ( wAddr & 0xe003 ) + { + /* Set ROM Banks */ + case 0xe000: + SRAMBANK = ROMPAGE( ( byData & 0x0f ) % ( NesHeader.byRomSize << 1 ) ); + break; + + case 0xe001: + if ( byData & 0x08 ) + { + InfoNES_Mirroring( 0 ); + } else { + InfoNES_Mirroring( 1 ); + } + break; + + case 0xe002: + if ( byData & 0x02 ) + { + Map42_IRQ_Enable = 1; + } else { + Map42_IRQ_Enable = 0; + Map42_IRQ_Cnt = 0; + } + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 42 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map42_HSync() +{ +/* + * Callback at HSync + * + */ + if ( Map42_IRQ_Enable ) + { + if ( Map42_IRQ_Cnt < 215 ) + { + Map42_IRQ_Cnt++; + } + if ( Map42_IRQ_Cnt == 215 ) + { + IRQ_REQ; + Map42_IRQ_Enable = 0; + } + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_043.c b/apps/plugins/infones/mapper/InfoNES_Mapper_043.c new file mode 100644 index 0000000..459dda7 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_043.c @@ -0,0 +1,138 @@ +/*===================================================================*/ +/* */ +/* Mapper 43 (SMB2J) */ +/* */ +/*===================================================================*/ + +DWORD Map43_IRQ_Cnt; +BYTE Map43_IRQ_Enable; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 43 */ +/*-------------------------------------------------------------------*/ +void Map43_Init() +{ + /* Initialize Mapper */ + MapperInit = Map43_Init; + + /* Write to Mapper */ + MapperWrite = Map43_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map43_Apu; + + /* Read from APU */ + MapperReadApu = Map43_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map43_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = ROMPAGE( 2 ); + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 1 ); + ROMBANK1 = ROMPAGE( 0 ); + ROMBANK2 = ROMPAGE( 4 ); + ROMBANK3 = ROMPAGE( 9 ); + + /* Initialize State Registers */ + Map43_IRQ_Enable = 1; + Map43_IRQ_Cnt = 0; + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 43 Read from APU Function */ +/*-------------------------------------------------------------------*/ +BYTE Map43_ReadApu( WORD wAddr ) +{ + if ( 0x5000 <= wAddr && wAddr < 0x6000 ) + { + return ROM[ 0x2000*8 + 0x1000 + (wAddr - 0x5000) ]; + } + return (BYTE)(wAddr >> 8); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 43 Write to APU Function */ +/*-------------------------------------------------------------------*/ +void Map43_Apu( WORD wAddr, BYTE byData ) +{ + if( (wAddr&0xF0FF) == 0x4022 ) + { + switch( byData&0x07 ) + { + case 0x00: + case 0x02: + case 0x03: + case 0x04: + ROMBANK2 = ROMPAGE( 4 ); + break; + case 0x01: + ROMBANK2 = ROMPAGE( 3 ); + break; + case 0x05: + ROMBANK2 = ROMPAGE( 7 ); + break; + case 0x06: + ROMBANK2 = ROMPAGE( 5 ); + break; + case 0x07: + ROMBANK2 = ROMPAGE( 6 ); + break; + } + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 43 Write Function */ +/*-------------------------------------------------------------------*/ +void Map43_Write( WORD wAddr, BYTE byData ) +{ + if( wAddr == 0x8122 ) { + if( byData&0x03 ) { + Map43_IRQ_Enable = 1; + } else { + Map43_IRQ_Cnt = 0; + Map43_IRQ_Enable = 0; + } + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 43 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map43_HSync() +{ + if( Map43_IRQ_Enable ) + { + Map43_IRQ_Cnt += 114; + if( Map43_IRQ_Cnt >= 4096 ) { + Map43_IRQ_Cnt -= 4096; + IRQ_REQ; + } + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_044.c b/apps/plugins/infones/mapper/InfoNES_Mapper_044.c new file mode 100644 index 0000000..41bc43a --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_044.c @@ -0,0 +1,296 @@ +/*===================================================================*/ +/* */ +/* Mapper 44 (Nin1) */ +/* */ +/*===================================================================*/ + +BYTE Map44_Regs[ 8 ]; +DWORD Map44_Rom_Bank; +DWORD Map44_Prg0, Map44_Prg1; +DWORD Map44_Chr01, Map44_Chr23; +DWORD Map44_Chr4, Map44_Chr5, Map44_Chr6, Map44_Chr7; + +#define Map44_Chr_Swap() ( Map44_Regs[ 0 ] & 0x80 ) +#define Map44_Prg_Swap() ( Map44_Regs[ 0 ] & 0x40 ) + +BYTE Map44_IRQ_Enable; +BYTE Map44_IRQ_Cnt; +BYTE Map44_IRQ_Latch; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 44 */ +/*-------------------------------------------------------------------*/ +void Map44_Init() +{ + /* Initialize Mapper */ + MapperInit = Map44_Init; + + /* Write to Mapper */ + MapperWrite = Map44_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map44_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Initialize State Registers */ + for ( int nPage = 0; nPage < 8; nPage++ ) + { + Map44_Regs[ nPage ] = 0x00; + } + + /* Set ROM Banks */ + Map44_Rom_Bank = 0; + Map44_Prg0 = 0; + Map44_Prg1 = 1; + Map44_Set_CPU_Banks(); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + Map44_Chr01 = 0; + Map44_Chr23 = 2; + Map44_Chr4 = 4; + Map44_Chr5 = 5; + Map44_Chr6 = 6; + Map44_Chr7 = 7; + Map44_Set_PPU_Banks(); + } else { + Map44_Chr01 = Map44_Chr23 = 0; + Map44_Chr4 = Map44_Chr5 = Map44_Chr6 = Map44_Chr7 = 0; + } + + /* Initialize IRQ Registers */ + Map44_IRQ_Enable = 0; + Map44_IRQ_Cnt = 0; + Map44_IRQ_Latch = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 44 Write Function */ +/*-------------------------------------------------------------------*/ +void Map44_Write( WORD wAddr, BYTE byData ) +{ + DWORD dwBankNum; + + switch ( wAddr & 0xe001 ) + { + case 0x8000: + Map44_Regs[ 0 ] = byData; + Map44_Set_PPU_Banks(); + Map44_Set_CPU_Banks(); + break; + + case 0x8001: + Map44_Regs[ 1 ] = byData; + dwBankNum = Map44_Regs[ 1 ]; + + switch ( Map44_Regs[ 0 ] & 0x07 ) + { + /* Set PPU Banks */ + case 0x00: + if ( NesHeader.byVRomSize > 0 ) + { + dwBankNum &= 0xfe; + Map44_Chr01 = dwBankNum; + Map44_Set_PPU_Banks(); + } + break; + + case 0x01: + if ( NesHeader.byVRomSize > 0 ) + { + dwBankNum &= 0xfe; + Map44_Chr23 = dwBankNum; + Map44_Set_PPU_Banks(); + } + break; + + case 0x02: + if ( NesHeader.byVRomSize > 0 ) + { + Map44_Chr4 = dwBankNum; + Map44_Set_PPU_Banks(); + } + break; + + case 0x03: + if ( NesHeader.byVRomSize > 0 ) + { + Map44_Chr5 = dwBankNum; + Map44_Set_PPU_Banks(); + } + break; + + case 0x04: + if ( NesHeader.byVRomSize > 0 ) + { + Map44_Chr6 = dwBankNum; + Map44_Set_PPU_Banks(); + } + break; + + case 0x05: + if ( NesHeader.byVRomSize > 0 ) + { + Map44_Chr7 = dwBankNum; + Map44_Set_PPU_Banks(); + } + break; + + /* Set ROM Banks */ + case 0x06: + Map44_Prg0 = dwBankNum; + Map44_Set_CPU_Banks(); + break; + + case 0x07: + Map44_Prg1 = dwBankNum; + Map44_Set_CPU_Banks(); + break; + } + break; + + case 0xa000: + Map44_Regs[ 2 ] = byData; + + if ( !ROM_FourScr ) + { + if ( byData & 0x01 ) + { + InfoNES_Mirroring( 0 ); + } else { + InfoNES_Mirroring( 1 ); + } + } + break; + + case 0xa001: + Map44_Rom_Bank = byData & 0x07; + if ( Map44_Rom_Bank == 7 ) + { + Map44_Rom_Bank = 6; + } + Map44_Set_CPU_Banks(); + Map44_Set_PPU_Banks(); + break; + + case 0xc000: + Map44_Regs[ 4 ] = byData; + Map44_IRQ_Cnt = Map44_Regs[ 4 ]; + break; + + case 0xc001: + Map44_Regs[ 5 ] = byData; + Map44_IRQ_Latch = Map44_Regs[ 5 ]; + break; + + case 0xe000: + Map44_Regs[ 6 ] = byData; + Map44_IRQ_Enable = 0; + break; + + case 0xe001: + Map44_Regs[ 7 ] = byData; + Map44_IRQ_Enable = 1; + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 44 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map44_HSync() +{ +/* + * Callback at HSync + * + */ + if ( Map44_IRQ_Enable ) + { + if ( /* 0 <= PPU_Scanline && */ PPU_Scanline <= 239 ) + { + if ( PPU_R1 & R1_SHOW_SCR || PPU_R1 & R1_SHOW_SP ) + { + if ( !( Map44_IRQ_Cnt-- ) ) + { + Map44_IRQ_Cnt = Map44_IRQ_Latch; + IRQ_REQ; + } + } + } + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 44 Set CPU Banks Function */ +/*-------------------------------------------------------------------*/ +void Map44_Set_CPU_Banks() +{ + if ( Map44_Prg_Swap() ) + { + ROMBANK0 = ROMPAGE( ( ( Map44_Rom_Bank << 4 ) + 14 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE( ( ( Map44_Rom_Bank << 4 ) + Map44_Prg1 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMPAGE( ( ( Map44_Rom_Bank << 4 ) + Map44_Prg0 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK3 = ROMPAGE( ( ( Map44_Rom_Bank << 4 ) + 15 ) % ( NesHeader.byRomSize << 1 ) ); + } else { + ROMBANK0 = ROMPAGE( ( ( Map44_Rom_Bank << 4 ) + Map44_Prg0 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE( ( ( Map44_Rom_Bank << 4 ) + Map44_Prg1 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMPAGE( ( ( Map44_Rom_Bank << 4 ) + 14 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK3 = ROMPAGE( ( ( Map44_Rom_Bank << 4 ) + 15 ) % ( NesHeader.byRomSize << 1 ) ); + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 44 Set PPU Banks Function */ +/*-------------------------------------------------------------------*/ +void Map44_Set_PPU_Banks() +{ + if ( NesHeader.byVRomSize > 0 ) + { + if ( Map44_Chr_Swap() ) + { + PPUBANK[ 0 ] = VROMPAGE( ( ( Map44_Rom_Bank << 7 ) + Map44_Chr4 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( ( ( Map44_Rom_Bank << 7 ) + Map44_Chr5 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( ( ( Map44_Rom_Bank << 7 ) + Map44_Chr6 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( ( ( Map44_Rom_Bank << 7 ) + Map44_Chr7 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 4 ] = VROMPAGE( ( ( Map44_Rom_Bank << 7 ) + Map44_Chr01 + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( ( ( Map44_Rom_Bank << 7 ) + Map44_Chr01 + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE( ( ( Map44_Rom_Bank << 7 ) + Map44_Chr23 + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( ( ( Map44_Rom_Bank << 7 ) + Map44_Chr23 + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + } else { + PPUBANK[ 0 ] = VROMPAGE( ( ( Map44_Rom_Bank << 7 ) + Map44_Chr01 + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( ( ( Map44_Rom_Bank << 7 ) + Map44_Chr01 + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( ( ( Map44_Rom_Bank << 7 ) + Map44_Chr23 + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( ( ( Map44_Rom_Bank << 7 ) + Map44_Chr23 + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 4 ] = VROMPAGE( ( ( Map44_Rom_Bank << 7 ) + Map44_Chr4 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( ( ( Map44_Rom_Bank << 7 ) + Map44_Chr5 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE( ( ( Map44_Rom_Bank << 7 ) + Map44_Chr6 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( ( ( Map44_Rom_Bank << 7 ) + Map44_Chr7 ) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + } + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_045.c b/apps/plugins/infones/mapper/InfoNES_Mapper_045.c new file mode 100644 index 0000000..705536d --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_045.c @@ -0,0 +1,347 @@ +/*===================================================================*/ +/* */ +/* Mapper 45 (Pirates) */ +/* */ +/*===================================================================*/ + +BYTE Map45_Regs[7]; +DWORD Map45_P[4],Map45_Prg0,Map45_Prg1,Map45_Prg2,Map45_Prg3; +DWORD Map45_C[4],Map45_Chr0, Map45_Chr1,Map45_Chr2, Map45_Chr3; +DWORD Map45_Chr4, Map45_Chr5, Map45_Chr6, Map45_Chr7; + +BYTE Map45_IRQ_Enable; +BYTE Map45_IRQ_Cnt; +BYTE Map45_IRQ_Latch; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 45 */ +/*-------------------------------------------------------------------*/ +void Map45_Init() +{ + /* Initialize Mapper */ + MapperInit = Map45_Init; + + /* Write to Mapper */ + MapperWrite = Map45_Write; + + /* Write to SRAM */ + MapperSram = Map45_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map45_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + Map45_Prg0 = 0; + Map45_Prg1 = 1; + Map45_Prg2 = NesHeader.byRomSize * 2 - 2; + Map45_Prg3 = NesHeader.byRomSize * 2 - 1; + + ROMBANK0 = ROMPAGE( Map45_Prg0 ); Map45_P[0] = Map45_Prg0; + ROMBANK1 = ROMPAGE( Map45_Prg1 ); Map45_P[1] = Map45_Prg1; + ROMBANK2 = ROMPAGE( Map45_Prg2 ); Map45_P[2] = Map45_Prg2; + ROMBANK3 = ROMPAGE( Map45_Prg3 ); Map45_P[3] = Map45_Prg3; + + /* Set PPU Banks */ + Map45_Chr0 = 0; Map45_C[0] = Map45_Chr0; + Map45_Chr1 = 1; Map45_C[1] = Map45_Chr1; + Map45_Chr2 = 2; Map45_C[2] = Map45_Chr2; + Map45_Chr3 = 3; Map45_C[3] = Map45_Chr3; + Map45_Chr4 = 4; Map45_C[4] = Map45_Chr4; + Map45_Chr5 = 5; Map45_C[5] = Map45_Chr5; + Map45_Chr6 = 6; Map45_C[6] = Map45_Chr6; + Map45_Chr7 = 7; Map45_C[7] = Map45_Chr7; + + for ( int nPage = 0; nPage < 8; ++nPage ) { + PPUBANK[ nPage ] = VROMPAGE( nPage ); + } + InfoNES_SetupChr(); + + /* Initialize IRQ Registers */ + Map45_IRQ_Enable = 0; + Map45_IRQ_Cnt = 0; + Map45_IRQ_Latch = 0; + + Map45_Regs[0] = Map45_Regs[1] = Map45_Regs[2] = Map45_Regs[3] = 0; + Map45_Regs[4] = Map45_Regs[5] = Map45_Regs[6] = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 45 Write to Sram Function */ +/*-------------------------------------------------------------------*/ +void Map45_Sram( WORD wAddr, BYTE byData ) +{ + if(wAddr == 0x6000) + { + Map45_Regs[Map45_Regs[5]] = byData; + Map45_Regs[5]= (Map45_Regs[5]+1) & 0x03; + Map45_Set_CPU_Bank4((BYTE)Map45_Prg0); + Map45_Set_CPU_Bank5((BYTE)Map45_Prg1); + Map45_Set_CPU_Bank6((BYTE)Map45_Prg2); + Map45_Set_CPU_Bank7((BYTE)Map45_Prg3); + Map45_Set_PPU_Banks(); + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 45 Write Function */ +/*-------------------------------------------------------------------*/ +void Map45_Write( WORD wAddr, BYTE byData ) +{ + DWORD swap; + + switch(wAddr & 0xE001) + { + case 0x8000: + if((byData & 0x40) != (Map45_Regs[6] & 0x40)) + { + swap = Map45_Prg0; Map45_Prg0 = Map45_Prg2; Map45_Prg2 = swap; + swap = Map45_P[0]; Map45_P[0] = Map45_P[2]; Map45_P[2] = swap; + ROMBANK0 = ROMPAGE( Map45_P[0] % ( NesHeader.byRomSize << 1) ); + ROMBANK2 = ROMPAGE( Map45_P[2] % ( NesHeader.byRomSize << 1) ); + } + if (NesHeader.byRomSize > 0) + { + if((byData & 0x80) != (Map45_Regs[6] & 0x80)) + { + swap = Map45_Chr4; Map45_Chr4 = Map45_Chr0; Map45_Chr0 = swap; + swap = Map45_Chr5; Map45_Chr5 = Map45_Chr1; Map45_Chr1 = swap; + swap = Map45_Chr6; Map45_Chr6 = Map45_Chr2; Map45_Chr2 = swap; + swap = Map45_Chr7; Map45_Chr7 = Map45_Chr3; Map45_Chr3 = swap; + swap = Map45_C[4]; Map45_C[4] = Map45_C[0]; Map45_C[0] = swap; + swap = Map45_C[5]; Map45_C[5] = Map45_C[1]; Map45_C[1] = swap; + swap = Map45_C[6]; Map45_C[6] = Map45_C[2]; Map45_C[2] = swap; + swap = Map45_C[7]; Map45_C[7] = Map45_C[3]; Map45_C[3] = swap; + + PPUBANK[ 0 ] = VROMPAGE( Map45_C[0] % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( Map45_C[1] % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( Map45_C[2] % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( Map45_C[3] % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 4 ] = VROMPAGE( Map45_C[4] % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( Map45_C[5] % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE( Map45_C[6] % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( Map45_C[7] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + } + } + Map45_Regs[6] = byData; + break; + + case 0x8001: + switch(Map45_Regs[6] & 0x07) + { + case 0x00: + Map45_Chr0 = (byData & 0xFE)+0; + Map45_Chr1 = (byData & 0xFE)+1; + Map45_Set_PPU_Banks(); + break; + + case 0x01: + Map45_Chr2 = (byData & 0xFE)+0; + Map45_Chr3 = (byData & 0xFE)+1; + Map45_Set_PPU_Banks(); + break; + + case 0x02: + Map45_Chr4 = byData; + Map45_Set_PPU_Banks(); + break; + + case 0x03: + Map45_Chr5 = byData; + Map45_Set_PPU_Banks(); + break; + + case 0x04: + Map45_Chr6 = byData; + Map45_Set_PPU_Banks(); + break; + + case 0x05: + Map45_Chr7 = byData; + Map45_Set_PPU_Banks(); + break; + + case 0x06: + if(Map45_Regs[6] & 0x40) + { + Map45_Prg2 = byData & 0x3F; + Map45_Set_CPU_Bank6(byData); + } + else + { + Map45_Prg0 = byData & 0x3F; + Map45_Set_CPU_Bank4(byData); + } + break; + + case 0x07: + Map45_Prg1 = byData & 0x3F; + Map45_Set_CPU_Bank5(byData); + break; + } + break; + + case 0xA000: + if ( byData & 0x01 ) + { + InfoNES_Mirroring( 0 ); + } else { + InfoNES_Mirroring( 1 ); + } + break; + + case 0xC000: + Map45_IRQ_Cnt = byData; + break; + + case 0xC001: + Map45_IRQ_Latch = byData; + break; + + case 0xE000: + Map45_IRQ_Enable = 0; + break; + + case 0xE001: + Map45_IRQ_Enable = 1; + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 45 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map45_HSync() +{ +/* + * Callback at HSync + * + */ + if(Map45_IRQ_Enable) + { + if ( /* 0 <= PPU_Scanline && */ PPU_Scanline <= 239 ) + { + if ( PPU_R1 & R1_SHOW_SCR || PPU_R1 & R1_SHOW_SP ) + { + if(!(Map45_IRQ_Cnt--)) + { + Map45_IRQ_Cnt = Map45_IRQ_Latch; + IRQ_REQ; + } + } + } + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 45 Set CPU Banks Function */ +/*-------------------------------------------------------------------*/ + +void Map45_Set_CPU_Bank4(BYTE byData) +{ + byData &= (Map45_Regs[3] & 0x3F) ^ 0xFF; + byData &= 0x3F; + byData |= Map45_Regs[1]; + ROMBANK0 = ROMPAGE( byData % ( NesHeader.byRomSize << 1) ); + Map45_P[0] = byData; +} + +void Map45_Set_CPU_Bank5(BYTE byData) +{ + byData &= (Map45_Regs[3] & 0x3F) ^ 0xFF; + byData &= 0x3F; + byData |= Map45_Regs[1]; + ROMBANK1 = ROMPAGE( byData % ( NesHeader.byRomSize << 1) ); + Map45_P[1] = byData; +} + +void Map45_Set_CPU_Bank6(BYTE byData) +{ + byData &= (Map45_Regs[3] & 0x3F) ^ 0xFF; + byData &= 0x3F; + byData |= Map45_Regs[1]; + ROMBANK2 = ROMPAGE( byData % ( NesHeader.byRomSize << 1) ); + Map45_P[2] = byData; +} + +void Map45_Set_CPU_Bank7(BYTE byData) +{ + byData &= (Map45_Regs[3] & 0x3F) ^ 0xFF; + byData &= 0x3F; + byData |= Map45_Regs[1]; + ROMBANK3 = ROMPAGE( byData % ( NesHeader.byRomSize << 1) ); + Map45_P[3] = byData; +} + +/*-------------------------------------------------------------------*/ +/* Mapper 45 Set PPU Banks Function */ +/*-------------------------------------------------------------------*/ +void Map45_Set_PPU_Banks() +{ + BYTE table[16] = + { + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x01,0x03,0x07,0x0F,0x1F,0x3F,0x7F,0xFF + }; + Map45_C[0] = Map45_Chr0; + Map45_C[1] = Map45_Chr1; + Map45_C[2] = Map45_Chr2; + Map45_C[3] = Map45_Chr3; + Map45_C[4] = Map45_Chr4; + Map45_C[5] = Map45_Chr5; + Map45_C[6] = Map45_Chr6; + Map45_C[7] = Map45_Chr7; + for(BYTE i = 0; i < 8; i++) + { + Map45_C[i] &= table[Map45_Regs[2] & 0x0F]; + Map45_C[i] |= Map45_Regs[0] & 0xff; + Map45_C[i] += (BYTE)(Map45_Regs[2] & 0x10) << 4; + } + if(Map45_Regs[6] & 0x80) + { + PPUBANK[ 0 ] = VROMPAGE( Map45_C[4] % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( Map45_C[5] % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( Map45_C[6] % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( Map45_C[7] % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 4 ] = VROMPAGE( Map45_C[0] % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( Map45_C[1] % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE( Map45_C[2] % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( Map45_C[3] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + } + else + { + PPUBANK[ 0 ] = VROMPAGE( Map45_C[0] % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( Map45_C[1] % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( Map45_C[2] % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( Map45_C[3] % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 4 ] = VROMPAGE( Map45_C[4] % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( Map45_C[5] % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE( Map45_C[6] % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( Map45_C[7] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + } +} + + diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_046.c b/apps/plugins/infones/mapper/InfoNES_Mapper_046.c new file mode 100644 index 0000000..a223848 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_046.c @@ -0,0 +1,98 @@ +/*===================================================================*/ +/* */ +/* Mapper 46 (Color Dreams) */ +/* */ +/*===================================================================*/ + +BYTE Map46_Regs[ 4 ]; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 46 */ +/*-------------------------------------------------------------------*/ +void Map46_Init() +{ + /* Initialize Mapper */ + MapperInit = Map46_Init; + + /* Write to Mapper */ + MapperWrite = Map46_Write; + + /* Write to SRAM */ + MapperSram = Map46_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + Map46_Regs[ 0 ] = Map46_Regs[ 1 ] = Map46_Regs[ 2 ] = Map46_Regs[ 3 ] = 0; + Map46_Set_ROM_Banks(); + + /* Name Table Mirroring */ + InfoNES_Mirroring( 1 ); + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 46 Write to SRAM Function */ +/*-------------------------------------------------------------------*/ +void Map46_Sram( WORD wAddr, BYTE byData ) +{ + /* Set ROM Banks */ + Map46_Regs[ 0 ] = byData & 0x0f; + Map46_Regs[ 1 ] = ( byData & 0xf0 ) >> 4; + Map46_Set_ROM_Banks(); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 46 Write Function */ +/*-------------------------------------------------------------------*/ +void Map46_Write( WORD wAddr, BYTE byData ) +{ + /* Set ROM Banks */ + Map46_Regs[ 2 ] = byData & 0x01; + Map46_Regs[ 3 ] = ( byData & 0x70 ) >> 4; + Map46_Set_ROM_Banks(); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 46 Setup ROM Banks Function */ +/*-------------------------------------------------------------------*/ +void Map46_Set_ROM_Banks() +{ + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( ( ( Map46_Regs[ 0 ] << 3 ) + ( Map46_Regs[ 2 ] << 2 ) + 0 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE( ( ( Map46_Regs[ 0 ] << 3 ) + ( Map46_Regs[ 2 ] << 2 ) + 1 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMPAGE( ( ( Map46_Regs[ 0 ] << 3 ) + ( Map46_Regs[ 2 ] << 2 ) + 2 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK3 = ROMPAGE( ( ( Map46_Regs[ 0 ] << 3 ) + ( Map46_Regs[ 2 ] << 2 ) + 3 ) % ( NesHeader.byRomSize << 1 ) ); + + /* Set PPU Banks */ + PPUBANK[ 0 ] = VROMPAGE( ( ( Map46_Regs[ 1 ] << 6 ) + ( Map46_Regs[ 3 ] << 3 ) + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( ( ( Map46_Regs[ 1 ] << 6 ) + ( Map46_Regs[ 3 ] << 3 ) + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( ( ( Map46_Regs[ 1 ] << 6 ) + ( Map46_Regs[ 3 ] << 3 ) + 2 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( ( ( Map46_Regs[ 1 ] << 6 ) + ( Map46_Regs[ 3 ] << 3 ) + 3 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 4 ] = VROMPAGE( ( ( Map46_Regs[ 1 ] << 6 ) + ( Map46_Regs[ 3 ] << 3 ) + 4 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( ( ( Map46_Regs[ 1 ] << 6 ) + ( Map46_Regs[ 3 ] << 3 ) + 5 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE( ( ( Map46_Regs[ 1 ] << 6 ) + ( Map46_Regs[ 3 ] << 3 ) + 6 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( ( ( Map46_Regs[ 1 ] << 6 ) + ( Map46_Regs[ 3 ] << 3 ) + 7 ) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_047.c b/apps/plugins/infones/mapper/InfoNES_Mapper_047.c new file mode 100644 index 0000000..c10c415 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_047.c @@ -0,0 +1,291 @@ +/*===================================================================*/ +/* */ +/* Mapper 47 (MMC) */ +/* */ +/*===================================================================*/ + +BYTE Map47_Regs[ 8 ]; +DWORD Map47_Rom_Bank; +DWORD Map47_Prg0, Map47_Prg1; +DWORD Map47_Chr01, Map47_Chr23; +DWORD Map47_Chr4, Map47_Chr5, Map47_Chr6, Map47_Chr7; + +#define Map47_Chr_Swap() ( Map47_Regs[ 0 ] & 0x80 ) +#define Map47_Prg_Swap() ( Map47_Regs[ 0 ] & 0x40 ) + +BYTE Map47_IRQ_Enable; +BYTE Map47_IRQ_Cnt; +BYTE Map47_IRQ_Latch; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 47 */ +/*-------------------------------------------------------------------*/ +void Map47_Init() +{ + /* Initialize Mapper */ + MapperInit = Map47_Init; + + /* Write to Mapper */ + MapperWrite = Map47_Write; + + /* Write to SRAM */ + MapperSram = Map47_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map47_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Initialize State Registers */ + for ( int nPage = 0; nPage < 8; nPage++ ) + { + Map47_Regs[ nPage ] = 0x00; + } + + /* Set ROM Banks */ + Map47_Rom_Bank = 0; + Map47_Prg0 = 0; + Map47_Prg1 = 1; + Map47_Set_CPU_Banks(); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + Map47_Chr01 = 0; + Map47_Chr23 = 2; + Map47_Chr4 = 4; + Map47_Chr5 = 5; + Map47_Chr6 = 6; + Map47_Chr7 = 7; + Map47_Set_PPU_Banks(); + } else { + Map47_Chr01 = Map47_Chr23 = 0; + Map47_Chr4 = Map47_Chr5 = Map47_Chr6 = Map47_Chr7 = 0; + } + + /* Initialize IRQ Registers */ + Map47_IRQ_Enable = 0; + Map47_IRQ_Cnt = 0; + Map47_IRQ_Latch = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 47 Write to Sram Function */ +/*-------------------------------------------------------------------*/ +void Map47_Sram( WORD wAddr, BYTE byData ) +{ + switch ( wAddr ) + { + case 0x6000: + Map47_Rom_Bank = byData & 0x01; + Map47_Set_CPU_Banks(); + Map47_Set_PPU_Banks(); + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 47 Write Function */ +/*-------------------------------------------------------------------*/ +void Map47_Write( WORD wAddr, BYTE byData ) +{ + DWORD dwBankNum; + + switch ( wAddr & 0xe001 ) + { + case 0x8000: + Map47_Regs[ 0 ] = byData; + Map47_Set_PPU_Banks(); + Map47_Set_CPU_Banks(); + break; + + case 0x8001: + Map47_Regs[ 1 ] = byData; + dwBankNum = Map47_Regs[ 1 ]; + + switch ( Map47_Regs[ 0 ] & 0x07 ) + { + /* Set PPU Banks */ + case 0x00: + if ( NesHeader.byVRomSize > 0 ) + { + dwBankNum &= 0xfe; + Map47_Chr01 = dwBankNum; + Map47_Set_PPU_Banks(); + } + break; + + case 0x01: + if ( NesHeader.byVRomSize > 0 ) + { + dwBankNum &= 0xfe; + Map47_Chr23 = dwBankNum; + Map47_Set_PPU_Banks(); + } + break; + + case 0x02: + if ( NesHeader.byVRomSize > 0 ) + { + Map47_Chr4 = dwBankNum; + Map47_Set_PPU_Banks(); + } + break; + + case 0x03: + if ( NesHeader.byVRomSize > 0 ) + { + Map47_Chr5 = dwBankNum; + Map47_Set_PPU_Banks(); + } + break; + + case 0x04: + if ( NesHeader.byVRomSize > 0 ) + { + Map47_Chr6 = dwBankNum; + Map47_Set_PPU_Banks(); + } + break; + + case 0x05: + if ( NesHeader.byVRomSize > 0 ) + { + Map47_Chr7 = dwBankNum; + Map47_Set_PPU_Banks(); + } + break; + + /* Set ROM Banks */ + case 0x06: + Map47_Prg0 = dwBankNum; + Map47_Set_CPU_Banks(); + break; + + case 0x07: + Map47_Prg1 = dwBankNum; + Map47_Set_CPU_Banks(); + break; + } + break; + + case 0xa000: + Map47_Regs[ 3 ] = byData; + break; + + case 0xc000: + Map47_Regs[ 4 ] = byData; + Map47_IRQ_Cnt = Map47_Regs[ 4 ]; + break; + + case 0xc001: + Map47_Regs[ 5 ] = byData; + Map47_IRQ_Latch = Map47_Regs[ 5 ]; + break; + + case 0xe000: + Map47_Regs[ 6 ] = byData; + Map47_IRQ_Enable = 0; + break; + + case 0xe001: + Map47_Regs[ 7 ] = byData; + Map47_IRQ_Enable = 1; + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 47 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map47_HSync() +{ +/* + * Callback at HSync + * + */ + if ( Map47_IRQ_Enable ) + { + if ( /* 0 <= PPU_Scanline && */ PPU_Scanline <= 239 ) + { + if ( PPU_R1 & R1_SHOW_SCR || PPU_R1 & R1_SHOW_SP ) + { + if ( !( --Map47_IRQ_Cnt ) ) + { + Map47_IRQ_Cnt = Map47_IRQ_Latch; + IRQ_REQ; + } + } + } + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 47 Set CPU Banks Function */ +/*-------------------------------------------------------------------*/ +void Map47_Set_CPU_Banks() +{ + if ( Map47_Prg_Swap() ) + { + ROMBANK0 = ROMPAGE( ( ( Map47_Rom_Bank << 4 ) + 14 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE( ( ( Map47_Rom_Bank << 4 ) + Map47_Prg1 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMPAGE( ( ( Map47_Rom_Bank << 4 ) + Map47_Prg0 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK3 = ROMPAGE( ( ( Map47_Rom_Bank << 4 ) + 15 ) % ( NesHeader.byRomSize << 1 ) ); + } else { + ROMBANK0 = ROMPAGE( ( ( Map47_Rom_Bank << 4 ) + Map47_Prg0 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE( ( ( Map47_Rom_Bank << 4 ) + Map47_Prg1 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMPAGE( ( ( Map47_Rom_Bank << 4 ) + 14 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK3 = ROMPAGE( ( ( Map47_Rom_Bank << 4 ) + 15 ) % ( NesHeader.byRomSize << 1 ) ); + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 47 Set PPU Banks Function */ +/*-------------------------------------------------------------------*/ +void Map47_Set_PPU_Banks() +{ + if ( NesHeader.byVRomSize > 0 ) + { + if ( Map47_Chr_Swap() ) + { + PPUBANK[ 0 ] = VROMPAGE( ( ( Map47_Rom_Bank << 7 ) + Map47_Chr4 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( ( ( Map47_Rom_Bank << 7 ) + Map47_Chr5 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( ( ( Map47_Rom_Bank << 7 ) + Map47_Chr6 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( ( ( Map47_Rom_Bank << 7 ) + Map47_Chr7 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 4 ] = VROMPAGE( ( ( Map47_Rom_Bank << 7 ) + ( Map47_Chr01 + 0 ) ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( ( ( Map47_Rom_Bank << 7 ) + ( Map47_Chr01 + 1 ) ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE( ( ( Map47_Rom_Bank << 7 ) + ( Map47_Chr23 + 0 ) ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( ( ( Map47_Rom_Bank << 7 ) + ( Map47_Chr23 + 1 ) ) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + } else { + PPUBANK[ 0 ] = VROMPAGE( ( ( Map47_Rom_Bank << 7 ) + ( Map47_Chr01 + 0 ) ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( ( ( Map47_Rom_Bank << 7 ) + ( Map47_Chr01 + 1 ) ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( ( ( Map47_Rom_Bank << 7 ) + ( Map47_Chr23 + 0 ) ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( ( ( Map47_Rom_Bank << 7 ) + ( Map47_Chr23 + 1 ) ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 4 ] = VROMPAGE( ( ( Map47_Rom_Bank << 7 ) + Map47_Chr4 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( ( ( Map47_Rom_Bank << 7 ) + Map47_Chr5 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE( ( ( Map47_Rom_Bank << 7 ) + Map47_Chr6 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( ( ( Map47_Rom_Bank << 7 ) + Map47_Chr7 ) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + } + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_048.c b/apps/plugins/infones/mapper/InfoNES_Mapper_048.c new file mode 100644 index 0000000..c0a3b3d --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_048.c @@ -0,0 +1,175 @@ +/*===================================================================*/ +/* */ +/* Mapper 48 (Taito TC0190V) */ +/* */ +/*===================================================================*/ + +BYTE Map48_Regs[ 1 ]; +BYTE Map48_IRQ_Enable; +BYTE Map48_IRQ_Cnt; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 48 */ +/*-------------------------------------------------------------------*/ +void Map48_Init() +{ + /* Initialize Mapper */ + MapperInit = Map48_Init; + + /* Write to Mapper */ + MapperWrite = Map48_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map48_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Initialize IRQ Registers */ + Map48_Regs[ 0 ] = 0; + Map48_IRQ_Enable = 0; + Map48_IRQ_Cnt = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 48 Write Function */ +/*-------------------------------------------------------------------*/ +void Map48_Write( WORD wAddr, BYTE byData ) +{ + switch ( wAddr ) + { + case 0x8000: + /* Name Table Mirroring */ + if ( !Map48_Regs[ 0 ] ) + { + if ( byData & 0x40 ) + { + InfoNES_Mirroring( 0 ); + } else { + InfoNES_Mirroring( 1 ); + } + } + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( byData % ( NesHeader.byRomSize << 1 ) ); + break; + + case 0x8001: + /* Set ROM Banks */ + ROMBANK1 = ROMPAGE( byData % ( NesHeader.byRomSize << 1 ) ); + break; + + /* Set PPU Banks */ + case 0x8002: + PPUBANK[ 0 ] = VROMPAGE( ( ( byData << 1 ) + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( ( ( byData << 1 ) + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0x8003: + PPUBANK[ 2 ] = VROMPAGE( ( ( byData << 1 ) + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( ( ( byData << 1 ) + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xa000: + PPUBANK[ 4 ] = VROMPAGE( ( ( byData << 1 ) + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xa001: + PPUBANK[ 5 ] = VROMPAGE( ( ( byData << 1 ) + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xa002: + PPUBANK[ 6 ] = VROMPAGE( ( ( byData << 1 ) + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xa003: + PPUBANK[ 7 ] = VROMPAGE( ( ( byData << 1 ) + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xc000: + Map48_IRQ_Cnt = byData; + break; + + case 0xc001: + Map48_IRQ_Enable = byData & 0x01; + break; + + case 0xe000: + /* Name Table Mirroring */ + if ( byData & 0x40 ) + { + InfoNES_Mirroring( 0 ); + } else { + InfoNES_Mirroring( 1 ); + } + Map48_Regs[ 0 ] = 1; + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 48 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map48_HSync() +{ +/* + * Callback at HSync + * + */ + if ( Map48_IRQ_Enable ) + { + if ( /* 0 <= PPU_Scanline && */ PPU_Scanline <= 239 ) + { + if ( PPU_R1 & R1_SHOW_SCR || PPU_R1 & R1_SHOW_SP ) + { + if ( Map48_IRQ_Cnt == 0xff ) + { + IRQ_REQ; + Map48_IRQ_Enable = 0; + } else { + Map48_IRQ_Cnt++; + } + } + } + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_049.c b/apps/plugins/infones/mapper/InfoNES_Mapper_049.c new file mode 100644 index 0000000..59c9b16 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_049.c @@ -0,0 +1,292 @@ +/*===================================================================*/ +/* */ +/* Mapper 49 (Nin1) */ +/* */ +/*===================================================================*/ + +BYTE Map49_Regs[ 3 ]; +DWORD Map49_Prg0, Map49_Prg1; +DWORD Map49_Chr01, Map49_Chr23; +DWORD Map49_Chr4, Map49_Chr5, Map49_Chr6, Map49_Chr7; + +BYTE Map49_IRQ_Enable; +BYTE Map49_IRQ_Cnt; +BYTE Map49_IRQ_Latch; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 49 */ +/*-------------------------------------------------------------------*/ +void Map49_Init() +{ + /* Initialize Mapper */ + MapperInit = Map49_Init; + + /* Write to Mapper */ + MapperWrite = Map49_Write; + + /* Write to SRAM */ + MapperSram = Map49_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map49_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + Map49_Prg0 = 0; + Map49_Prg1 = 1; + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + + /* Set PPU Banks */ + Map49_Chr01 = 0; + Map49_Chr23 = 2; + Map49_Chr4 = 4; + Map49_Chr5 = 5; + Map49_Chr6 = 6; + Map49_Chr7 = 7; + + for ( int nPage = 0; nPage < 8; ++nPage ) + { + PPUBANK[ nPage ] = VROMPAGE( nPage ); + } + InfoNES_SetupChr(); + + /* Initialize IRQ Registers */ + Map49_Regs[ 0 ] = Map49_Regs[ 1 ] = Map49_Regs[ 2 ] = 0; + Map49_IRQ_Enable = 0; + Map49_IRQ_Cnt = 0; + Map49_IRQ_Latch = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 49 Write to Sram Function */ +/*-------------------------------------------------------------------*/ +void Map49_Sram( WORD wAddr, BYTE byData ) +{ + if ( Map49_Regs[ 2 ] & 0x80 ) + { + Map49_Regs[ 1 ] = byData; + Map49_Set_CPU_Banks(); + Map49_Set_PPU_Banks(); + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 49 Write Function */ +/*-------------------------------------------------------------------*/ +void Map49_Write( WORD wAddr, BYTE byData ) +{ + switch ( wAddr & 0xe001 ) + { + case 0x8000: + if ( ( byData & 0x40 ) != ( Map49_Regs[ 0 ] & 0x40 ) ) + { + Map49_Set_CPU_Banks(); + } + if ( ( byData & 0x80 ) != ( Map49_Regs[ 0 ] & 0x80 ) ) + { + Map49_Regs[ 0 ] = byData; + Map49_Set_PPU_Banks(); + } + Map49_Regs[ 0 ] = byData; + break; + + case 0x8001: + switch ( Map49_Regs[ 0 ] & 0x07 ) + { + /* Set PPU Banks */ + case 0x00: + Map49_Chr01 = byData & 0xfe; + Map49_Set_PPU_Banks(); + break; + + case 0x01: + Map49_Chr23 = byData & 0xfe; + Map49_Set_PPU_Banks(); + break; + + case 0x02: + Map49_Chr4 = byData; + Map49_Set_PPU_Banks(); + break; + + case 0x03: + Map49_Chr5 = byData; + Map49_Set_PPU_Banks(); + break; + + case 0x04: + Map49_Chr6 = byData; + Map49_Set_PPU_Banks(); + break; + + case 0x05: + Map49_Chr7 = byData; + Map49_Set_PPU_Banks(); + break; + + /* Set ROM Banks */ + case 0x06: + Map49_Prg0 = byData; + Map49_Set_CPU_Banks(); + break; + + case 0x07: + Map49_Prg1 = byData; + Map49_Set_CPU_Banks(); + break; + } + break; + + case 0xa000: + if ( !ROM_FourScr ) + { + if ( byData & 0x01 ) + { + InfoNES_Mirroring( 0 ); + } else { + InfoNES_Mirroring( 1 ); + } + } + break; + + case 0xa001: + Map49_Regs[ 2 ] = byData; + break; + + case 0xc000: + Map49_IRQ_Cnt = byData; + break; + + case 0xc001: + Map49_IRQ_Latch = byData; + break; + + case 0xe000: + Map49_IRQ_Enable = 0; + break; + + case 0xe001: + Map49_IRQ_Enable = 1; + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 49 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map49_HSync() +{ +/* + * Callback at HSync + * + */ + if ( Map49_IRQ_Enable ) + { + if ( /* 0 <= PPU_Scanline && */ PPU_Scanline <= 239 ) + { + if ( PPU_R1 & R1_SHOW_SCR || PPU_R1 & R1_SHOW_SP ) + { + if ( !( Map49_IRQ_Cnt-- ) ) + { + Map49_IRQ_Cnt = Map49_IRQ_Latch; + IRQ_REQ; + } + } + } + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 49 Set CPU Banks Function */ +/*-------------------------------------------------------------------*/ +void Map49_Set_CPU_Banks() +{ + DWORD dwBank0, dwBank1, dwBank2, dwBank3; + + if ( Map49_Regs[ 1 ] & 0x01 ) + { + if ( Map49_Regs[ 0 ] & 0x40 ) + { + dwBank0 = ( ( ( NesHeader.byRomSize << 1 ) - 1 ) & 0x0e ) | ( ( Map49_Regs[ 1 ] & 0xc0 ) >> 2 ); + dwBank1 = ( Map49_Prg1 & 0x0f ) | ( ( Map49_Regs[ 1 ] & 0xc0 ) >> 2 ); + dwBank2 = ( Map49_Prg0 & 0x0f ) | ( ( Map49_Regs[ 1 ] & 0xc0 ) >> 2 ); + dwBank3 = ( ( ( NesHeader.byRomSize << 1 ) - 1 ) & 0x0f ) | ( ( Map49_Regs[ 1 ] & 0xc0 ) >> 2 ); + } else { + dwBank0 = ( Map49_Prg0 & 0x0f ) | ( ( Map49_Regs[ 1 ] & 0xc0 ) >> 2 ); + dwBank1 = ( Map49_Prg1 & 0x0f ) | ( ( Map49_Regs[ 1 ] & 0xc0 ) >> 2 ); + dwBank2 = ( ( ( NesHeader.byRomSize << 1 ) - 1 ) & 0x0e ) | ( ( Map49_Regs[ 1 ] & 0xc0 ) >> 2 ); + dwBank3 = ( ( ( NesHeader.byRomSize << 1 ) - 1 ) & 0x0f ) | ( ( Map49_Regs[ 1 ] & 0xc0 ) >> 2 ); + } + } else { + dwBank0 = ( ( Map49_Regs[ 1 ] & 0x70 ) >> 2 ) | 0; + dwBank1 = ( ( Map49_Regs[ 1 ] & 0x70 ) >> 2 ) | 1; + dwBank2 = ( ( Map49_Regs[ 1 ] & 0x70 ) >> 2 ) | 2; + dwBank3 = ( ( Map49_Regs[ 1 ] & 0x70 ) >> 2 ) | 3; + } + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( dwBank0 % ( NesHeader.byRomSize << 1) ); + ROMBANK1 = ROMPAGE( dwBank1 % ( NesHeader.byRomSize << 1) ); + ROMBANK2 = ROMPAGE( dwBank2 % ( NesHeader.byRomSize << 1) ); + ROMBANK3 = ROMPAGE( dwBank3 % ( NesHeader.byRomSize << 1) ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 49 Set PPU Banks Function */ +/*-------------------------------------------------------------------*/ +void Map49_Set_PPU_Banks() +{ + Map49_Chr01 = ( Map49_Chr01 & 0x7f ) | ( ( Map49_Regs[ 1 ] & 0xc0 ) << 1 ); + Map49_Chr23 = ( Map49_Chr23 & 0x7f ) | ( ( Map49_Regs[ 1 ] & 0xc0 ) << 1 ); + Map49_Chr4 = ( Map49_Chr4 & 0x7f ) | ( ( Map49_Regs[ 1 ] & 0xc0 ) << 1 ); + Map49_Chr5 = ( Map49_Chr5 & 0x7f ) | ( ( Map49_Regs[ 1 ] & 0xc0 ) << 1 ); + Map49_Chr6 = ( Map49_Chr6 & 0x7f ) | ( ( Map49_Regs[ 1 ] & 0xc0 ) << 1 ); + Map49_Chr7 = ( Map49_Chr7 & 0x7f ) | ( ( Map49_Regs[ 1 ] & 0xc0 ) << 1 ); + + /* Set PPU Banks */ + if ( Map49_Regs[ 0 ] & 0x80 ) + { + PPUBANK[ 0 ] = VROMPAGE( Map49_Chr4 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( Map49_Chr5 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( Map49_Chr6 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( Map49_Chr7 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 4 ] = VROMPAGE( ( Map49_Chr01 + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( ( Map49_Chr01 + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE( ( Map49_Chr23 + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( ( Map49_Chr23 + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + } else { + PPUBANK[ 0 ] = VROMPAGE( ( Map49_Chr01 + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( ( Map49_Chr01 + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( ( Map49_Chr23 + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( ( Map49_Chr23 + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 4 ] = VROMPAGE( Map49_Chr4 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( Map49_Chr5 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE( Map49_Chr6 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( Map49_Chr7 % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_050.c b/apps/plugins/infones/mapper/InfoNES_Mapper_050.c new file mode 100644 index 0000000..3096635 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_050.c @@ -0,0 +1,104 @@ +/*===================================================================*/ +/* */ +/* Mapper 50 (Pirates) */ +/* */ +/*===================================================================*/ + +BYTE Map50_IRQ_Enable; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 50 */ +/*-------------------------------------------------------------------*/ +void Map50_Init() +{ + /* Initialize Mapper */ + MapperInit = Map50_Init; + + /* Write to Mapper */ + MapperWrite = Map0_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map50_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map50_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = ROMPAGE( 15 % ( NesHeader.byRomSize << 1 ) ); + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 8 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE( 9 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMPAGE( 0 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK3 = ROMPAGE( 11 % ( NesHeader.byRomSize << 1 ) ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( int nPage = 0; nPage < 8; ++nPage ) + { + PPUBANK[ nPage ] = VROMPAGE( nPage ); + } + InfoNES_SetupChr(); + } + + /* Initialize IRQ Registers */ + Map50_IRQ_Enable = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 50 Write to Apu Function */ +/*-------------------------------------------------------------------*/ +void Map50_Apu( WORD wAddr, BYTE byData ) +{ + if ( ( wAddr & 0xE060 ) == 0x4020 ) + { + if( wAddr & 0x0100 ) + { + Map50_IRQ_Enable = byData & 0x01; + } + else + { + BYTE byDummy; + + byDummy = ( byData & 0x08 ) | ( ( byData & 0x01 ) << 2 ) | ( ( byData & 0x06 ) >> 1 ); + ROMBANK2 = ROMPAGE( byDummy % ( NesHeader.byRomSize << 1 ) ); + } + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 50 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map50_HSync() +{ +/* + * Callback at HSync + * + */ + if ( Map50_IRQ_Enable ) + { + if ( PPU_Scanline == 21 ) + { + IRQ_REQ; + } + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_051.c b/apps/plugins/infones/mapper/InfoNES_Mapper_051.c new file mode 100644 index 0000000..e31e42c --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_051.c @@ -0,0 +1,123 @@ +/*===================================================================*/ +/* */ +/* Mapper 51 : 11-in-1 */ +/* */ +/*===================================================================*/ + +int Map51_Mode, Map51_Bank; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 51 */ +/*-------------------------------------------------------------------*/ +void Map51_Init() +{ + /* Initialize Mapper */ + MapperInit = Map51_Init; + + /* Write to Mapper */ + MapperWrite = Map51_Write; + + /* Write to SRAM */ + MapperSram = Map51_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set Registers */ + Map51_Bank = 0; + Map51_Mode = 1; + + /* Set ROM Banks */ + Map51_Set_CPU_Banks(); + + /* Set PPU Banks */ + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = CRAMPAGE( nPage ); + InfoNES_SetupChr(); + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 51 Write Function */ +/*-------------------------------------------------------------------*/ +void Map51_Write( WORD wAddr, BYTE byData ) +{ + Map51_Bank = (byData & 0x0f) << 2; + if( 0xC000 <= wAddr && wAddr <= 0xDFFF ) { + Map51_Mode = (Map51_Mode & 0x01) | ((byData & 0x10) >> 3); + } + Map51_Set_CPU_Banks(); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 51 Write to SRAM Function */ +/*-------------------------------------------------------------------*/ +void Map51_Sram( WORD wAddr, BYTE byData ) +{ + if( wAddr>=0x6000 ) { + Map51_Mode = ((byData & 0x10) >> 3) | ((byData & 0x02) >> 1); + Map51_Set_CPU_Banks(); + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 51 Set CPU Banks Function */ +/*-------------------------------------------------------------------*/ +void Map51_Set_CPU_Banks() +{ + switch(Map51_Mode) { + case 0: + InfoNES_Mirroring( 1 ); + SRAMBANK = ROMPAGE((Map51_Bank|0x2c|3) % (NesHeader.byRomSize<<1)); + ROMBANK0 = ROMPAGE((Map51_Bank|0x00|0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE((Map51_Bank|0x00|1) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE((Map51_Bank|0x0c|2) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE((Map51_Bank|0x0c|3) % (NesHeader.byRomSize<<1)); + break; + case 1: + InfoNES_Mirroring( 1 ); + SRAMBANK = ROMPAGE((Map51_Bank|0x20|3) % (NesHeader.byRomSize<<1)); + ROMBANK0 = ROMPAGE((Map51_Bank|0x00|0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE((Map51_Bank|0x00|1) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE((Map51_Bank|0x00|2) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE((Map51_Bank|0x00|3) % (NesHeader.byRomSize<<1)); + break; + case 2: + InfoNES_Mirroring( 1 ); + SRAMBANK = ROMPAGE((Map51_Bank|0x2e|3) % (NesHeader.byRomSize<<1)); + ROMBANK0 = ROMPAGE((Map51_Bank|0x02|0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE((Map51_Bank|0x02|1) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE((Map51_Bank|0x0e|2) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE((Map51_Bank|0x0e|3) % (NesHeader.byRomSize<<1)); + break; + case 3: + InfoNES_Mirroring( 0 ); + SRAMBANK = ROMPAGE((Map51_Bank|0x20|3) % (NesHeader.byRomSize<<1)); + ROMBANK0 = ROMPAGE((Map51_Bank|0x00|0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE((Map51_Bank|0x00|1) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE((Map51_Bank|0x00|2) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE((Map51_Bank|0x00|3) % (NesHeader.byRomSize<<1)); + break; + } +} + diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_057.c b/apps/plugins/infones/mapper/InfoNES_Mapper_057.c new file mode 100644 index 0000000..d3cdee7 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_057.c @@ -0,0 +1,123 @@ +/*===================================================================*/ +/* */ +/* Mapper 57 */ +/* */ +/*===================================================================*/ + +BYTE Map57_Reg; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 57 */ +/*-------------------------------------------------------------------*/ +void Map57_Init() +{ + /* Initialize Mapper */ + MapperInit = Map57_Init; + + /* Write to Mapper */ + MapperWrite = Map57_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 0 ); + ROMBANK3 = ROMPAGE( 1 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set Registers */ + Map57_Reg = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 57 Write Function */ +/*-------------------------------------------------------------------*/ +void Map57_Write( WORD wAddr, BYTE byData ) +{ + BYTE byChr; + + switch( wAddr ) { + case 0x8000: + case 0x8001: + case 0x8002: + case 0x8003: + if( byData & 0x40 ) { + byChr = (byData&0x03)+((Map57_Reg&0x10)>>1)+(Map57_Reg&0x07); + + PPUBANK[ 0 ] = VROMPAGE(((byChr<<3)+0) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 1 ] = VROMPAGE(((byChr<<3)+1) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 2 ] = VROMPAGE(((byChr<<3)+2) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 3 ] = VROMPAGE(((byChr<<3)+3) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 4 ] = VROMPAGE(((byChr<<3)+4) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 5 ] = VROMPAGE(((byChr<<3)+5) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 6 ] = VROMPAGE(((byChr<<3)+6) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 7 ] = VROMPAGE(((byChr<<3)+7) % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + } + break; + case 0x8800: + Map57_Reg = byData; + + if( byData & 0x80 ) { + ROMBANK0 = ROMPAGE((((byData & 0x40)>>6)*4+8+0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE((((byData & 0x40)>>6)*4+8+1) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE((((byData & 0x40)>>6)*4+8+2) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE((((byData & 0x40)>>6)*4+8+3) % (NesHeader.byRomSize<<1)); + } else { + ROMBANK0 = ROMPAGE((((byData & 0x60)>>5)*2+0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE((((byData & 0x60)>>5)*2+1) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE((((byData & 0x60)>>5)*2+0) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE((((byData & 0x60)>>5)*2+1) % (NesHeader.byRomSize<<1)); + } + + byChr = (byData&0x07)+((byData&0x10)>>1); + + PPUBANK[ 0 ] = VROMPAGE(((byChr<<3)+0) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 1 ] = VROMPAGE(((byChr<<3)+1) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 2 ] = VROMPAGE(((byChr<<3)+2) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 3 ] = VROMPAGE(((byChr<<3)+3) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 4 ] = VROMPAGE(((byChr<<3)+4) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 5 ] = VROMPAGE(((byChr<<3)+5) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 6 ] = VROMPAGE(((byChr<<3)+6) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 7 ] = VROMPAGE(((byChr<<3)+7) % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + + if( byData & 0x08 ) InfoNES_Mirroring( 0 ); + else InfoNES_Mirroring( 1 ); + + break; + } +} + diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_058.c b/apps/plugins/infones/mapper/InfoNES_Mapper_058.c new file mode 100644 index 0000000..5c4b687 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_058.c @@ -0,0 +1,90 @@ +/*===================================================================*/ +/* */ +/* Mapper 58 */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 58 */ +/*-------------------------------------------------------------------*/ +void Map58_Init() +{ + /* Initialize Mapper */ + MapperInit = Map58_Init; + + /* Write to Mapper */ + MapperWrite = Map58_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 0 ); + ROMBANK3 = ROMPAGE( 1 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 58 Write Function */ +/*-------------------------------------------------------------------*/ +void Map58_Write( WORD wAddr, BYTE byData ) +{ + if( wAddr & 0x40 ) { + ROMBANK0 = ROMPAGE((((wAddr&0x07)<<1)+0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE((((wAddr&0x07)<<1)+1) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE((((wAddr&0x07)<<1)+0) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE((((wAddr&0x07)<<1)+1) % (NesHeader.byRomSize<<1)); + } else { + ROMBANK0 = ROMPAGE((((wAddr&0x06)<<1)+0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE((((wAddr&0x06)<<1)+1) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE((((wAddr&0x06)<<1)+2) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE((((wAddr&0x06)<<1)+3) % (NesHeader.byRomSize<<1)); + } + + if ( NesHeader.byVRomSize > 0 ) { + PPUBANK[ 0 ] = VROMPAGE(((wAddr&0x38)+0) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 1 ] = VROMPAGE(((wAddr&0x38)+1) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 2 ] = VROMPAGE(((wAddr&0x38)+2) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 3 ] = VROMPAGE(((wAddr&0x38)+3) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 4 ] = VROMPAGE(((wAddr&0x38)+4) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 5 ] = VROMPAGE(((wAddr&0x38)+5) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 6 ] = VROMPAGE(((wAddr&0x38)+6) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 7 ] = VROMPAGE(((wAddr&0x38)+7) % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + } + + if( byData & 0x02 ) InfoNES_Mirroring( 1 ); + else InfoNES_Mirroring( 0 ); +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_060.c b/apps/plugins/infones/mapper/InfoNES_Mapper_060.c new file mode 100644 index 0000000..34fb09b --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_060.c @@ -0,0 +1,89 @@ +/*===================================================================*/ +/* */ +/* Mapper 60 */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 60 */ +/*-------------------------------------------------------------------*/ +void Map60_Init() +{ + /* Initialize Mapper */ + MapperInit = Map60_Init; + + /* Write to Mapper */ + MapperWrite = Map60_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 60 Write Function */ +/*-------------------------------------------------------------------*/ +void Map60_Write( WORD wAddr, BYTE byData ) +{ + if( wAddr & 0x80 ) { + ROMBANK0 = ROMPAGE((((wAddr&0x70)>>3)+0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE((((wAddr&0x70)>>3)+1) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE((((wAddr&0x70)>>3)+0) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE((((wAddr&0x70)>>3)+1) % (NesHeader.byRomSize<<1)); + } else { + ROMBANK0 = ROMPAGE((((wAddr&0x70)>>3)+0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE((((wAddr&0x70)>>3)+1) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE((((wAddr&0x70)>>3)+2) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE((((wAddr&0x70)>>3)+3) % (NesHeader.byRomSize<<1)); + } + + + PPUBANK[ 0 ] = VROMPAGE((((wAddr&0x07)<<3)+0) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 1 ] = VROMPAGE((((wAddr&0x07)<<3)+1) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 2 ] = VROMPAGE((((wAddr&0x07)<<3)+2) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 3 ] = VROMPAGE((((wAddr&0x07)<<3)+3) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 4 ] = VROMPAGE((((wAddr&0x07)<<3)+4) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 5 ] = VROMPAGE((((wAddr&0x07)<<3)+5) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 6 ] = VROMPAGE((((wAddr&0x07)<<3)+6) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 7 ] = VROMPAGE((((wAddr&0x07)<<3)+7) % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + + if( byData & 0x08 ) InfoNES_Mirroring( 0 ); + else InfoNES_Mirroring( 1 ); +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_061.c b/apps/plugins/infones/mapper/InfoNES_Mapper_061.c new file mode 100644 index 0000000..595ccd9 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_061.c @@ -0,0 +1,80 @@ +/*===================================================================*/ +/* */ +/* Mapper 61 */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 61 */ +/*-------------------------------------------------------------------*/ +void Map61_Init() +{ + /* Initialize Mapper */ + MapperInit = Map61_Init; + + /* Write to Mapper */ + MapperWrite = Map61_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 61 Write Function */ +/*-------------------------------------------------------------------*/ +void Map61_Write( WORD wAddr, BYTE byData ) +{ + BYTE byBank; + + switch( wAddr & 0x30 ) { + case 0x00: + case 0x30: + ROMBANK0 = ROMPAGE((((wAddr&0x0F)<<2)+0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE((((wAddr&0x0F)<<2)+1) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE((((wAddr&0x0F)<<2)+2) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE((((wAddr&0x0F)<<2)+3) % (NesHeader.byRomSize<<1)); + break; + case 0x10: + case 0x20: + byBank = ((wAddr & 0x0F)<<1)|((wAddr&0x20)>>4); + + ROMBANK0 = ROMPAGE(((byBank<<1)+0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE(((byBank<<1)+1) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE(((byBank<<1)+0) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE(((byBank<<1)+1) % (NesHeader.byRomSize<<1)); + break; + } + + if( wAddr & 0x80 ) InfoNES_Mirroring( 0 ); + else InfoNES_Mirroring( 1 ); +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_062.c b/apps/plugins/infones/mapper/InfoNES_Mapper_062.c new file mode 100644 index 0000000..41a1878 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_062.c @@ -0,0 +1,88 @@ +/*===================================================================*/ +/* */ +/* Mapper 62 */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 62 */ +/*-------------------------------------------------------------------*/ +void Map62_Init() +{ + /* Initialize Mapper */ + MapperInit = Map62_Init; + + /* Write to Mapper */ + MapperWrite = Map62_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 62 Write Function */ +/*-------------------------------------------------------------------*/ +void Map62_Write( WORD wAddr, BYTE byData ) +{ + switch( wAddr & 0xFF00 ) { + case 0x8100: + ROMBANK0 = ROMPAGE((byData+0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE((byData+1) % (NesHeader.byRomSize<<1)); + break; + case 0x8500: + ROMBANK0 = ROMPAGE(byData % (NesHeader.byRomSize<<1)); + break; + case 0x8700: + ROMBANK1 = ROMPAGE(byData % (NesHeader.byRomSize<<1)); + break; + + default: + PPUBANK[ 0 ] = VROMPAGE((byData+0) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 1 ] = VROMPAGE((byData+1) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 2 ] = VROMPAGE((byData+2) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 3 ] = VROMPAGE((byData+3) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 4 ] = VROMPAGE((byData+4) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 5 ] = VROMPAGE((byData+5) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 6 ] = VROMPAGE((byData+6) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 7 ] = VROMPAGE((byData+7) % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + break; + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_064.c b/apps/plugins/infones/mapper/InfoNES_Mapper_064.c new file mode 100644 index 0000000..bb247f9 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_064.c @@ -0,0 +1,224 @@ +/*===================================================================*/ +/* */ +/* Mapper 64 (Tengen RAMBO-1) */ +/* */ +/*===================================================================*/ + +BYTE Map64_Cmd; +BYTE Map64_Prg; +BYTE Map64_Chr; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 64 */ +/*-------------------------------------------------------------------*/ +void Map64_Init() +{ + /* Initialize Mapper */ + MapperInit = Map64_Init; + + /* Write to Mapper */ + MapperWrite = Map64_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMLASTPAGE( 0 ); + ROMBANK1 = ROMLASTPAGE( 0 ); + ROMBANK2 = ROMLASTPAGE( 0 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Initialize state flag */ + Map64_Cmd = 0x00; + Map64_Prg = 0x00; + Map64_Chr = 0x00; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 64 Write Function */ +/*-------------------------------------------------------------------*/ +void Map64_Write( WORD wAddr, BYTE byData ) +{ + switch ( wAddr ) + { + case 0x8000: + /* Set state flag */ + Map64_Cmd = byData & 0x0f; + Map64_Prg = ( byData & 0x40 ) >> 6; + Map64_Chr = ( byData & 0x80 ) >> 7; + break; + + case 0x8001: + switch ( Map64_Cmd ) + { + case 0x00: + /* Set PPU Banks */ + byData %= ( NesHeader.byVRomSize << 3 ); + if ( Map64_Chr ) + { + PPUBANK[ 4 ] = VROMPAGE( byData ); + PPUBANK[ 5 ] = VROMPAGE( byData + 1 ); + } else { + PPUBANK[ 0 ] = VROMPAGE( byData ); + PPUBANK[ 1 ] = VROMPAGE( byData + 1 ); + } + InfoNES_SetupChr(); + break; + + case 0x01: + /* Set PPU Banks */ + byData %= ( NesHeader.byVRomSize << 3 ); + if ( Map64_Chr ) + { + PPUBANK[ 6 ] = VROMPAGE( byData ); + PPUBANK[ 7 ] = VROMPAGE( byData + 1 ); + } else { + PPUBANK[ 2 ] = VROMPAGE( byData ); + PPUBANK[ 3 ] = VROMPAGE( byData + 1 ); + } + InfoNES_SetupChr(); + break; + + case 0x02: + /* Set PPU Banks */ + byData %= ( NesHeader.byVRomSize << 3 ); + if ( Map64_Chr ) + { + PPUBANK[ 0 ] = VROMPAGE( byData ); + } else { + PPUBANK[ 4 ] = VROMPAGE( byData ); + } + InfoNES_SetupChr(); + break; + + case 0x03: + /* Set PPU Banks */ + byData %= ( NesHeader.byVRomSize << 3 ); + if ( Map64_Chr ) + { + PPUBANK[ 1 ] = VROMPAGE( byData ); + } else { + PPUBANK[ 5 ] = VROMPAGE( byData ); + } + InfoNES_SetupChr(); + break; + + case 0x04: + /* Set PPU Banks */ + byData %= ( NesHeader.byVRomSize << 3 ); + if ( Map64_Chr ) + { + PPUBANK[ 2 ] = VROMPAGE( byData ); + } else { + PPUBANK[ 6 ] = VROMPAGE( byData ); + } + InfoNES_SetupChr(); + break; + + case 0x05: + /* Set PPU Banks */ + byData %= ( NesHeader.byVRomSize << 3 ); + if ( Map64_Chr ) + { + PPUBANK[ 3 ] = VROMPAGE( byData ); + } else { + PPUBANK[ 7 ] = VROMPAGE( byData ); + } + InfoNES_SetupChr(); + break; + + case 0x06: + /* Set ROM Banks */ + byData %= ( NesHeader.byRomSize << 1 ); + if ( Map64_Prg ) + { + ROMBANK1 = ROMPAGE( byData ); + } else { + ROMBANK0 = ROMPAGE( byData ); + } + break; + + case 0x07: + /* Set ROM Banks */ + byData %= ( NesHeader.byRomSize << 1 ); + if ( Map64_Prg ) + { + ROMBANK2 = ROMPAGE( byData ); + } else { + ROMBANK1 = ROMPAGE( byData ); + } + break; + + case 0x08: + /* Set PPU Banks */ + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 1 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0x09: + /* Set PPU Banks */ + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 3 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0x0f: + /* Set ROM Banks */ + byData %= ( NesHeader.byRomSize << 1 ); + if ( Map64_Prg ) + { + ROMBANK0 = ROMPAGE( byData ); + } else { + ROMBANK2 = ROMPAGE( byData ); + } + break; + } + break; + + default: + switch ( wAddr & 0xf000 ) + { + case 0xa000: + /* Name Table Mirroring */ + InfoNES_Mirroring( byData & 0x01 ); + break; + + default: + break; + } + break; + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_065.c b/apps/plugins/infones/mapper/InfoNES_Mapper_065.c new file mode 100644 index 0000000..7a0eda5 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_065.c @@ -0,0 +1,172 @@ +/*===================================================================*/ +/* */ +/* Mapper 65 (Irem H3001) */ +/* */ +/*===================================================================*/ + +BYTE Map65_IRQ_Enable; +DWORD Map65_IRQ_Cnt; +DWORD Map65_IRQ_Latch; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 65 */ +/*-------------------------------------------------------------------*/ +void Map65_Init() +{ + /* Initialize Mapper */ + MapperInit = Map65_Init; + + /* Write to Mapper */ + MapperWrite = Map65_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map65_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 65 Write Function */ +/*-------------------------------------------------------------------*/ +void Map65_Write( WORD wAddr, BYTE byData ) +{ + switch ( wAddr ) + { + case 0x8000: + ROMBANK0 = ROMPAGE( byData % ( NesHeader.byRomSize << 1) ); + break; + + case 0x9000: + if ( byData & 0x40 ) + { + InfoNES_Mirroring( 1 ); + } else { + InfoNES_Mirroring( 0 ); + } + break; + + case 0x9003: + Map65_IRQ_Enable = byData & 0x80; + break; + + case 0x9004: + Map65_IRQ_Cnt = Map65_IRQ_Latch; + break; + + case 0x9005: + Map65_IRQ_Latch = ( Map65_IRQ_Latch & 0x00ff ) | ((DWORD)byData << 8 ); + break; + + case 0x9006: + Map65_IRQ_Latch = ( Map65_IRQ_Latch & 0xff00 ) | (DWORD)byData; + break; + + /* Set PPU Banks */ + case 0xb000: + PPUBANK[ 0 ] = VROMPAGE( byData % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xb001: + PPUBANK[ 1 ] = VROMPAGE( byData % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xb002: + PPUBANK[ 2 ] = VROMPAGE( byData % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xb003: + PPUBANK[ 3 ] = VROMPAGE( byData % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xb004: + PPUBANK[ 4 ] = VROMPAGE( byData % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xb005: + PPUBANK[ 5 ] = VROMPAGE( byData % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xb006: + PPUBANK[ 6 ] = VROMPAGE( byData % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xb007: + PPUBANK[ 7 ] = VROMPAGE( byData % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + /* Set ROM Banks */ + case 0xa000: + ROMBANK1 = ROMPAGE( byData % ( NesHeader.byRomSize << 1) ); + break; + + case 0xc000: + ROMBANK2 = ROMPAGE( byData % ( NesHeader.byRomSize << 1) ); + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 65 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map65_HSync() +{ +/* + * Callback at HSync + * + */ + if ( Map65_IRQ_Enable ) + { + if ( Map65_IRQ_Cnt <= 113 ) + { + IRQ_REQ; + Map65_IRQ_Enable = 0; + Map65_IRQ_Cnt = 0xffff; + } else { + Map65_IRQ_Cnt -= 113; + } + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_066.c b/apps/plugins/infones/mapper/InfoNES_Mapper_066.c new file mode 100644 index 0000000..ca473df --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_066.c @@ -0,0 +1,96 @@ +/*===================================================================*/ +/* */ +/* Mapper 66 (GNROM) */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 66 */ +/*-------------------------------------------------------------------*/ +void Map66_Init() +{ + int nPage; + + /* Initialize Mapper */ + MapperInit = Map66_Init; + + /* Write to Mapper */ + MapperWrite = Map66_Write; + + /* Write to SRAM */ + MapperSram = Map66_Write; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 0 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 66 Write Function */ +/*-------------------------------------------------------------------*/ +void Map66_Write( WORD wAddr, BYTE byData ) +{ + BYTE byRom; + BYTE byVRom; + + byRom = ( byData >> 4 ) & 0x0F; + byVRom = byData & 0x0F; + + /* Set ROM Banks */ + byRom <<= 1; + byRom %= NesHeader.byRomSize; + byRom <<= 1; + + ROMBANK0 = ROMPAGE( byRom ); + ROMBANK1 = ROMPAGE( byRom + 1 ); + ROMBANK2 = ROMPAGE( byRom + 2 ); + ROMBANK3 = ROMPAGE( byRom + 3 ); + + /* Set PPU Banks */ + byVRom <<= 3; + byVRom %= ( NesHeader.byVRomSize << 3 ); + + PPUBANK[ 0 ] = VROMPAGE( byVRom ); + PPUBANK[ 1 ] = VROMPAGE( byVRom + 1 ); + PPUBANK[ 2 ] = VROMPAGE( byVRom + 2 ); + PPUBANK[ 3 ] = VROMPAGE( byVRom + 3 ); + PPUBANK[ 4 ] = VROMPAGE( byVRom + 4 ); + PPUBANK[ 5 ] = VROMPAGE( byVRom + 5 ); + PPUBANK[ 6 ] = VROMPAGE( byVRom + 6 ); + PPUBANK[ 7 ] = VROMPAGE( byVRom + 7 ); + InfoNES_SetupChr(); +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_067.c b/apps/plugins/infones/mapper/InfoNES_Mapper_067.c new file mode 100644 index 0000000..d8ecddd --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_067.c @@ -0,0 +1,177 @@ +/*===================================================================*/ +/* */ +/* Mapper 67 (Sunsoft Mapper #3) */ +/* */ +/*===================================================================*/ + +BYTE Map67_IRQ_Enable; +BYTE Map67_IRQ_Cnt; +BYTE Map67_IRQ_Latch; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 67 */ +/*-------------------------------------------------------------------*/ +void Map67_Init() +{ + /* Initialize Mapper */ + MapperInit = Map67_Init; + + /* Write to Mapper */ + MapperWrite = Map67_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map67_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set PPU Banks */ + PPUBANK[ 0 ] = VROMPAGE( 0 ); + PPUBANK[ 1 ] = VROMPAGE( 1 ); + PPUBANK[ 2 ] = VROMPAGE( 2 ); + PPUBANK[ 3 ] = VROMPAGE( 3 ); + PPUBANK[ 4 ] = VROMPAGE( ( NesHeader.byVRomSize << 3 ) - 4 ); + PPUBANK[ 5 ] = VROMPAGE( ( NesHeader.byVRomSize << 3 ) - 3 ); + PPUBANK[ 6 ] = VROMPAGE( ( NesHeader.byVRomSize << 3 ) - 2 ); + PPUBANK[ 7 ] = VROMPAGE( ( NesHeader.byVRomSize << 3 ) - 1 ); + InfoNES_SetupChr(); + + /* Initialize IRQ Registers */ + Map67_IRQ_Enable = 0; + Map67_IRQ_Cnt = 0; + Map67_IRQ_Latch = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 67 Write Function */ +/*-------------------------------------------------------------------*/ +void Map67_Write( WORD wAddr, BYTE byData ) +{ + switch ( wAddr & 0xf800 ) + { + /* Set PPU Banks */ + case 0x8800: + byData <<= 1; + byData %= ( NesHeader.byVRomSize << 3 ); + + PPUBANK[ 0 ] = VROMPAGE( byData + 0 ); + PPUBANK[ 1 ] = VROMPAGE( byData + 1 ); + InfoNES_SetupChr(); + break; + + case 0x9800: + byData <<= 1; + byData %= ( NesHeader.byVRomSize << 3 ); + + PPUBANK[ 2 ] = VROMPAGE( byData + 0 ); + PPUBANK[ 3 ] = VROMPAGE( byData + 1 ); + InfoNES_SetupChr(); + break; + + case 0xa800: + byData <<= 1; + byData %= ( NesHeader.byVRomSize << 3 ); + + PPUBANK[ 4 ] = VROMPAGE( byData + 0 ); + PPUBANK[ 5 ] = VROMPAGE( byData + 1 ); + InfoNES_SetupChr(); + break; + + case 0xb800: + byData <<= 1; + byData %= ( NesHeader.byVRomSize << 3 ); + + PPUBANK[ 6 ] = VROMPAGE( byData + 0 ); + PPUBANK[ 7 ] = VROMPAGE( byData + 1 ); + InfoNES_SetupChr(); + break; + + case 0xc800: + Map67_IRQ_Cnt = Map67_IRQ_Latch; + Map67_IRQ_Latch = byData; + break; + + case 0xd800: + Map67_IRQ_Enable = byData & 0x10; + break; + + case 0xe800: + switch ( byData & 0x03 ) + { + case 0: + InfoNES_Mirroring( 1 ); + break; + case 1: + InfoNES_Mirroring( 0 ); + break; + case 2: + InfoNES_Mirroring( 3 ); + break; + case 3: + InfoNES_Mirroring( 2 ); + break; + } + break; + + /* Set ROM Banks */ + case 0xf800: + byData <<= 1; + byData %= ( NesHeader.byRomSize << 1 ); + + ROMBANK0 = ROMPAGE( byData + 0 ); + ROMBANK1 = ROMPAGE( byData + 1 ); + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 67 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map67_HSync() +{ +/* + * Callback at HSync + * + */ + if ( Map67_IRQ_Enable ) + { + if ( /* 0 <= PPU_Scanline && */ PPU_Scanline <= 239 ) + { + if ( PPU_R1 & R1_SHOW_SCR || PPU_R1 & R1_SHOW_SP ) + { + if ( --Map67_IRQ_Cnt == 0xf6 ) + { + Map67_IRQ_Cnt = Map67_IRQ_Latch; + IRQ_REQ; + } + } + } + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_068.c b/apps/plugins/infones/mapper/InfoNES_Mapper_068.c new file mode 100644 index 0000000..7141af3 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_068.c @@ -0,0 +1,170 @@ +/*===================================================================*/ +/* */ +/* Mapper 68 (Sunsoft Mapper #4) */ +/* */ +/*===================================================================*/ + +BYTE Map68_Regs[4]; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 68 */ +/*-------------------------------------------------------------------*/ +void Map68_Init() +{ + /* Initialize Mapper */ + MapperInit = Map68_Init; + + /* Write to Mapper */ + MapperWrite = Map68_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Initialize state flag */ + for ( int i = 0; i < 4; i++ ) + Map68_Regs[ i ] = 0x00; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 68 Write Function */ +/*-------------------------------------------------------------------*/ +void Map68_Write( WORD wAddr, BYTE byData ) +{ + switch( wAddr ) + { + case 0x8000: + /* Set PPU Banks */ + byData %= ( NesHeader.byVRomSize << 2 ); + byData <<= 1; + PPUBANK[ 0 ] = VROMPAGE( byData ); + PPUBANK[ 1 ] = VROMPAGE( byData + 1); + InfoNES_SetupChr(); + break; + + case 0x9000: + /* Set PPU Banks */ + byData %= ( NesHeader.byVRomSize << 2 ); + byData <<= 1; + PPUBANK[ 2 ] = VROMPAGE( byData ); + PPUBANK[ 3 ] = VROMPAGE( byData + 1); + InfoNES_SetupChr(); + break; + + case 0xA000: + /* Set PPU Banks */ + byData %= ( NesHeader.byVRomSize << 2 ); + byData <<= 1; + PPUBANK[ 4 ] = VROMPAGE( byData ); + PPUBANK[ 5 ] = VROMPAGE( byData + 1); + InfoNES_SetupChr(); + break; + + case 0xB000: + /* Set PPU Banks */ + byData %= ( NesHeader.byVRomSize << 2 ); + byData <<= 1; + PPUBANK[ 6 ] = VROMPAGE( byData ); + PPUBANK[ 7 ] = VROMPAGE( byData + 1); + InfoNES_SetupChr(); + break; + + case 0xC000: + Map68_Regs[ 2 ] = byData; + Map68_SyncMirror(); + break; + + case 0xD000: + Map68_Regs[ 3 ] = byData; + Map68_SyncMirror(); + break; + + case 0xE000: + Map68_Regs[ 0 ] = ( byData & 0x10 ) >> 4; + Map68_Regs[ 1 ] = byData & 0x03; + Map68_SyncMirror(); + break; + + case 0xF000: + /* Set ROM Banks */ + byData %= NesHeader.byRomSize; + byData <<= 1; + ROMBANK0 = ROMPAGE( byData ); + ROMBANK1 = ROMPAGE( byData + 1 ); + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 68 Sub Function */ +/*-------------------------------------------------------------------*/ +void Map68_SyncMirror( void ) +{ + if ( Map68_Regs[ 0 ] ) + { + switch( Map68_Regs[ 1 ] ) + { + case 0x00: + PPUBANK[ 8 ] = VROMPAGE( Map68_Regs[ 2 ] + 0x80 ); + PPUBANK[ 9 ] = VROMPAGE( Map68_Regs[ 3 ] + 0x80 ); + PPUBANK[ 10 ] = VROMPAGE( Map68_Regs[ 2 ] + 0x80 ); + PPUBANK[ 11 ] = VROMPAGE( Map68_Regs[ 3 ] + 0x80 ); + break; + + case 0x01: + PPUBANK[ 8 ] = VROMPAGE( Map68_Regs[ 2 ] + 0x80 ); + PPUBANK[ 9 ] = VROMPAGE( Map68_Regs[ 2 ] + 0x80 ); + PPUBANK[ 10 ] = VROMPAGE( Map68_Regs[ 3 ] + 0x80 ); + PPUBANK[ 11 ] = VROMPAGE( Map68_Regs[ 3 ] + 0x80 ); + break; + + case 0x02: + PPUBANK[ 8 ] = VROMPAGE( Map68_Regs[ 2 ] + 0x80 ); + PPUBANK[ 9 ] = VROMPAGE( Map68_Regs[ 2 ] + 0x80 ); + PPUBANK[ 10 ] = VROMPAGE( Map68_Regs[ 2 ] + 0x80 ); + PPUBANK[ 11 ] = VROMPAGE( Map68_Regs[ 2 ] + 0x80 ); + break; + + case 0x03: + PPUBANK[ 8 ] = VROMPAGE( Map68_Regs[ 3 ] + 0x80 ); + PPUBANK[ 9 ] = VROMPAGE( Map68_Regs[ 3 ] + 0x80 ); + PPUBANK[ 10 ] = VROMPAGE( Map68_Regs[ 3 ] + 0x80 ); + PPUBANK[ 11 ] = VROMPAGE( Map68_Regs[ 3 ] + 0x80 ); + break; + } + InfoNES_SetupChr(); + } + else + { + InfoNES_Mirroring( Map68_Regs[ 1 ] ); + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_069.c b/apps/plugins/infones/mapper/InfoNES_Mapper_069.c new file mode 100644 index 0000000..7b7b2dd --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_069.c @@ -0,0 +1,176 @@ +/*===================================================================*/ +/* */ +/* Mapper 69 (Sunsoft FME-7) */ +/* */ +/*===================================================================*/ + +BYTE Map69_IRQ_Enable; +DWORD Map69_IRQ_Cnt; +BYTE Map69_Regs[ 1 ]; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 69 */ +/*-------------------------------------------------------------------*/ +void Map69_Init() +{ + /* Initialize Mapper */ + MapperInit = Map69_Init; + + /* Write to Mapper */ + MapperWrite = Map69_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map69_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Initialize IRQ Reg */ + Map69_IRQ_Enable = 0; + Map69_IRQ_Cnt = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 69 Write Function */ +/*-------------------------------------------------------------------*/ +void Map69_Write( WORD wAddr, BYTE byData ) +{ + switch ( wAddr ) + { + case 0x8000: + Map69_Regs[ 0 ] = byData & 0x0f; + break; + + case 0xA000: + switch ( Map69_Regs[ 0 ] ) + { + /* Set PPU Banks */ + case 0x00: + case 0x01: + case 0x02: + case 0x03: + case 0x04: + case 0x05: + case 0x06: + case 0x07: + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ Map69_Regs[ 0 ] ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + /* Set ROM Banks */ +#if 0 + case 0x08: + if ( !( byData & 0x40 ) ) + { + byData %= ( NesHeader.byRomSize << 1 ); + SRAMBANK = ROMPAGE( byData ); + } + break; +#endif + + case 0x09: + byData %= ( NesHeader.byRomSize << 1 ); + ROMBANK0 = ROMPAGE( byData ); + break; + + case 0x0a: + byData %= ( NesHeader.byRomSize << 1 ); + ROMBANK1 = ROMPAGE( byData ); + break; + + case 0x0b: + byData %= ( NesHeader.byRomSize << 1 ); + ROMBANK2 = ROMPAGE( byData ); + break; + + /* Name Table Mirroring */ + case 0x0c: + switch ( byData & 0x03 ) + { + case 0: + InfoNES_Mirroring( 1 ); /* Vertical */ + break; + case 1: + InfoNES_Mirroring( 0 ); /* Horizontal */ + break; + case 2: + InfoNES_Mirroring( 3 ); /* One Screen 0x2400 */ + break; + case 3: + InfoNES_Mirroring( 2 ); /* One Screen 0x2000 */ + break; + } + break; + + case 0x0d: + Map69_IRQ_Enable = byData; + break; + + case 0x0e: + Map69_IRQ_Cnt = ( Map69_IRQ_Cnt & 0xff00) | (DWORD)byData; + break; + + case 0x0f: + Map69_IRQ_Cnt = ( Map69_IRQ_Cnt & 0x00ff) | ( (DWORD)byData << 8 ); + break; + } + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 69 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map69_HSync() +{ +/* + * Callback at HSync + * + */ + if ( Map69_IRQ_Enable ) + { + if ( Map69_IRQ_Cnt <= 113 ) + { + IRQ_REQ; + Map69_IRQ_Cnt = 0; + } else { + Map69_IRQ_Cnt -= 113; + } + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_070.c b/apps/plugins/infones/mapper/InfoNES_Mapper_070.c new file mode 100644 index 0000000..7072e0d --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_070.c @@ -0,0 +1,88 @@ +/*===================================================================*/ +/* */ +/* Mapper 70 (74161/32 Bandai) */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 70 */ +/*-------------------------------------------------------------------*/ +void Map70_Init() +{ + /* Initialize Mapper */ + MapperInit = Map70_Init; + + /* Write to Mapper */ + MapperWrite = Map70_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 70 Write Function */ +/*-------------------------------------------------------------------*/ +void Map70_Write( WORD wAddr, BYTE byData ) +{ + BYTE byChrBank = byData & 0x0f; + BYTE byPrgBank = ( byData & 0x70 ) >> 4; + + /* Set ROM Banks */ + byPrgBank <<= 1; + byPrgBank %= ( NesHeader.byRomSize << 1 ); + + ROMBANK0 = ROMPAGE( byPrgBank ); + ROMBANK1 = ROMPAGE( byPrgBank + 1 ); + + /* Set PPU Banks */ + byChrBank <<= 3; + byChrBank %= ( NesHeader.byVRomSize << 3 ); + + PPUBANK[ 0 ] = VROMPAGE( byChrBank + 0 ); + PPUBANK[ 1 ] = VROMPAGE( byChrBank + 1 ); + PPUBANK[ 2 ] = VROMPAGE( byChrBank + 2 ); + PPUBANK[ 3 ] = VROMPAGE( byChrBank + 3 ); + PPUBANK[ 4 ] = VROMPAGE( byChrBank + 4 ); + PPUBANK[ 5 ] = VROMPAGE( byChrBank + 5 ); + PPUBANK[ 6 ] = VROMPAGE( byChrBank + 6 ); + PPUBANK[ 7 ] = VROMPAGE( byChrBank + 7 ); + InfoNES_SetupChr(); + + /* Name Table Mirroring */ + if ( byData & 0x80 ) + { + InfoNES_Mirroring( 2 ); + } else { + InfoNES_Mirroring( 3 ); + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_071.c b/apps/plugins/infones/mapper/InfoNES_Mapper_071.c new file mode 100644 index 0000000..80e3120 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_071.c @@ -0,0 +1,77 @@ +/*===================================================================*/ +/* */ +/* Mapper 71 (Camerica Custom Mapper) */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 71 */ +/*-------------------------------------------------------------------*/ +void Map71_Init() +{ + /* Initialize Mapper */ + MapperInit = Map71_Init; + + /* Write to Mapper */ + MapperWrite = Map71_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 71 Write Function */ +/*-------------------------------------------------------------------*/ +void Map71_Write( WORD wAddr, BYTE byData ) +{ + switch ( wAddr & 0xf000 ) + { + case 0x9000: + if ( byData & 0x10 ) + { + InfoNES_Mirroring( 2 ); + } else { + InfoNES_Mirroring( 3 ); + } + break; + + /* Set ROM Banks */ + case 0xc000: + case 0xd000: + case 0xe000: + case 0xf000: + ROMBANK0 = ROMPAGE( ( ( byData << 1 ) + 0 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE( ( ( byData << 1 ) + 1 ) % ( NesHeader.byRomSize << 1 ) ); + break; + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_072.c b/apps/plugins/infones/mapper/InfoNES_Mapper_072.c new file mode 100644 index 0000000..7fb2c07 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_072.c @@ -0,0 +1,90 @@ +/*===================================================================*/ +/* */ +/* Mapper 72 (Jaleco Early Mapper #0) */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 72 */ +/*-------------------------------------------------------------------*/ +void Map72_Init() +{ + /* Initialize Mapper */ + MapperInit = Map72_Init; + + /* Write to Mapper */ + MapperWrite = Map72_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 72 Write Function */ +/*-------------------------------------------------------------------*/ +void Map72_Write( WORD wAddr, BYTE byData ) +{ + BYTE byBank = byData & 0x0f; + + if ( byData & 0x80 ) + { + /* Set ROM Banks */ + byBank <<= 1; + byBank %= ( NesHeader.byRomSize << 1 ); + ROMBANK0 = ROMPAGE( byBank ); + ROMBANK1 = ROMPAGE( byBank + 1 ); + } else + if ( byData & 0x40 ) + { + /* Set PPU Banks */ + byBank <<= 3; + byBank %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 0 ] = VROMPAGE( byBank ); + PPUBANK[ 1 ] = VROMPAGE( byBank + 1 ); + PPUBANK[ 2 ] = VROMPAGE( byBank + 2 ); + PPUBANK[ 3 ] = VROMPAGE( byBank + 3 ); + PPUBANK[ 4 ] = VROMPAGE( byBank + 4 ); + PPUBANK[ 5 ] = VROMPAGE( byBank + 5 ); + PPUBANK[ 6 ] = VROMPAGE( byBank + 6 ); + PPUBANK[ 7 ] = VROMPAGE( byBank + 7 ); + InfoNES_SetupChr(); + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_073.c b/apps/plugins/infones/mapper/InfoNES_Mapper_073.c new file mode 100644 index 0000000..86da174 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_073.c @@ -0,0 +1,127 @@ +/*===================================================================*/ +/* */ +/* Mapper 73 (Konami VRC 3) */ +/* */ +/*===================================================================*/ + +BYTE Map73_IRQ_Enable; +DWORD Map73_IRQ_Cnt; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 73 */ +/*-------------------------------------------------------------------*/ +void Map73_Init() +{ + /* Initialize Mapper */ + MapperInit = Map73_Init; + + /* Write to Mapper */ + MapperWrite = Map73_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map73_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Initialize IRQ Registers */ + Map73_IRQ_Enable = 0; + Map73_IRQ_Cnt = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 73 Write Function */ +/*-------------------------------------------------------------------*/ +void Map73_Write( WORD wAddr, BYTE byData ) +{ + switch ( wAddr ) + { + case 0x8000: + Map73_IRQ_Cnt = ( Map73_IRQ_Cnt & 0xfff0 ) | ( byData & 0x0f ); + break; + + case 0x9000: + Map73_IRQ_Cnt = ( Map73_IRQ_Cnt & 0xff0f ) | ( ( byData & 0x0f ) << 4 ); + break; + + case 0xa000: + Map73_IRQ_Cnt = ( Map73_IRQ_Cnt & 0xf0ff ) | ( ( byData & 0x0f ) << 8 ); + break; + + case 0xb000: + Map73_IRQ_Cnt = ( Map73_IRQ_Cnt & 0x0fff ) | ( ( byData & 0x0f ) << 12 ); + break; + + case 0xc000: + Map73_IRQ_Enable = byData; + break; + + /* Set ROM Banks */ + case 0xf000: + byData <<= 1; + byData %= ( NesHeader.byRomSize << 1 ); + ROMBANK0 = ROMPAGE( byData ); + ROMBANK1 = ROMPAGE( byData + 1 ); + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 73 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map73_HSync() +{ +/* + * Callback at HSync + * + */ +#if 1 + if ( Map73_IRQ_Enable & 0x02 ) + { + if ( ( Map73_IRQ_Cnt += STEP_PER_SCANLINE ) > 0xffff ) + { + Map73_IRQ_Cnt &= 0xffff; + IRQ_REQ; + Map73_IRQ_Enable = 0; + } + } +#else + if ( Map73_IRQ_Enable ) + { + if ( Map73_IRQ_Cnt > 0xffff - 114 ) + { + IRQ_REQ; + Map73_IRQ_Enable = 0; + } else { + Map73_IRQ_Cnt += 114; + } + } +#endif +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_074.c b/apps/plugins/infones/mapper/InfoNES_Mapper_074.c new file mode 100644 index 0000000..2cb21b4 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_074.c @@ -0,0 +1,344 @@ +/*===================================================================*/ +/* */ +/* Mapper 74 : Metal Max (Zhong Zhuang Ji Bing */ +/* */ +/*===================================================================*/ + +BYTE Map74_Regs[ 8 ]; +DWORD Map74_Rom_Bank; +DWORD Map74_Prg0, Map74_Prg1; +DWORD Map74_Chr01, Map74_Chr23; +DWORD Map74_Chr4, Map74_Chr5, Map74_Chr6, Map74_Chr7; + +#define Map74_Chr_Swap() ( Map74_Regs[ 0 ] & 0x80 ) +#define Map74_Prg_Swap() ( Map74_Regs[ 0 ] & 0x40 ) + +BYTE Map74_IRQ_Enable; +BYTE Map74_IRQ_Cnt; +BYTE Map74_IRQ_Latch; +BYTE Map74_IRQ_Request; +BYTE Map74_IRQ_Present; +BYTE Map74_IRQ_Present_Vbl; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 74 */ +/*-------------------------------------------------------------------*/ +void Map74_Init() +{ + /* Initialize Mapper */ + MapperInit = Map74_Init; + + /* Write to Mapper */ + MapperWrite = Map74_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map74_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Initialize State Registers */ + for ( int nPage = 0; nPage < 8; nPage++ ) + { + Map74_Regs[ nPage ] = 0x00; + } + + /* Set ROM Banks */ + Map74_Prg0 = 0; + Map74_Prg1 = 1; + Map74_Set_CPU_Banks(); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + Map74_Chr01 = 0; + Map74_Chr23 = 2; + Map74_Chr4 = 4; + Map74_Chr5 = 5; + Map74_Chr6 = 6; + Map74_Chr7 = 7; + Map74_Set_PPU_Banks(); + } else { + Map74_Chr01 = Map74_Chr23 = 0; + Map74_Chr4 = Map74_Chr5 = Map74_Chr6 = Map74_Chr7 = 0; + } + + /* Initialize IRQ Registers */ + Map74_IRQ_Enable = 0; + Map74_IRQ_Cnt = 0; + Map74_IRQ_Latch = 0; + Map74_IRQ_Request = 0; + Map74_IRQ_Present = 0; + Map74_IRQ_Present_Vbl = 0; + + /* VRAM Write Enabled */ + byVramWriteEnable = 1; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 74 Write Function */ +/*-------------------------------------------------------------------*/ +void Map74_Write( WORD wAddr, BYTE byData ) +{ + DWORD dwBankNum; + + switch ( wAddr & 0xe001 ) + { + case 0x8000: + Map74_Regs[ 0 ] = byData; + Map74_Set_PPU_Banks(); + Map74_Set_CPU_Banks(); + break; + + case 0x8001: + Map74_Regs[ 1 ] = byData; + dwBankNum = Map74_Regs[ 1 ]; + + switch ( Map74_Regs[ 0 ] & 0x07 ) + { + /* Set PPU Banks */ + case 0x00: + if ( NesHeader.byVRomSize > 0 ) + { + dwBankNum &= 0xfe; + Map74_Chr01 = dwBankNum; + Map74_Set_PPU_Banks(); + } + break; + + case 0x01: + if ( NesHeader.byVRomSize > 0 ) + { + dwBankNum &= 0xfe; + Map74_Chr23 = dwBankNum; + Map74_Set_PPU_Banks(); + } + break; + + case 0x02: + if ( NesHeader.byVRomSize > 0 ) + { + Map74_Chr4 = dwBankNum; + Map74_Set_PPU_Banks(); + } + break; + + case 0x03: + if ( NesHeader.byVRomSize > 0 ) + { + Map74_Chr5 = dwBankNum; + Map74_Set_PPU_Banks(); + } + break; + + case 0x04: + if ( NesHeader.byVRomSize > 0 ) + { + Map74_Chr6 = dwBankNum; + Map74_Set_PPU_Banks(); + } + break; + + case 0x05: + if ( NesHeader.byVRomSize > 0 ) + { + Map74_Chr7 = dwBankNum; + Map74_Set_PPU_Banks(); + } + break; + + /* Set ROM Banks */ + case 0x06: + Map74_Prg0 = dwBankNum; + Map74_Set_CPU_Banks(); + break; + + case 0x07: + Map74_Prg1 = dwBankNum; + Map74_Set_CPU_Banks(); + break; + } + break; + + case 0xa000: + Map74_Regs[ 2 ] = byData; + + if ( !ROM_FourScr ) + { + if ( byData & 0x01 ) + { + InfoNES_Mirroring( 0 ); + } else { + InfoNES_Mirroring( 1 ); + } + } + break; + + case 0xa001: + Map74_Regs[ 3 ] = byData; + break; + + case 0xc000: + Map74_Regs[ 4 ] = byData; + Map74_IRQ_Latch = byData; + break; + + case 0xc001: + Map74_Regs[ 5 ] = byData; + if ( PPU_Scanline < 240 ) + { + Map74_IRQ_Cnt |= 0x80; + Map74_IRQ_Present = 0xff; + } else { + Map74_IRQ_Cnt |= 0x80; + Map74_IRQ_Present_Vbl = 0xff; + Map74_IRQ_Present = 0; + } + break; + + case 0xe000: + Map74_Regs[ 6 ] = byData; + Map74_IRQ_Enable = 0; + Map74_IRQ_Request = 0; + break; + + case 0xe001: + Map74_Regs[ 7 ] = byData; + Map74_IRQ_Enable = 1; + Map74_IRQ_Request = 0; + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 74 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map74_HSync() +{ +/* + * Callback at HSync + * + */ + if ( ( /* 0 <= PPU_Scanline && */ PPU_Scanline <= 239 ) && + ( PPU_R1 & R1_SHOW_SCR || PPU_R1 & R1_SHOW_SP ) ) + { + if( Map74_IRQ_Present_Vbl ) { + Map74_IRQ_Cnt = Map74_IRQ_Latch; + Map74_IRQ_Present_Vbl = 0; + } + if( Map74_IRQ_Present ) { + Map74_IRQ_Cnt = Map74_IRQ_Latch; + Map74_IRQ_Present = 0; + } else if( Map74_IRQ_Cnt > 0 ) { + Map74_IRQ_Cnt--; + } + + if( Map74_IRQ_Cnt == 0 ) { + if( Map74_IRQ_Enable ) { + Map74_IRQ_Request = 0xFF; + } + Map74_IRQ_Present = 0xFF; + } + } + if( Map74_IRQ_Request ) { + IRQ_REQ; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 74 Set CPU Banks Function */ +/*-------------------------------------------------------------------*/ +void Map74_Set_CPU_Banks() +{ + if ( Map74_Prg_Swap() ) + { + ROMBANK0 = ROMLASTPAGE( 1 ); + ROMBANK1 = ROMPAGE( Map74_Prg1 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMPAGE( Map74_Prg0 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK3 = ROMLASTPAGE( 0 ); + } else { + ROMBANK0 = ROMPAGE( Map74_Prg0 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE( Map74_Prg1 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 74 Set PPU Banks Function */ +/*-------------------------------------------------------------------*/ +void Map74_Set_PPU_Banks() +{ + if ( NesHeader.byVRomSize > 0 ) + { + if ( Map74_Chr_Swap() ) + { + PPUBANK[ 0 ] = VROMPAGE( Map74_Chr4 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( Map74_Chr5 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( Map74_Chr6 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( Map74_Chr7 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 4 ] = VROMPAGE( ( Map74_Chr01 + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( ( Map74_Chr01 + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE( ( Map74_Chr23 + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( ( Map74_Chr23 + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + } else { + PPUBANK[ 0 ] = VROMPAGE( ( Map74_Chr01 + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( ( Map74_Chr01 + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( ( Map74_Chr23 + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( ( Map74_Chr23 + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 4 ] = VROMPAGE( Map74_Chr4 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( Map74_Chr5 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE( Map74_Chr6 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( Map74_Chr7 % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + } + } + else + { + if ( Map74_Chr_Swap() ) + { + PPUBANK[ 0 ] = CRAMPAGE( 0 ); + PPUBANK[ 1 ] = CRAMPAGE( 1 ); + PPUBANK[ 2 ] = CRAMPAGE( 2 ); + PPUBANK[ 3 ] = CRAMPAGE( 3 ); + PPUBANK[ 4 ] = CRAMPAGE( 4 ); + PPUBANK[ 5 ] = CRAMPAGE( 5 ); + PPUBANK[ 6 ] = CRAMPAGE( 6 ); + PPUBANK[ 7 ] = CRAMPAGE( 7 ); + InfoNES_SetupChr(); + } else { + PPUBANK[ 0 ] = CRAMPAGE( 0 ); + PPUBANK[ 1 ] = CRAMPAGE( 1 ); + PPUBANK[ 2 ] = CRAMPAGE( 2 ); + PPUBANK[ 3 ] = CRAMPAGE( 3 ); + PPUBANK[ 4 ] = CRAMPAGE( 4 ); + PPUBANK[ 5 ] = CRAMPAGE( 5 ); + PPUBANK[ 6 ] = CRAMPAGE( 6 ); + PPUBANK[ 7 ] = CRAMPAGE( 7 ); + InfoNES_SetupChr(); + } + } +} + diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_075.c b/apps/plugins/infones/mapper/InfoNES_Mapper_075.c new file mode 100644 index 0000000..acf0909 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_075.c @@ -0,0 +1,135 @@ +/*===================================================================*/ +/* */ +/* Mapper 75 (Konami VRC 1 and Jaleco SS8805) */ +/* */ +/*===================================================================*/ + +BYTE Map75_Regs[ 2 ]; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 75 */ +/*-------------------------------------------------------------------*/ +void Map75_Init() +{ + /* Initialize Mapper */ + MapperInit = Map75_Init; + + /* Write to Mapper */ + MapperWrite = Map75_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Initialize State Flag */ + Map75_Regs[ 0 ] = 0; + Map75_Regs[ 1 ] = 1; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 75 Write Function */ +/*-------------------------------------------------------------------*/ +void Map75_Write( WORD wAddr, BYTE byData ) +{ + switch ( wAddr & 0xf000 ) + { + /* Set ROM Banks */ + case 0x8000: + byData %= ( NesHeader.byRomSize << 1 ); + ROMBANK0 = ROMPAGE( byData ); + break; + + case 0x9000: + /* Set Mirroring */ + if ( byData & 0x01 ) + { + InfoNES_Mirroring( 0 ); + } else { + InfoNES_Mirroring( 1 ); + } + + /* Set PPU Banks */ + Map75_Regs[ 0 ] = ( Map75_Regs[ 0 ] & 0x0f ) | ( ( byData & 0x02 ) << 3 ); + PPUBANK[ 0 ] = VROMPAGE( ( Map75_Regs[ 0 ] << 2 ) + 0 ); + PPUBANK[ 1 ] = VROMPAGE( ( Map75_Regs[ 0 ] << 2 ) + 1 ); + PPUBANK[ 2 ] = VROMPAGE( ( Map75_Regs[ 0 ] << 2 ) + 2 ); + PPUBANK[ 3 ] = VROMPAGE( ( Map75_Regs[ 0 ] << 2 ) + 3 ); + + Map75_Regs[ 1 ] = ( Map75_Regs[ 1 ] & 0x0f ) | ( ( byData & 0x04 ) << 2 ); + PPUBANK[ 4 ] = VROMPAGE( ( Map75_Regs[ 1 ] << 2 ) + 0 ); + PPUBANK[ 5 ] = VROMPAGE( ( Map75_Regs[ 1 ] << 2 ) + 1 ); + PPUBANK[ 6 ] = VROMPAGE( ( Map75_Regs[ 1 ] << 2 ) + 2 ); + PPUBANK[ 7 ] = VROMPAGE( ( Map75_Regs[ 1 ] << 2 ) + 3 ); + InfoNES_SetupChr(); + break; + + /* Set ROM Banks */ + case 0xA000: + byData %= ( NesHeader.byRomSize << 1 ); + ROMBANK1 = ROMPAGE( byData ); + break; + + /* Set ROM Banks */ + case 0xC000: + byData %= ( NesHeader.byRomSize << 1 ); + ROMBANK2 = ROMPAGE( byData ); + break; + + case 0xE000: + /* Set PPU Banks */ + Map75_Regs[ 0 ] = ( Map75_Regs[ 0 ] & 0x10 ) | ( byData & 0x0f ); + PPUBANK[ 0 ] = VROMPAGE( ( Map75_Regs[ 0 ] << 2 ) + 0 ); + PPUBANK[ 1 ] = VROMPAGE( ( Map75_Regs[ 0 ] << 2 ) + 1 ); + PPUBANK[ 2 ] = VROMPAGE( ( Map75_Regs[ 0 ] << 2 ) + 2 ); + PPUBANK[ 3 ] = VROMPAGE( ( Map75_Regs[ 0 ] << 2 ) + 3 ); + InfoNES_SetupChr(); + break; + + case 0xF000: + /* Set PPU Banks */ + Map75_Regs[ 1 ] = ( Map75_Regs[ 1 ] & 0x10 ) | ( byData & 0x0f ); + PPUBANK[ 4 ] = VROMPAGE( ( Map75_Regs[ 1 ] << 2 ) + 0 ); + PPUBANK[ 5 ] = VROMPAGE( ( Map75_Regs[ 1 ] << 2 ) + 1 ); + PPUBANK[ 6 ] = VROMPAGE( ( Map75_Regs[ 1 ] << 2 ) + 2 ); + PPUBANK[ 7 ] = VROMPAGE( ( Map75_Regs[ 1 ] << 2 ) + 3 ); + InfoNES_SetupChr(); + break; + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_076.c b/apps/plugins/infones/mapper/InfoNES_Mapper_076.c new file mode 100644 index 0000000..5221f3a --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_076.c @@ -0,0 +1,120 @@ +/*===================================================================*/ +/* */ +/* Mapper 76 (Namcot 109) */ +/* */ +/*===================================================================*/ + +BYTE Map76_Reg; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 76 */ +/*-------------------------------------------------------------------*/ +void Map76_Init() +{ + /* Initialize Mapper */ + MapperInit = Map76_Init; + + /* Write to Mapper */ + MapperWrite = Map76_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 76 Write Function */ +/*-------------------------------------------------------------------*/ +void Map76_Write( WORD wAddr, BYTE byData ) +{ + switch ( wAddr ) + { + case 0x8000: + Map76_Reg = byData; + break; + + case 0x8001: + switch ( Map76_Reg & 0x07 ) + { + case 0x02: + byData <<= 1; + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 0 ] = VROMPAGE( byData ); + PPUBANK[ 1 ] = VROMPAGE( byData + 1 ); + InfoNES_SetupChr(); + break; + + case 0x03: + byData <<= 1; + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 2 ] = VROMPAGE( byData ); + PPUBANK[ 3 ] = VROMPAGE( byData + 1 ); + InfoNES_SetupChr(); + break; + + case 0x04: + byData <<= 1; + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 4 ] = VROMPAGE( byData ); + PPUBANK[ 5 ] = VROMPAGE( byData + 1 ); + InfoNES_SetupChr(); + break; + + case 0x05: + byData <<= 1; + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 6 ] = VROMPAGE( byData ); + PPUBANK[ 7 ] = VROMPAGE( byData + 1 ); + InfoNES_SetupChr(); + break; + + case 0x06: + byData %= ( NesHeader.byRomSize << 1 ); + ROMBANK0 = ROMPAGE( byData ); + break; + + case 0x07: + byData %= ( NesHeader.byRomSize << 1 ); + ROMBANK1 = ROMPAGE( byData ); + break; + } + break; + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_077.c b/apps/plugins/infones/mapper/InfoNES_Mapper_077.c new file mode 100644 index 0000000..7ce6c93 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_077.c @@ -0,0 +1,79 @@ +/*===================================================================*/ +/* */ +/* Mapper 77 (Irem Early Mapper #0) */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 77 */ +/*-------------------------------------------------------------------*/ +void Map77_Init() +{ + /* Initialize Mapper */ + MapperInit = Map77_Init; + + /* Write to Mapper */ + MapperWrite = Map77_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + + /* VRAM Write Enabled */ + byVramWriteEnable = 1; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 77 Write Function */ +/*-------------------------------------------------------------------*/ +void Map77_Write( WORD wAddr, BYTE byData ) +{ + BYTE byRomBank = byData & 0x07; + BYTE byChrBank = ( byData & 0xf0 ) >> 4; + + /* Set ROM Banks */ + byRomBank <<= 2; + byRomBank %= ( NesHeader.byRomSize << 1 ); + + ROMBANK0 = ROMPAGE( byRomBank ); + ROMBANK1 = ROMPAGE( byRomBank + 1 ); + ROMBANK2 = ROMPAGE( byRomBank + 2 ); + ROMBANK3 = ROMPAGE( byRomBank + 3 ); + + /* Set PPU Banks */ + byChrBank <<= 1; + byChrBank %= ( NesHeader.byVRomSize << 3 ); + + PPUBANK[ 0 ] = VROMPAGE( byChrBank ); + PPUBANK[ 1 ] = VROMPAGE( byChrBank + 1 ); + InfoNES_SetupChr(); +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_078.c b/apps/plugins/infones/mapper/InfoNES_Mapper_078.c new file mode 100644 index 0000000..04680fb --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_078.c @@ -0,0 +1,97 @@ +/*===================================================================*/ +/* */ +/* Mapper 78 (74161/32 Irem) */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 78 */ +/*-------------------------------------------------------------------*/ +void Map78_Init() +{ + /* Initialize Mapper */ + MapperInit = Map78_Init; + + /* Write to Mapper */ + MapperWrite = Map78_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 78 Write Function */ +/*-------------------------------------------------------------------*/ +void Map78_Write( WORD wAddr, BYTE byData ) +{ + BYTE byPrgBank = byData & 0x0f; + BYTE byChrBank = ( byData & 0xf0 ) >> 4; + + /* Set ROM Banks */ + byPrgBank <<= 1; + byPrgBank %= ( NesHeader.byRomSize << 1 ); + ROMBANK0 = ROMPAGE( byPrgBank ); + ROMBANK1 = ROMPAGE( byPrgBank + 1); + + /* Set PPU Banks */ + byChrBank <<= 3; + byChrBank %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 0 ] = VROMPAGE( byChrBank ); + PPUBANK[ 1 ] = VROMPAGE( byChrBank + 1 ); + PPUBANK[ 2 ] = VROMPAGE( byChrBank + 2 ); + PPUBANK[ 3 ] = VROMPAGE( byChrBank + 3 ); + PPUBANK[ 4 ] = VROMPAGE( byChrBank + 4 ); + PPUBANK[ 5 ] = VROMPAGE( byChrBank + 5 ); + PPUBANK[ 6 ] = VROMPAGE( byChrBank + 6 ); + PPUBANK[ 7 ] = VROMPAGE( byChrBank + 7 ); + InfoNES_SetupChr(); + + /* Set Name Table Mirroring */ + if ( ( wAddr & 0xfe00 ) != 0xfe00 ) + { + if ( byData & 0x08 ) + { + InfoNES_Mirroring( 2 ); + } else { + InfoNES_Mirroring( 3 ); + } + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_079.c b/apps/plugins/infones/mapper/InfoNES_Mapper_079.c new file mode 100644 index 0000000..cdb8e59 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_079.c @@ -0,0 +1,90 @@ +/*===================================================================*/ +/* */ +/* Mapper 79 (American Video Entertainment/Sachen Custom Mapper) */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 79 */ +/*-------------------------------------------------------------------*/ +void Map79_Init() +{ + /* Initialize Mapper */ + MapperInit = Map79_Init; + + /* Write to Mapper */ + MapperWrite = Map0_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map79_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 79 Write to Apu Function */ +/*-------------------------------------------------------------------*/ +void Map79_Apu( WORD wAddr, BYTE byData ) +{ + BYTE byPrgBank = ( byData & 0x08 ) >> 3; + BYTE byChrBank = byData & 0x07; + + /* Set ROM Banks */ + byPrgBank <<= 2; + byPrgBank %= ( NesHeader.byRomSize << 1 ); + + ROMBANK0 = ROMPAGE( byPrgBank + 0 ); + ROMBANK1 = ROMPAGE( byPrgBank + 1 ); + ROMBANK2 = ROMPAGE( byPrgBank + 2 ); + ROMBANK3 = ROMPAGE( byPrgBank + 3 ); + + /* Set PPU Banks */ + byChrBank <<= 3; + byChrBank %= ( NesHeader.byVRomSize << 3 ); + + PPUBANK[ 0 ] = VROMPAGE( byChrBank + 0 ); + PPUBANK[ 1 ] = VROMPAGE( byChrBank + 1 ); + PPUBANK[ 2 ] = VROMPAGE( byChrBank + 2 ); + PPUBANK[ 3 ] = VROMPAGE( byChrBank + 3 ); + PPUBANK[ 4 ] = VROMPAGE( byChrBank + 4 ); + PPUBANK[ 5 ] = VROMPAGE( byChrBank + 5 ); + PPUBANK[ 6 ] = VROMPAGE( byChrBank + 6 ); + PPUBANK[ 7 ] = VROMPAGE( byChrBank + 7 ); + InfoNES_SetupChr(); +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_080.c b/apps/plugins/infones/mapper/InfoNES_Mapper_080.c new file mode 100644 index 0000000..d7b687a --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_080.c @@ -0,0 +1,138 @@ +/*===================================================================*/ +/* */ +/* Mapper 80 (X1-005) */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 80 */ +/*-------------------------------------------------------------------*/ +void Map80_Init() +{ + /* Initialize Mapper */ + MapperInit = Map80_Init; + + /* Write to Mapper */ + MapperWrite = Map0_Write; + + /* Write to SRAM */ + MapperSram = Map80_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 80 Write to SRAM Function */ +/*-------------------------------------------------------------------*/ +void Map80_Sram( WORD wAddr, BYTE byData ) +{ + switch ( wAddr ) + { + /* Set PPU Banks */ + case 0x7ef0: + byData &= 0x7f; + byData %= ( NesHeader.byVRomSize << 3 ); + + PPUBANK[ 0 ] = VROMPAGE( byData ); + PPUBANK[ 1 ] = VROMPAGE( byData + 1 ); + InfoNES_SetupChr(); + break; + + case 0x7ef1: + byData &= 0x7f; + byData %= ( NesHeader.byVRomSize << 3 ); + + PPUBANK[ 2 ] = VROMPAGE( byData ); + PPUBANK[ 3 ] = VROMPAGE( byData + 1 ); + InfoNES_SetupChr(); + break; + + case 0x7ef2: + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 4 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0x7ef3: + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 5 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0x7ef4: + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 6 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0x7ef5: + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 7 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + /* Name Table Mirroring */ + case 0x7ef6: + if ( byData & 0x01 ) + { + InfoNES_Mirroring( 1 ); + } else { + InfoNES_Mirroring( 0 ); + } + + /* Set ROM Banks */ + case 0x7efa: + case 0x7efb: + byData %= ( NesHeader.byRomSize << 1 ); + ROMBANK0 = ROMPAGE( byData ); + break; + + case 0x7efc: + case 0x7efd: + byData %= ( NesHeader.byRomSize << 1 ); + ROMBANK1 = ROMPAGE( byData ); + break; + + case 0x7efe: + case 0x7eff: + byData %= ( NesHeader.byRomSize << 1 ); + ROMBANK2 = ROMPAGE( byData ); + break; + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_082.c b/apps/plugins/infones/mapper/InfoNES_Mapper_082.c new file mode 100644 index 0000000..e8b9d3d --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_082.c @@ -0,0 +1,181 @@ +/*===================================================================*/ +/* */ +/* Mapper 82 (Taito X1-17) */ +/* */ +/*===================================================================*/ + +BYTE Map82_Regs[ 1 ]; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 82 */ +/*-------------------------------------------------------------------*/ +void Map82_Init() +{ + /* Initialize Mapper */ + MapperInit = Map82_Init; + + /* Write to Mapper */ + MapperWrite = Map0_Write; + + /* Write to SRAM */ + MapperSram = Map82_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Name Table Mirroring */ + InfoNES_Mirroring( 1 ); + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 82 Write to SRAM Function */ +/*-------------------------------------------------------------------*/ +void Map82_Sram( WORD wAddr, BYTE byData ) +{ + switch ( wAddr ) + { + /* Set PPU Banks */ + case 0x7ef0: + byData &= 0xfe; + byData %= ( NesHeader.byVRomSize << 3 ); + + if ( Map82_Regs[ 0 ] ) + { + PPUBANK[ 4 ] = VROMPAGE( byData ); + PPUBANK[ 5 ] = VROMPAGE( byData + 1 ); + } else { + PPUBANK[ 0 ] = VROMPAGE( byData ); + PPUBANK[ 1 ] = VROMPAGE( byData + 1 ); + } + InfoNES_SetupChr(); + break; + + case 0x7ef1: + byData &= 0xfe; + byData %= ( NesHeader.byVRomSize << 3 ); + + if ( Map82_Regs[ 0 ] ) + { + PPUBANK[ 6 ] = VROMPAGE( byData ); + PPUBANK[ 7 ] = VROMPAGE( byData + 1 ); + } else { + PPUBANK[ 2 ] = VROMPAGE( byData ); + PPUBANK[ 3 ] = VROMPAGE( byData + 1 ); + } + InfoNES_SetupChr(); + break; + + case 0x7ef2: + byData %= ( NesHeader.byVRomSize << 3 ); + + if ( !Map82_Regs[ 0 ] ) + { + PPUBANK[ 4 ] = VROMPAGE( byData ); + } else { + PPUBANK[ 0 ] = VROMPAGE( byData ); + } + InfoNES_SetupChr(); + break; + + case 0x7ef3: + byData %= ( NesHeader.byVRomSize << 3 ); + + if ( !Map82_Regs[ 0 ] ) + { + PPUBANK[ 5 ] = VROMPAGE( byData ); + } else { + PPUBANK[ 1 ] = VROMPAGE( byData ); + } + InfoNES_SetupChr(); + break; + + case 0x7ef4: + byData %= ( NesHeader.byVRomSize << 3 ); + + if ( !Map82_Regs[ 0 ] ) + { + PPUBANK[ 6 ] = VROMPAGE( byData ); + } else { + PPUBANK[ 2 ] = VROMPAGE( byData ); + } + InfoNES_SetupChr(); + break; + + case 0x7ef5: + byData %= ( NesHeader.byVRomSize << 3 ); + + if ( !Map82_Regs[ 0 ] ) + { + PPUBANK[ 7 ] = VROMPAGE( byData ); + } else { + PPUBANK[ 3 ] = VROMPAGE( byData ); + } + InfoNES_SetupChr(); + break; + + /* Name Table Mirroring */ + case 0x7ef6: + Map82_Regs[ 0 ] = byData & 0x02; + + if ( byData & 0x01 ) + { + InfoNES_Mirroring( 1 ); + } else { + InfoNES_Mirroring( 0 ); + } + + /* Set ROM Banks */ + case 0x7efa: + byData >>= 2; + byData %= ( NesHeader.byRomSize << 1 ); + ROMBANK0 = ROMPAGE( byData ); + break; + + case 0x7efb: + byData >>= 2; + byData %= ( NesHeader.byRomSize << 1 ); + ROMBANK1 = ROMPAGE( byData ); + break; + + case 0x7efc: + byData >>= 2; + byData %= ( NesHeader.byRomSize << 1 ); + ROMBANK2 = ROMPAGE( byData ); + break; + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_083.c b/apps/plugins/infones/mapper/InfoNES_Mapper_083.c new file mode 100644 index 0000000..9cc3b72 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_083.c @@ -0,0 +1,315 @@ +/*===================================================================*/ +/* */ +/* Mapper 83 (Pirates) */ +/* */ +/*===================================================================*/ + +BYTE Map83_Regs[3]; +DWORD Map83_Chr_Bank; +DWORD Map83_IRQ_Cnt; +BYTE Map83_IRQ_Enabled; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 83 */ +/*-------------------------------------------------------------------*/ +void Map83_Init() +{ + /* Initialize Mapper */ + MapperInit = Map83_Init; + + /* Write to Mapper */ + MapperWrite = Map83_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map83_Apu; + + /* Read from APU */ + MapperReadApu = Map83_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map83_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Initialize Registers */ + Map83_Regs[0] = Map83_Regs[1] = Map83_Regs[2] = 0; + + /* Set ROM Banks */ + if ( ( NesHeader.byRomSize << 1 ) >= 32 ) + { + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 30 ); + ROMBANK3 = ROMPAGE( 31 ); + Map83_Regs[ 1 ] = 0x30; + } + else + { + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + } + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Initialize IRQ Registers */ + Map83_IRQ_Enabled = 0; + Map83_IRQ_Cnt = 0; + Map83_Chr_Bank = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 83 Read from APU Function */ +/*-------------------------------------------------------------------*/ +BYTE Map83_ReadApu( WORD wAddr ) +{ + if ( ( wAddr & 0x5100 ) == 0x5100 ) + { + return Map83_Regs[2]; + } + else + { + return wAddr >> 8; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 83 Write to APU Function */ +/*-------------------------------------------------------------------*/ +void Map83_Apu( WORD wAddr, BYTE byData ) +{ + switch(wAddr) + { + case 0x5101: + case 0x5102: + case 0x5103: + Map83_Regs[2] = byData; + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 83 Write Function */ +/*-------------------------------------------------------------------*/ +void Map83_Write( WORD wAddr, BYTE byData ) +{ + /* Set ROM Banks */ + switch( wAddr ) + { + case 0x8000: + case 0xB000: + case 0xB0FF: + case 0xB1FF: + Map83_Regs[0] = byData; + Map83_Chr_Bank = (byData & 0x30) << 4; + + ROMBANK0 = ROMPAGE( (byData*2+0) % (NesHeader.byRomSize << 1) ); + ROMBANK1 = ROMPAGE( (byData*2+1) % (NesHeader.byRomSize << 1) ); + ROMBANK2 = ROMPAGE( (((byData&0x30)|0x0F)*2+0) % (NesHeader.byRomSize << 1) ); + ROMBANK3 = ROMPAGE( (((byData&0x30)|0x0F)*2+1) % (NesHeader.byRomSize << 1) ); + break; + + case 0x8100: + if ( NesHeader.byVRomSize <= 32 ) + { + Map83_Regs[1] = byData; + } + if ((byData & 0x03) == 0x00) + { + InfoNES_Mirroring( 1 ); + } + else if((byData & 0x03) == 0x01) + { + InfoNES_Mirroring( 0 ); + } + else if((byData & 0x03) == 0x02) + { + InfoNES_Mirroring( 3 ); + } + else + { + InfoNES_Mirroring( 2 ); + } + break; + + case 0x8200: + Map83_IRQ_Cnt = ( Map83_IRQ_Cnt & 0xFF00 ) | (DWORD)byData; + break; + + case 0x8201: + Map83_IRQ_Cnt = ( Map83_IRQ_Cnt & 0x00FF ) | ((DWORD)byData << 8); + Map83_IRQ_Enabled = byData; + break; + + case 0x8300: + ROMBANK0 = ROMPAGE( byData % (NesHeader.byRomSize << 1) ); + break; + + case 0x8301: + ROMBANK1 = ROMPAGE( byData % (NesHeader.byRomSize << 1) ); + break; + + case 0x8302: + ROMBANK2 = ROMPAGE( byData % (NesHeader.byRomSize << 1) ); + break; + + case 0x8310: + if ((Map83_Regs[1] & 0x30) == 0x30) + { + PPUBANK[ 0 ] = VROMPAGE( (Map83_Chr_Bank^byData) % (NesHeader.byVRomSize << 3) ); + InfoNES_SetupChr(); + } + else if((Map83_Regs[1] & 0x30) == 0x10 || (Map83_Regs[1] & 0x30) == 0x20) + { + PPUBANK[ 0 ] = VROMPAGE( (((Map83_Chr_Bank^byData)*2)+0) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 1 ] = VROMPAGE( (((Map83_Chr_Bank^byData)*2)+1) % (NesHeader.byVRomSize << 3) ); + InfoNES_SetupChr(); + } + break; + + case 0x8311: + if ((Map83_Regs[1] & 0x30) == 0x30) + { + PPUBANK[ 1 ] = VROMPAGE( (Map83_Chr_Bank^byData) % (NesHeader.byVRomSize << 3) ); + InfoNES_SetupChr(); + } + else if((Map83_Regs[1] & 0x30) == 0x10 || (Map83_Regs[1] & 0x30) == 0x20) + { + PPUBANK[ 2 ] = VROMPAGE( (((Map83_Chr_Bank^byData)*2)+0) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 3 ] = VROMPAGE( (((Map83_Chr_Bank^byData)*2)+1) % (NesHeader.byVRomSize << 3) ); + InfoNES_SetupChr(); + } + break; + + case 0x8312: + if ((Map83_Regs[1] & 0x30) == 0x30) + { + PPUBANK[ 2 ] = VROMPAGE( (Map83_Chr_Bank^byData) % (NesHeader.byVRomSize << 3) ); + InfoNES_SetupChr(); + } + else if((Map83_Regs[1] & 0x30) == 0x10 || (Map83_Regs[1] & 0x30) == 0x20) + { + PPUBANK[ 4 ] = VROMPAGE( (((Map83_Chr_Bank^byData)*2)+0) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 5 ] = VROMPAGE( (((Map83_Chr_Bank^byData)*2)+1) % (NesHeader.byVRomSize << 3) ); + InfoNES_SetupChr(); + } + break; + + case 0x8313: + if ((Map83_Regs[1] & 0x30) == 0x30) + { + PPUBANK[ 3 ] = VROMPAGE( (Map83_Chr_Bank^byData) % (NesHeader.byVRomSize << 3) ); + InfoNES_SetupChr(); + } + else if((Map83_Regs[1] & 0x30) == 0x10 || (Map83_Regs[1] & 0x30) == 0x20) + { + PPUBANK[ 6 ] = VROMPAGE( (((Map83_Chr_Bank^byData)*2)+0) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 7 ] = VROMPAGE( (((Map83_Chr_Bank^byData)*2)+1) % (NesHeader.byVRomSize << 3) ); + InfoNES_SetupChr(); + } + break; + + case 0x8314: + if ((Map83_Regs[1] & 0x30) == 0x30) + { + PPUBANK[ 4 ] = VROMPAGE( (Map83_Chr_Bank^byData) % (NesHeader.byVRomSize << 3) ); + InfoNES_SetupChr(); + } + else if((Map83_Regs[1] & 0x30) == 0x10 || (Map83_Regs[1] & 0x30) == 0x20) + { + PPUBANK[ 4 ] = VROMPAGE( (((Map83_Chr_Bank^byData)*2)+0) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 5 ] = VROMPAGE( (((Map83_Chr_Bank^byData)*2)+1) % (NesHeader.byVRomSize << 3) ); + InfoNES_SetupChr(); + } + break; + + case 0x8315: + if ((Map83_Regs[1] & 0x30) == 0x30) + { + PPUBANK[ 5 ] = VROMPAGE( (Map83_Chr_Bank^byData) % (NesHeader.byVRomSize << 3) ); + InfoNES_SetupChr(); + } + else if ((Map83_Regs[1] & 0x30) == 0x10 || (Map83_Regs[1] & 0x30) == 0x20) + { + PPUBANK[ 6 ] = VROMPAGE( (((Map83_Chr_Bank^byData)*2)+0) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 7 ] = VROMPAGE( (((Map83_Chr_Bank^byData)*2)+1) % (NesHeader.byVRomSize << 3) ); + InfoNES_SetupChr(); + } + break; + + case 0x8316: + if ((Map83_Regs[1] & 0x30) == 0x30) + { + PPUBANK[ 6 ] = VROMPAGE( (Map83_Chr_Bank^byData) % (NesHeader.byVRomSize << 3) ); + InfoNES_SetupChr(); + } + else if ((Map83_Regs[1] & 0x30) == 0x10 || (Map83_Regs[1] & 0x30) == 0x20) + { + PPUBANK[ 4 ] = VROMPAGE( (((Map83_Chr_Bank^byData)*2)+0) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 5 ] = VROMPAGE( (((Map83_Chr_Bank^byData)*2)+1) % (NesHeader.byVRomSize << 3) ); + InfoNES_SetupChr(); + } + break; + + case 0x8317: + if ((Map83_Regs[1] & 0x30) == 0x30) + { + PPUBANK[ 7 ] = VROMPAGE( (Map83_Chr_Bank^byData) % (NesHeader.byVRomSize << 3) ); + InfoNES_SetupChr(); + } + else if ( (Map83_Regs[1] & 0x30) == 0x10 || (Map83_Regs[1] & 0x30) == 0x20) + { + PPUBANK[ 6 ] = VROMPAGE( (((Map83_Chr_Bank^byData)*2)+0) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 7 ] = VROMPAGE( (((Map83_Chr_Bank^byData)*2)+1) % (NesHeader.byVRomSize << 3) ); + InfoNES_SetupChr(); + } + break; + + case 0x8318: + ROMBANK0 = ROMPAGE( (((Map83_Regs[0]&0x30)|byData)*2+0) % (NesHeader.byRomSize << 1) ); + ROMBANK1 = ROMPAGE( (((Map83_Regs[0]&0x30)|byData)*2+1) % (NesHeader.byRomSize << 1) ); + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 83 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map83_HSync() +{ + if (Map83_IRQ_Enabled) + { + if (Map83_IRQ_Cnt <= 114) + { + IRQ_REQ; + Map83_IRQ_Enabled = 0; + } + else + { + Map83_IRQ_Cnt -= 114; + } + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_085.c b/apps/plugins/infones/mapper/InfoNES_Mapper_085.c new file mode 100644 index 0000000..8175ee4 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_085.c @@ -0,0 +1,192 @@ +/*===================================================================*/ +/* */ +/* Mapper 85 (Konami VRC7) */ +/* */ +/*===================================================================*/ + +BYTE Map85_Chr_Ram[ 0x100 * 0x400 ]; +BYTE Map85_Regs[ 1 ]; +BYTE Map85_IRQ_Enable; +BYTE Map85_IRQ_Cnt; +BYTE Map85_IRQ_Latch; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 85 */ +/*-------------------------------------------------------------------*/ +void Map85_Init() +{ + /* Initialize Mapper */ + MapperInit = Map85_Init; + + /* Write to Mapper */ + MapperWrite = Map85_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map85_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set PPU Banks */ + PPUBANK[ 0 ] = Map85_VROMPAGE( 0 ); + PPUBANK[ 1 ] = Map85_VROMPAGE( 0 ); + PPUBANK[ 2 ] = Map85_VROMPAGE( 0 ); + PPUBANK[ 3 ] = Map85_VROMPAGE( 0 ); + PPUBANK[ 4 ] = Map85_VROMPAGE( 0 ); + PPUBANK[ 5 ] = Map85_VROMPAGE( 0 ); + PPUBANK[ 6 ] = Map85_VROMPAGE( 0 ); + PPUBANK[ 7 ] = Map85_VROMPAGE( 0 ); + InfoNES_SetupChr(); + + /* Initialize State Registers */ + Map85_Regs[ 0 ] = 0; + Map85_IRQ_Enable = 0; + Map85_IRQ_Cnt = 0; + Map85_IRQ_Latch = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 85 Write Function */ +/*-------------------------------------------------------------------*/ +void Map85_Write( WORD wAddr, BYTE byData ) +{ + switch( wAddr & 0xf030 ) + { + case 0x8000: + byData %= ( NesHeader.byRomSize << 1 ); + ROMBANK0 = ROMPAGE( byData ); + break; + + case 0x8010: + byData %= ( NesHeader.byRomSize << 1 ); + ROMBANK1 = ROMPAGE( byData ); + break; + + case 0x9000: + byData %= ( NesHeader.byRomSize << 1 ); + ROMBANK2 = ROMPAGE( byData ); + break; + + case 0x9010: + case 0x9030: + /* Extra Sound */ + + case 0xa000: + PPUBANK[ 0 ] = Map85_VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0xa010: + PPUBANK[ 1 ] = Map85_VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0xb000: + PPUBANK[ 2 ] = Map85_VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0xb010: + PPUBANK[ 3 ] = Map85_VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0xc000: + PPUBANK[ 4 ] = Map85_VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0xc010: + PPUBANK[ 5 ] = Map85_VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0xd000: + PPUBANK[ 6 ] = Map85_VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0xd010: + PPUBANK[ 7 ] = Map85_VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + /* Name Table Mirroring */ + case 0xe000: + switch ( byData & 0x03 ) + { + case 0x00: + InfoNES_Mirroring( 1 ); + break; + case 0x01: + InfoNES_Mirroring( 0 ); + break; + case 0x02: + InfoNES_Mirroring( 3 ); + break; + case 0x03: + InfoNES_Mirroring( 2 ); + break; + } + break; + + case 0xe010: + Map85_IRQ_Latch = 0xff - byData; + break; + + case 0xf000: + Map85_Regs[ 0 ] = byData & 0x01; + Map85_IRQ_Enable = ( byData & 0x02 ) >> 1; + Map85_IRQ_Cnt = Map85_IRQ_Latch; + break; + + case 0xf010: + Map85_IRQ_Enable = Map85_Regs[ 0 ]; + Map85_IRQ_Cnt = Map85_IRQ_Latch; + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 85 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map85_HSync() +{ + if ( Map85_IRQ_Enable ) + { + if ( Map85_IRQ_Cnt == 0 ) + { + IRQ_REQ; + Map85_IRQ_Enable = 0; + } else { + Map85_IRQ_Cnt--; + } + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_086.c b/apps/plugins/infones/mapper/InfoNES_Mapper_086.c new file mode 100644 index 0000000..57bb996 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_086.c @@ -0,0 +1,95 @@ +/*===================================================================*/ +/* */ +/* Mapper 86 (Jaleco) */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 86 */ +/*-------------------------------------------------------------------*/ +void Map86_Init() +{ + /* Initialize Mapper */ + MapperInit = Map86_Init; + + /* Write to Mapper */ + MapperWrite = Map0_Write; + + /* Write to SRAM */ + MapperSram = Map86_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 86 Write to Sram Function */ +/*-------------------------------------------------------------------*/ +void Map86_Sram( WORD wAddr, BYTE byData ) +{ + BYTE byChrBank; + BYTE byPrgBank; + + switch ( wAddr ) + { + case 0x6000: + byChrBank = byData & 0x03 | ( byData & 0x40 ) >> 4; + byPrgBank = ( byData & 0x30 ) >> 4; + + byPrgBank = ( byPrgBank << 2 ) % ( NesHeader.byRomSize << 1 ); + byChrBank = ( byChrBank << 3 ) % ( NesHeader.byVRomSize << 3 ); + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( byPrgBank + 0 ); + ROMBANK1 = ROMPAGE( byPrgBank + 1 ); + ROMBANK2 = ROMPAGE( byPrgBank + 2 ); + ROMBANK3 = ROMPAGE( byPrgBank + 3 ); + + /* Set PPU Banks */ + PPUBANK[ 0 ] = VROMPAGE( byChrBank + 0 ); + PPUBANK[ 1 ] = VROMPAGE( byChrBank + 1 ); + PPUBANK[ 2 ] = VROMPAGE( byChrBank + 2 ); + PPUBANK[ 3 ] = VROMPAGE( byChrBank + 3 ); + PPUBANK[ 4 ] = VROMPAGE( byChrBank + 4 ); + PPUBANK[ 5 ] = VROMPAGE( byChrBank + 5 ); + PPUBANK[ 6 ] = VROMPAGE( byChrBank + 6 ); + PPUBANK[ 7 ] = VROMPAGE( byChrBank + 7 ); + InfoNES_SetupChr(); + break; + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_087.c b/apps/plugins/infones/mapper/InfoNES_Mapper_087.c new file mode 100644 index 0000000..5e9e048 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_087.c @@ -0,0 +1,85 @@ +/*===================================================================*/ +/* */ +/* Mapper 87 (74161/32) */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 87 */ +/*-------------------------------------------------------------------*/ +void Map87_Init() +{ + /* Initialize Mapper */ + MapperInit = Map87_Init; + + /* Write to Mapper */ + MapperWrite = Map0_Write; + + /* Write to SRAM */ + MapperSram = Map87_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 87 Write to SRAM Function */ +/*-------------------------------------------------------------------*/ +void Map87_Sram( WORD wAddr, BYTE byData ) +{ + BYTE byChrBank; + + switch ( wAddr ) + { + case 0x6000: + byChrBank = ( byData & 0x02 ) >> 1; + byChrBank <<= 3; + byChrBank %= ( NesHeader.byVRomSize << 3 ); + + PPUBANK[ 0 ] = VROMPAGE( byChrBank + 0 ); + PPUBANK[ 1 ] = VROMPAGE( byChrBank + 1 ); + PPUBANK[ 2 ] = VROMPAGE( byChrBank + 2 ); + PPUBANK[ 3 ] = VROMPAGE( byChrBank + 3 ); + PPUBANK[ 4 ] = VROMPAGE( byChrBank + 4 ); + PPUBANK[ 5 ] = VROMPAGE( byChrBank + 5 ); + PPUBANK[ 6 ] = VROMPAGE( byChrBank + 6 ); + PPUBANK[ 7 ] = VROMPAGE( byChrBank + 7 ); + InfoNES_SetupChr(); + break; + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_088.c b/apps/plugins/infones/mapper/InfoNES_Mapper_088.c new file mode 100644 index 0000000..b34fa7d --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_088.c @@ -0,0 +1,127 @@ +/*===================================================================*/ +/* */ +/* Mapper 88 (Namco 118) */ +/* */ +/*===================================================================*/ + +BYTE Map88_Regs[ 1 ]; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 88 */ +/*-------------------------------------------------------------------*/ +void Map88_Init() +{ + /* Initialize Mapper */ + MapperInit = Map88_Init; + + /* Write to Mapper */ + MapperWrite = Map88_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 88 Write Function */ +/*-------------------------------------------------------------------*/ +void Map88_Write( WORD wAddr, BYTE byData ) +{ + switch ( wAddr ) + { + case 0x8000: + Map88_Regs[ 0 ] = byData; + break; + + case 0x8001: + switch ( Map88_Regs[ 0 ] & 0x07 ) + { + case 0x00: + PPUBANK[ 0 ] = VROMPAGE( ( ( byData & 0xfe ) + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( ( ( byData & 0xfe ) + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0x01: + PPUBANK[ 2 ] = VROMPAGE( ( ( byData & 0xfe ) + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( ( ( byData & 0xfe ) + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0x02: + PPUBANK[ 4 ] = VROMPAGE( ( byData + 0x40 ) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0x03: + PPUBANK[ 5 ] = VROMPAGE( ( byData + 0x40 ) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0x04: + PPUBANK[ 6 ] = VROMPAGE( ( byData + 0x40 ) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0x05: + PPUBANK[ 7 ] = VROMPAGE( ( byData + 0x40 ) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0x06: + ROMBANK0 = ROMPAGE( byData % ( NesHeader.byRomSize << 1 ) ); + break; + + case 0x07: + ROMBANK1 = ROMPAGE( byData % ( NesHeader.byRomSize << 1 ) ); + break; + } + break; + + case 0xc000: + if ( byData ) + { + InfoNES_Mirroring( 2 ); + } else { + InfoNES_Mirroring( 3 ); + } + break; + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_089.c b/apps/plugins/infones/mapper/InfoNES_Mapper_089.c new file mode 100644 index 0000000..656160c --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_089.c @@ -0,0 +1,94 @@ +/*===================================================================*/ +/* */ +/* Mapper 89 (Sunsoft) */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 89 */ +/*-------------------------------------------------------------------*/ +void Map89_Init() +{ + /* Initialize Mapper */ + MapperInit = Map89_Init; + + /* Write to Mapper */ + MapperWrite = Map89_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 89 Write Function */ +/*-------------------------------------------------------------------*/ +void Map89_Write( WORD wAddr, BYTE byData ) +{ + if ( ( wAddr & 0xFF00 ) == 0xC000 ) + { + BYTE byPrgBank = (byData & 0x70) >> 4; + BYTE byChrBank = ((byData & 0x80) >> 4) | (byData & 0x07); + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( (byPrgBank*2+0) % (NesHeader.byRomSize << 1) ); + ROMBANK1 = ROMPAGE( (byPrgBank*2+1) % (NesHeader.byRomSize << 1) ); + + PPUBANK[ 0 ] = VROMPAGE( (byChrBank*8+0) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 1 ] = VROMPAGE( (byChrBank*8+1) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 2 ] = VROMPAGE( (byChrBank*8+2) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 3 ] = VROMPAGE( (byChrBank*8+3) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 4 ] = VROMPAGE( (byChrBank*8+4) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 5 ] = VROMPAGE( (byChrBank*8+5) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 6 ] = VROMPAGE( (byChrBank*8+6) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 7 ] = VROMPAGE( (byChrBank*8+7) % (NesHeader.byVRomSize << 3) ); + InfoNES_SetupChr(); + + if ( byData & 0x08 ) + { + InfoNES_Mirroring( 2 ); + } + else + { + InfoNES_Mirroring( 3 ); + } + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_090.c b/apps/plugins/infones/mapper/InfoNES_Mapper_090.c new file mode 100644 index 0000000..13835f5 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_090.c @@ -0,0 +1,414 @@ +/*===================================================================*/ +/* */ +/* Mapper 90 (PC-JY-??) */ +/* */ +/*===================================================================*/ + +BYTE Map90_Prg_Reg[ 4 ]; +BYTE Map90_Chr_Low_Reg[ 8 ]; +BYTE Map90_Chr_High_Reg[ 8 ]; +BYTE Map90_Nam_Low_Reg[ 4 ]; +BYTE Map90_Nam_High_Reg[ 4 ]; + +BYTE Map90_Prg_Bank_Size; +BYTE Map90_Prg_Bank_6000; +BYTE Map90_Prg_Bank_E000; +BYTE Map90_Chr_Bank_Size; +BYTE Map90_Mirror_Mode; +BYTE Map90_Mirror_Type; + +DWORD Map90_Value1; +DWORD Map90_Value2; + +BYTE Map90_IRQ_Enable; +BYTE Map90_IRQ_Cnt; +BYTE Map90_IRQ_Latch; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 90 */ +/*-------------------------------------------------------------------*/ +void Map90_Init() +{ + /* Initialize Mapper */ + MapperInit = Map90_Init; + + /* Write to Mapper */ + MapperWrite = Map90_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map90_Apu; + + /* Read from APU */ + MapperReadApu = Map90_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map90_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMLASTPAGE( 3 ); + ROMBANK1 = ROMLASTPAGE( 2 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Initialize IRQ Registers */ + Map90_IRQ_Cnt = 0; + Map90_IRQ_Latch = 0; + Map90_IRQ_Enable = 0; + + for ( BYTE byPage = 0; byPage < 4; byPage++ ) + { + Map90_Prg_Reg[ byPage ] = ( NesHeader.byRomSize << 1 ) - 4 + byPage; + Map90_Nam_Low_Reg[ byPage ] = 0; + Map90_Nam_High_Reg[ byPage ] = 0; + Map90_Chr_Low_Reg[ byPage ] = byPage; + Map90_Chr_High_Reg[ byPage ] = 0; + Map90_Chr_Low_Reg[ byPage + 4 ] = byPage + 4; + Map90_Chr_High_Reg[ byPage + 4 ] = 0; + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 90 Write to APU Function */ +/*-------------------------------------------------------------------*/ +void Map90_Apu( WORD wAddr, BYTE byData ) +{ + switch ( wAddr ) + { + case 0x5000: + Map90_Value1 = byData; + break; + + case 0x5001: + Map90_Value2 = byData; + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 90 Read from APU Function */ +/*-------------------------------------------------------------------*/ +BYTE Map90_ReadApu( WORD wAddr ) +{ + if ( wAddr == 0x5000 ) + { + return ( BYTE )( ( Map90_Value1 * Map90_Value2 ) & 0x00ff ); + } else { + return ( BYTE )( wAddr >> 8 ); + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 90 Write Function */ +/*-------------------------------------------------------------------*/ +void Map90_Write( WORD wAddr, BYTE byData ) +{ + switch ( wAddr ) + { + /* Set ROM Banks */ + case 0x8000: + case 0x8001: + case 0x8002: + case 0x8003: + Map90_Prg_Reg[ wAddr & 0x03 ] = byData; + Map90_Sync_Prg_Banks(); + break; + + case 0x9000: + case 0x9001: + case 0x9002: + case 0x9003: + case 0x9004: + case 0x9005: + case 0x9006: + case 0x9007: + Map90_Chr_Low_Reg[ wAddr & 0x07 ] = byData; + Map90_Sync_Chr_Banks(); + break; + + case 0xa000: + case 0xa001: + case 0xa002: + case 0xa003: + case 0xa004: + case 0xa005: + case 0xa006: + case 0xa007: + Map90_Chr_High_Reg[ wAddr & 0x07 ] = byData; + Map90_Sync_Chr_Banks(); + break; + + case 0xb000: + case 0xb001: + case 0xb002: + case 0xb003: + Map90_Nam_Low_Reg[ wAddr & 0x03 ] = byData; + Map90_Sync_Mirror(); + break; + + case 0xb004: + case 0xb005: + case 0xb006: + case 0xb007: + Map90_Nam_High_Reg[ wAddr & 0x03 ] = byData; + Map90_Sync_Mirror(); + break; + + case 0xc002: + Map90_IRQ_Enable = 0; + break; + + case 0xc003: + case 0xc004: + if ( Map90_IRQ_Enable == 0 ) + { + Map90_IRQ_Enable = 1; + Map90_IRQ_Cnt = Map90_IRQ_Latch; + } + break; + + case 0xc005: + Map90_IRQ_Cnt = byData; + Map90_IRQ_Latch = byData; + break; + + case 0xd000: + Map90_Prg_Bank_6000 = byData & 0x80; + Map90_Prg_Bank_E000 = byData & 0x04; + Map90_Prg_Bank_Size = byData & 0x03; + Map90_Chr_Bank_Size = ( byData & 0x18 ) >> 3; + Map90_Mirror_Mode = byData & 0x20; + + Map90_Sync_Prg_Banks(); + Map90_Sync_Chr_Banks(); + Map90_Sync_Mirror(); + break; + + case 0xd001: + Map90_Mirror_Type = byData & 0x03; + Map90_Sync_Mirror(); + break; + + case 0xd003: + /* Bank Page*/ + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 90 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map90_HSync() +{ +/* + * Callback at HSync + * + */ + if ( /* 0 <= PPU_Scanline && */ PPU_Scanline <= 239 ) + { + if ( PPU_R1 & R1_SHOW_SCR || PPU_R1 & R1_SHOW_SP ) + { + if ( Map90_IRQ_Cnt == 0 ) + { + if ( Map90_IRQ_Enable ) + { + IRQ_REQ; + } + Map90_IRQ_Latch = 0; + Map90_IRQ_Enable = 0; + } else { + Map90_IRQ_Cnt--; + } + } + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 90 Sync Mirror Function */ +/*-------------------------------------------------------------------*/ +void Map90_Sync_Mirror( void ) +{ + BYTE byPage; + DWORD dwNamBank[ 4 ]; + + for ( byPage = 0; byPage < 4; byPage++ ) + { + dwNamBank[ byPage ] = + ( (DWORD)Map90_Nam_High_Reg[ byPage ] << 8 ) | (DWORD)Map90_Nam_Low_Reg[ byPage ]; + } + + if ( Map90_Mirror_Mode ) + { + for ( byPage = 0; byPage < 4; byPage++ ) + { + if ( !Map90_Nam_High_Reg[ byPage ] && ( Map90_Nam_Low_Reg[ byPage ] == byPage ) ) + { + Map90_Mirror_Mode = 0; + } + } + + if ( Map90_Mirror_Mode ) + { + PPUBANK[ NAME_TABLE0 ] = VROMPAGE( dwNamBank[ 0 ] % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ NAME_TABLE1 ] = VROMPAGE( dwNamBank[ 1 ] % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ NAME_TABLE2 ] = VROMPAGE( dwNamBank[ 2 ] % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ NAME_TABLE3 ] = VROMPAGE( dwNamBank[ 3 ] % ( NesHeader.byVRomSize << 3 ) ); + } + } else { + switch ( Map90_Mirror_Type ) + { + case 0x00: + InfoNES_Mirroring( 1 ); + break; + + case 0x01: + InfoNES_Mirroring( 0 ); + break; + + default: + InfoNES_Mirroring( 3 ); + break; + } + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 90 Sync Char Banks Function */ +/*-------------------------------------------------------------------*/ +void Map90_Sync_Chr_Banks( void ) +{ + BYTE byPage; + DWORD dwChrBank[ 8 ]; + + for ( byPage = 0; byPage < 8; byPage++ ) + { + dwChrBank[ byPage ] = + ( (DWORD)Map90_Chr_High_Reg[ byPage ] << 8 ) | (DWORD)Map90_Chr_Low_Reg[ byPage ]; + } + + switch ( Map90_Chr_Bank_Size ) + { + case 0: + PPUBANK[ 0 ] = VROMPAGE( ( ( dwChrBank[ 0 ] << 3 ) + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( ( ( dwChrBank[ 0 ] << 3 ) + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( ( ( dwChrBank[ 0 ] << 3 ) + 2 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( ( ( dwChrBank[ 0 ] << 3 ) + 3 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 4 ] = VROMPAGE( ( ( dwChrBank[ 0 ] << 3 ) + 4 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( ( ( dwChrBank[ 0 ] << 3 ) + 5 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE( ( ( dwChrBank[ 0 ] << 3 ) + 6 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( ( ( dwChrBank[ 0 ] << 3 ) + 7 ) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 1: + PPUBANK[ 0 ] = VROMPAGE( ( ( dwChrBank[ 0 ] << 2 ) + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( ( ( dwChrBank[ 0 ] << 2 ) + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( ( ( dwChrBank[ 0 ] << 2 ) + 2 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( ( ( dwChrBank[ 0 ] << 2 ) + 3 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 4 ] = VROMPAGE( ( ( dwChrBank[ 4 ] << 2 ) + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( ( ( dwChrBank[ 4 ] << 2 ) + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE( ( ( dwChrBank[ 4 ] << 2 ) + 2 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( ( ( dwChrBank[ 4 ] << 2 ) + 3 ) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 2: + PPUBANK[ 0 ] = VROMPAGE( ( ( dwChrBank[ 0 ] << 1 ) + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( ( ( dwChrBank[ 0 ] << 1 ) + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( ( ( dwChrBank[ 2 ] << 1 ) + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( ( ( dwChrBank[ 2 ] << 1 ) + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 4 ] = VROMPAGE( ( ( dwChrBank[ 4 ] << 1 ) + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( ( ( dwChrBank[ 4 ] << 1 ) + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE( ( ( dwChrBank[ 6 ] << 1 ) + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( ( ( dwChrBank[ 6 ] << 1 ) + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + default: + PPUBANK[ 0 ] = VROMPAGE( dwChrBank[ 0 ] % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( dwChrBank[ 1 ] % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( dwChrBank[ 2 ] % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( dwChrBank[ 3 ] % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 4 ] = VROMPAGE( dwChrBank[ 4 ] % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( dwChrBank[ 5 ] % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE( dwChrBank[ 6 ] % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( dwChrBank[ 7 ] % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 90 Sync Program Banks Function */ +/*-------------------------------------------------------------------*/ +void Map90_Sync_Prg_Banks( void ) +{ + switch ( Map90_Prg_Bank_Size ) + { + case 0: + ROMBANK0 = ROMLASTPAGE( 3 ); + ROMBANK1 = ROMLASTPAGE( 2 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + break; + + case 1: + ROMBANK0 = ROMPAGE( ( ( Map90_Prg_Reg[ 1 ] << 1 ) + 0 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE( ( ( Map90_Prg_Reg[ 1 ] << 1 ) + 1 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + break; + + case 2: + if ( Map90_Prg_Bank_E000 ) + { + ROMBANK0 = ROMPAGE( Map90_Prg_Reg[ 0 ] % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE( Map90_Prg_Reg[ 1 ] % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMPAGE( Map90_Prg_Reg[ 2 ] % ( NesHeader.byRomSize << 1 ) ); + ROMBANK3 = ROMPAGE( Map90_Prg_Reg[ 3 ] % ( NesHeader.byRomSize << 1 ) ); + } else { + if ( Map90_Prg_Bank_6000 ) + { + SRAMBANK = ROMPAGE( Map90_Prg_Reg[ 3 ] % ( NesHeader.byRomSize << 1 ) ); + } + ROMBANK0 = ROMPAGE( Map90_Prg_Reg[ 0 ] % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE( Map90_Prg_Reg[ 1 ] % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMPAGE( Map90_Prg_Reg[ 2 ] % ( NesHeader.byRomSize << 1 ) ); + ROMBANK3 = ROMLASTPAGE( 0 ); + } + break; + + default: + /* 8k in reverse mode? */ + ROMBANK0 = ROMPAGE( Map90_Prg_Reg[ 3 ] % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE( Map90_Prg_Reg[ 2 ] % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMPAGE( Map90_Prg_Reg[ 1 ] % ( NesHeader.byRomSize << 1 ) ); + ROMBANK3 = ROMPAGE( Map90_Prg_Reg[ 0 ] % ( NesHeader.byRomSize << 1 ) ); + break; + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_091.c b/apps/plugins/infones/mapper/InfoNES_Mapper_091.c new file mode 100644 index 0000000..7170815 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_091.c @@ -0,0 +1,104 @@ +/*===================================================================*/ +/* */ +/* Mapper 91 (Pirates) */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 91 */ +/*-------------------------------------------------------------------*/ +void Map91_Init() +{ + /* Initialize Mapper */ + MapperInit = Map91_Init; + + /* Write to Mapper */ + MapperWrite = Map0_Write; + + /* Write to SRAM */ + MapperSram = Map91_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMLASTPAGE( 1 ); + ROMBANK1 = ROMLASTPAGE( 0 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set Name Table Mirroring */ + InfoNES_Mirroring( 1 ); + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 91 Write to Sram Function */ +/*-------------------------------------------------------------------*/ +void Map91_Sram( WORD wAddr, BYTE byData ) +{ + switch( wAddr & 0xF00F) + { + /* Set PPU Banks */ + case 0x6000: + PPUBANK[ 0 ] = VROMPAGE( (byData*2+0) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( (byData*2+1) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0x6001: + PPUBANK[ 2 ] = VROMPAGE( (byData*2+0) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( (byData*2+1) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0x6002: + PPUBANK[ 4 ] = VROMPAGE( (byData*2+0) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( (byData*2+1) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0x6003: + PPUBANK[ 6 ] = VROMPAGE( (byData*2+0) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( (byData*2+1) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + /* Set CPU Banks */ + case 0x7000: + ROMBANK0 = ROMPAGE( byData % ( NesHeader.byRomSize << 1 ) ); + break; + + case 0x7001: + ROMBANK1 = ROMPAGE( byData % ( NesHeader.byRomSize << 1 ) ); + break; + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_092.c b/apps/plugins/infones/mapper/InfoNES_Mapper_092.c new file mode 100644 index 0000000..628134c --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_092.c @@ -0,0 +1,124 @@ +/*===================================================================*/ +/* */ +/* Mapper 92 (Jaleco Early Mapper #1) */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 92 */ +/*-------------------------------------------------------------------*/ +void Map92_Init() +{ + /* Initialize Mapper */ + MapperInit = Map92_Init; + + /* Write to Mapper */ + MapperWrite = Map92_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 92 Write Function */ +/*-------------------------------------------------------------------*/ +void Map92_Write( WORD wAddr, BYTE byData ) +{ + BYTE byRomBank; + BYTE byChrBank; + + byData = (BYTE)wAddr & 0xff; + byRomBank = ( byData & 0x0f ) << 1; + byChrBank = byData & 0x0f; + + if ( wAddr >= 0x9000 ) + { + switch ( byData & 0xf0 ) + { + /* Set ROM Banks */ + case 0xd0: + byRomBank %= ( NesHeader.byRomSize << 1 ); + ROMBANK2 = ROMPAGE( byRomBank ); + ROMBANK3 = ROMPAGE( byRomBank + 1 ); + break; + + /* Set PPU Banks */ + case 0xe0: + byChrBank <<= 3; + byChrBank %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 0 ] = VROMPAGE( byChrBank ); + PPUBANK[ 1 ] = VROMPAGE( byChrBank + 1 ); + PPUBANK[ 2 ] = VROMPAGE( byChrBank + 2 ); + PPUBANK[ 3 ] = VROMPAGE( byChrBank + 3 ); + PPUBANK[ 4 ] = VROMPAGE( byChrBank + 4 ); + PPUBANK[ 5 ] = VROMPAGE( byChrBank + 5 ); + PPUBANK[ 6 ] = VROMPAGE( byChrBank + 6 ); + PPUBANK[ 7 ] = VROMPAGE( byChrBank + 7 ); + InfoNES_SetupChr(); + break; + } + } else { + switch ( byData & 0xf0 ) + { + /* Set ROM Banks */ + case 0xb0: + byRomBank %= ( NesHeader.byRomSize << 1 ); + ROMBANK2 = ROMPAGE( byRomBank ); + ROMBANK3 = ROMPAGE( byRomBank + 1 ); + break; + + /* Set PPU Banks */ + case 0x70: + byChrBank <<= 3; + byChrBank %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 0 ] = VROMPAGE( byChrBank ); + PPUBANK[ 1 ] = VROMPAGE( byChrBank + 1 ); + PPUBANK[ 2 ] = VROMPAGE( byChrBank + 2 ); + PPUBANK[ 3 ] = VROMPAGE( byChrBank + 3 ); + PPUBANK[ 4 ] = VROMPAGE( byChrBank + 4 ); + PPUBANK[ 5 ] = VROMPAGE( byChrBank + 5 ); + PPUBANK[ 6 ] = VROMPAGE( byChrBank + 6 ); + PPUBANK[ 7 ] = VROMPAGE( byChrBank + 7 ); + InfoNES_SetupChr(); + break; + } + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_093.c b/apps/plugins/infones/mapper/InfoNES_Mapper_093.c new file mode 100644 index 0000000..f4e2a1f --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_093.c @@ -0,0 +1,74 @@ +/*===================================================================*/ +/* */ +/* Mapper 93 (74161/32) */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 93 */ +/*-------------------------------------------------------------------*/ +void Map93_Init() +{ + /* Initialize Mapper */ + MapperInit = Map93_Init; + + /* Write to Mapper */ + MapperWrite = Map0_Write; + + /* Write to SRAM */ + MapperSram = Map93_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 93 Write to Sram Function */ +/*-------------------------------------------------------------------*/ +void Map93_Sram( WORD wAddr, BYTE byData ) +{ + /* Set ROM Banks */ + if ( wAddr == 0x6000 ) + { + byData <<= 1; + byData %= ( NesHeader.byRomSize << 1 ); + + ROMBANK0 = ROMPAGE( byData ); + ROMBANK1 = ROMPAGE( byData + 1 ); + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_094.c b/apps/plugins/infones/mapper/InfoNES_Mapper_094.c new file mode 100644 index 0000000..0a0681b --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_094.c @@ -0,0 +1,68 @@ +/*===================================================================*/ +/* */ +/* Mapper 94 (74161/32 Capcom) */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 94 */ +/*-------------------------------------------------------------------*/ +void Map94_Init() +{ + /* Initialize Mapper */ + MapperInit = Map94_Init; + + /* Write to Mapper */ + MapperWrite = Map94_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 94 Write Function */ +/*-------------------------------------------------------------------*/ +void Map94_Write( WORD wAddr, BYTE byData ) +{ + switch ( wAddr & 0xfff0 ) + { + /* Set ROM Banks */ + case 0xff00: + byData = ( byData & 0x1c ) >> 2; + byData <<= 1; + byData %= ( NesHeader.byRomSize << 1 ); + ROMBANK0 = ROMPAGE( byData ); + ROMBANK1 = ROMPAGE( byData + 1 ); + break; + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_095.c b/apps/plugins/infones/mapper/InfoNES_Mapper_095.c new file mode 100644 index 0000000..96ce755 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_095.c @@ -0,0 +1,223 @@ +/*===================================================================*/ +/* */ +/* Mapper 95 (Namco 1??) */ +/* */ +/*===================================================================*/ + +BYTE Map95_Regs[ 1 ]; +DWORD Map95_Prg0, Map95_Prg1; +DWORD Map95_Chr01, Map95_Chr23; +DWORD Map95_Chr4, Map95_Chr5, Map95_Chr6, Map95_Chr7; + +#define Map95_Chr_Swap() ( Map95_Regs[ 0 ] & 0x80 ) +#define Map95_Prg_Swap() ( Map95_Regs[ 0 ] & 0x40 ) + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 95 */ +/*-------------------------------------------------------------------*/ +void Map95_Init() +{ + /* Initialize Mapper */ + MapperInit = Map95_Init; + + /* Write to Mapper */ + MapperWrite = Map95_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Initialize State Registers */ + Map95_Regs[ 0 ] = 0; + + /* Set ROM Banks */ + Map95_Prg0 = 0; + Map95_Prg1 = 1; + Map95_Set_CPU_Banks(); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + Map95_Chr01 = 0; + Map95_Chr23 = 2; + Map95_Chr4 = 4; + Map95_Chr5 = 5; + Map95_Chr6 = 6; + Map95_Chr7 = 7; + Map95_Set_PPU_Banks(); + } else { + Map95_Chr01 = Map95_Chr23 = 0; + Map95_Chr4 = Map95_Chr5 = Map95_Chr6 = Map95_Chr7 = 0; + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 95 Write Function */ +/*-------------------------------------------------------------------*/ +void Map95_Write( WORD wAddr, BYTE byData ) +{ + DWORD dwBankNum; + + switch ( wAddr & 0xe001 ) + { + case 0x8000: + Map95_Regs[ 0 ] = byData; + Map95_Set_PPU_Banks(); + Map95_Set_CPU_Banks(); + break; + + case 0x8001: + if ( Map95_Regs[ 0 ] <= 0x05 ) + { + if ( byData & 0x20 ) + { + InfoNES_Mirroring( 2 ); + } else { + InfoNES_Mirroring( 3 ); + } + byData &= 0x1f; + } + + dwBankNum = byData; + + switch ( Map95_Regs[ 0 ] & 0x07 ) + { + /* Set PPU Banks */ + case 0x00: + if ( NesHeader.byVRomSize > 0 ) + { + dwBankNum &= 0xfe; + Map95_Chr01 = dwBankNum; + Map95_Set_PPU_Banks(); + } + break; + + case 0x01: + if ( NesHeader.byVRomSize > 0 ) + { + dwBankNum &= 0xfe; + Map95_Chr23 = dwBankNum; + Map95_Set_PPU_Banks(); + } + break; + + case 0x02: + if ( NesHeader.byVRomSize > 0 ) + { + Map95_Chr4 = dwBankNum; + Map95_Set_PPU_Banks(); + } + break; + + case 0x03: + if ( NesHeader.byVRomSize > 0 ) + { + Map95_Chr5 = dwBankNum; + Map95_Set_PPU_Banks(); + } + break; + + case 0x04: + if ( NesHeader.byVRomSize > 0 ) + { + Map95_Chr6 = dwBankNum; + Map95_Set_PPU_Banks(); + } + break; + + case 0x05: + if ( NesHeader.byVRomSize > 0 ) + { + Map95_Chr7 = dwBankNum; + Map95_Set_PPU_Banks(); + } + break; + + /* Set ROM Banks */ + case 0x06: + Map95_Prg0 = dwBankNum; + Map95_Set_CPU_Banks(); + break; + + case 0x07: + Map95_Prg1 = dwBankNum; + Map95_Set_CPU_Banks(); + break; + } + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 95 Set CPU Banks Function */ +/*-------------------------------------------------------------------*/ +void Map95_Set_CPU_Banks() +{ + if ( Map95_Prg_Swap() ) + { + ROMBANK0 = ROMLASTPAGE( 1 ); + ROMBANK1 = ROMPAGE( Map95_Prg1 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMPAGE( Map95_Prg0 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK3 = ROMLASTPAGE( 0 ); + } else { + ROMBANK0 = ROMPAGE( Map95_Prg0 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE( Map95_Prg1 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 95 Set PPU Banks Function */ +/*-------------------------------------------------------------------*/ +void Map95_Set_PPU_Banks() +{ + if ( NesHeader.byVRomSize > 0 ) + { + if ( Map95_Chr_Swap() ) + { + PPUBANK[ 0 ] = VROMPAGE( Map95_Chr4 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( Map95_Chr5 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( Map95_Chr6 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( Map95_Chr7 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 4 ] = VROMPAGE( ( Map95_Chr01 + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( ( Map95_Chr01 + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE( ( Map95_Chr23 + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( ( Map95_Chr23 + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + } else { + PPUBANK[ 0 ] = VROMPAGE( ( Map95_Chr01 + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( ( Map95_Chr01 + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( ( Map95_Chr23 + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( ( Map95_Chr23 + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 4 ] = VROMPAGE( Map95_Chr4 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( Map95_Chr5 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE( Map95_Chr6 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( Map95_Chr7 % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + } + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_096.c b/apps/plugins/infones/mapper/InfoNES_Mapper_096.c new file mode 100644 index 0000000..88cce77 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_096.c @@ -0,0 +1,101 @@ +/*===================================================================*/ +/* */ +/* Mapper 96 : Bandai 74161 */ +/* */ +/*===================================================================*/ + +BYTE Map96_Reg[2]; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 96 */ +/*-------------------------------------------------------------------*/ +void Map96_Init() +{ + /* Initialize Mapper */ + MapperInit = Map96_Init; + + /* Write to Mapper */ + MapperWrite = Map96_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map96_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set Registers */ + Map96_Reg[0] = Map96_Reg[1] = 0; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + + /* Set PPU Banks */ + Map96_Set_Banks(); + InfoNES_Mirroring( 3 ); + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 96 Write Function */ +/*-------------------------------------------------------------------*/ +void Map96_Write( WORD wAddr, BYTE byData ) +{ + ROMBANK0 = ROMPAGE((((byData & 0x03)<<2)+0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE((((byData & 0x03)<<2)+1) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE((((byData & 0x03)<<2)+2) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE((((byData & 0x03)<<2)+3) % (NesHeader.byRomSize<<1)); + + Map96_Reg[0] = (byData & 0x04) >> 2; + Map96_Set_Banks(); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 96 PPU Function */ +/*-------------------------------------------------------------------*/ +void Map96_PPU( WORD wAddr ) +{ + if( (wAddr & 0xF000) == 0x2000 ) { + Map96_Reg[1] = (wAddr>>8)&0x03; + Map96_Set_Banks(); + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 96 Set Banks Function */ +/*-------------------------------------------------------------------*/ +void Map96_Set_Banks() +{ + PPUBANK[ 0 ] = CRAMPAGE(((Map96_Reg[0]*4+Map96_Reg[1])<<2)+0); + PPUBANK[ 1 ] = CRAMPAGE(((Map96_Reg[0]*4+Map96_Reg[1])<<2)+1); + PPUBANK[ 2 ] = CRAMPAGE(((Map96_Reg[0]*4+Map96_Reg[1])<<2)+2); + PPUBANK[ 3 ] = CRAMPAGE(((Map96_Reg[0]*4+Map96_Reg[1])<<2)+3); + PPUBANK[ 4 ] = CRAMPAGE(((Map96_Reg[0]*4+0x03)<<2)+0); + PPUBANK[ 5 ] = CRAMPAGE(((Map96_Reg[0]*4+0x03)<<2)+1); + PPUBANK[ 6 ] = CRAMPAGE(((Map96_Reg[0]*4+0x03)<<2)+2); + PPUBANK[ 7 ] = CRAMPAGE(((Map96_Reg[0]*4+0x03)<<2)+3); + InfoNES_SetupChr(); +} + diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_097.c b/apps/plugins/infones/mapper/InfoNES_Mapper_097.c new file mode 100644 index 0000000..10623bd --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_097.c @@ -0,0 +1,83 @@ +/*===================================================================*/ +/* */ +/* Mapper 97 (74161/32 Irem) */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 97 */ +/*-------------------------------------------------------------------*/ +void Map97_Init() +{ + /* Initialize Mapper */ + MapperInit = Map97_Init; + + /* Write to Mapper */ + MapperWrite = Map97_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMLASTPAGE( 1 ); + ROMBANK1 = ROMLASTPAGE( 0 ); + ROMBANK2 = ROMPAGE( 0 ); + ROMBANK3 = ROMPAGE( 1 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 97 Write Function */ +/*-------------------------------------------------------------------*/ +void Map97_Write( WORD wAddr, BYTE byData ) +{ + /* Set ROM Banks */ + if ( wAddr < 0xc000 ) + { + BYTE byPrgBank = byData & 0x0f; + + byPrgBank <<= 1; + byPrgBank %= ( NesHeader.byRomSize << 1 ); + + ROMBANK2 = ROMPAGE( byPrgBank ); + ROMBANK3 = ROMPAGE( byPrgBank + 1 ); + + if ( ( byData & 0x80 ) == 0 ) + { + InfoNES_Mirroring( 0 ); + } else { + InfoNES_Mirroring( 1 ); + } + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_099.c b/apps/plugins/infones/mapper/InfoNES_Mapper_099.c new file mode 100644 index 0000000..ae594c8 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_099.c @@ -0,0 +1,122 @@ +/*===================================================================*/ +/* */ +/* Mapper 099 VS-Unisystem */ +/* */ +/*===================================================================*/ + +BYTE Map99_Coin; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 099 */ +/*-------------------------------------------------------------------*/ +void Map99_Init() +{ + /* Initialize Mapper */ + MapperInit = Map99_Init; + + /* Write to Mapper */ + MapperWrite = Map0_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map99_Apu; + + /* Read from APU */ + MapperReadApu = Map99_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + if ( NesHeader.byRomSize > 1 ) + { + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + } + else if ( NesHeader.byRomSize > 0 ) + { + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 0 ); + ROMBANK3 = ROMPAGE( 1 ); + } else { + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 0 ); + ROMBANK2 = ROMPAGE( 0 ); + ROMBANK3 = ROMPAGE( 0 ); + } + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + Map99_Coin = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 99 Write to APU Function */ +/*-------------------------------------------------------------------*/ +void Map99_Apu( WORD wAddr, BYTE byData ) +{ + if( wAddr == 0x4016 ) { + if( byData & 0x04 ) { + PPUBANK[ 0 ] = VROMPAGE( 8 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( 9 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( 10 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( 11 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 4 ] = VROMPAGE( 12 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( 13 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE( 14 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( 15 % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + } else { + PPUBANK[ 0 ] = VROMPAGE( 0 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( 1 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( 2 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( 3 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 4 ] = VROMPAGE( 4 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( 5 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE( 6 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( 7 % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + } + } + + if( wAddr == 0x4020 ) { + Map99_Coin = byData; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 99 Read from APU Function */ +/*-------------------------------------------------------------------*/ +BYTE Map99_ReadApu( WORD wAddr ) +{ + if( wAddr == 0x4020 ) { + return Map99_Coin; + } + return ( wAddr >> 8 ); +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_100.c b/apps/plugins/infones/mapper/InfoNES_Mapper_100.c new file mode 100644 index 0000000..92dd188 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_100.c @@ -0,0 +1,291 @@ +/*===================================================================*/ +/* */ +/* Mapper 100 : Nestile MMC 3 */ +/* */ +/*===================================================================*/ + +BYTE Map100_Reg[8]; +BYTE Map100_Prg0, Map100_Prg1, Map100_Prg2, Map100_Prg3; +BYTE Map100_Chr0, Map100_Chr1, Map100_Chr2, Map100_Chr3; +BYTE Map100_Chr4, Map100_Chr5, Map100_Chr6, Map100_Chr7; + +BYTE Map100_IRQ_Enable; +BYTE Map100_IRQ_Cnt; +BYTE Map100_IRQ_Latch; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 100 */ +/*-------------------------------------------------------------------*/ +void Map100_Init() +{ + /* Initialize Mapper */ + MapperInit = Map100_Init; + + /* Write to Mapper */ + MapperWrite = Map100_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map100_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + Map100_Chr0 = 0; + Map100_Chr1 = 1; + Map100_Chr2 = 2; + Map100_Chr3 = 3; + Map100_Chr4 = 4; + Map100_Chr5 = 5; + Map100_Chr6 = 6; + Map100_Chr7 = 7; + Map100_Set_PPU_Banks(); + } else { + Map100_Chr0 = Map100_Chr2 = Map100_Chr4 = Map100_Chr5 = Map100_Chr6 = Map100_Chr7 = 0; + Map100_Chr1 = Map100_Chr3 = 1; + } + + /* Set IRQ Registers */ + Map100_IRQ_Enable = 0; + Map100_IRQ_Cnt = 0; + Map100_IRQ_Latch = 0; + for( int i = 0; i < 8; i++ ) { Map100_Reg[ i ] = 0x00; } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 100 Write Function */ +/*-------------------------------------------------------------------*/ +void Map100_Write( WORD wAddr, BYTE byData ) +{ + switch ( wAddr & 0xE001 ) + { + case 0x8000: + Map100_Reg[0] = byData; + break; + + case 0x8001: + Map100_Reg[1] = byData; + + switch ( Map100_Reg[0] & 0xC7 ) { + case 0x00: + if ( NesHeader.byVRomSize > 0 ) { + Map100_Chr0 = byData&0xFE; + Map100_Chr1 = Map100_Chr0+1; + Map100_Set_PPU_Banks(); + } + break; + + case 0x01: + if ( NesHeader.byVRomSize > 0 ) { + Map100_Chr2 = byData&0xFE; + Map100_Chr3 = Map100_Chr2+1; + Map100_Set_PPU_Banks(); + } + break; + + case 0x02: + if ( NesHeader.byVRomSize > 0 ) { + Map100_Chr4 = byData; + Map100_Set_PPU_Banks(); + } + break; + + case 0x03: + if ( NesHeader.byVRomSize > 0 ) { + Map100_Chr5 = byData; + Map100_Set_PPU_Banks(); + } + break; + + case 0x04: + if ( NesHeader.byVRomSize > 0 ) { + Map100_Chr6 = byData; + Map100_Set_PPU_Banks(); + } + break; + + case 0x05: + if ( NesHeader.byVRomSize > 0 ) { + Map100_Chr7 = byData; + Map100_Set_PPU_Banks(); + } + break; + + case 0x06: + Map100_Prg0 = byData; + Map100_Set_CPU_Banks(); + break; + + case 0x07: + Map100_Prg1 = byData; + Map100_Set_CPU_Banks(); + break; + + case 0x46: + Map100_Prg2 = byData; + Map100_Set_CPU_Banks(); + break; + + case 0x47: + Map100_Prg3 = byData; + Map100_Set_CPU_Banks(); + break; + + case 0x80: + if ( NesHeader.byVRomSize > 0 ) { + Map100_Chr4 = byData&0xFE; + Map100_Chr5 = Map100_Chr4+1; + Map100_Set_PPU_Banks(); + } + break; + + case 0x81: + if ( NesHeader.byVRomSize > 0 ) { + Map100_Chr6 = byData&0xFE; + Map100_Chr7 = Map100_Chr6+1; + Map100_Set_PPU_Banks(); + } + break; + + case 0x82: + if ( NesHeader.byVRomSize > 0 ) { + Map100_Chr0 = byData; + Map100_Set_PPU_Banks(); + } + break; + + case 0x83: + if ( NesHeader.byVRomSize > 0 ) { + Map100_Chr1 = byData; + Map100_Set_PPU_Banks(); + } + break; + + case 0x84: + if ( NesHeader.byVRomSize > 0 ) { + Map100_Chr2 = byData; + Map100_Set_PPU_Banks(); + } + break; + + case 0x85: + if( NesHeader.byVRomSize > 0 ) { + Map100_Chr3 = byData; + Map100_Set_PPU_Banks(); + } + break; + + } + break; + + case 0xA000: + Map100_Reg[2] = byData; + if ( !ROM_FourScr ) + { + if( byData & 0x01 ) InfoNES_Mirroring( 0 ); + else InfoNES_Mirroring( 1 ); + } + break; + + case 0xA001: + Map100_Reg[3] = byData; + break; + + case 0xC000: + Map100_Reg[4] = byData; + Map100_IRQ_Cnt = byData; + break; + + case 0xC001: + Map100_Reg[5] = byData; + Map100_IRQ_Latch = byData; + break; + + case 0xE000: + Map100_Reg[6] = byData; + Map100_IRQ_Enable = 0; + break; + + case 0xE001: + Map100_Reg[7] = byData; + Map100_IRQ_Enable = 0xFF; + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 100 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map100_HSync() +{ + if( ( /* PPU_Scanline >= 0 && */ PPU_Scanline <= 239) ) { + if ( PPU_R1 & R1_SHOW_SCR || PPU_R1 & R1_SHOW_SP ) { + if( Map100_IRQ_Enable ) { + if( !(Map100_IRQ_Cnt--) ) { + Map100_IRQ_Cnt = Map100_IRQ_Latch; + IRQ_REQ; + } + } + } + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 100 Set CPU Banks Function */ +/*-------------------------------------------------------------------*/ +void Map100_Set_CPU_Banks() +{ + ROMBANK0 = ROMPAGE( Map100_Prg0 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE( Map100_Prg1 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMPAGE( Map100_Prg2 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK3 = ROMPAGE( Map100_Prg3 % ( NesHeader.byRomSize << 1 ) ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 100 Set PPU Banks Function */ +/*-------------------------------------------------------------------*/ +void Map100_Set_PPU_Banks() +{ + if ( NesHeader.byVRomSize > 0 ) + { + PPUBANK[ 0 ] = VROMPAGE( Map100_Chr0 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( Map100_Chr1 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( Map100_Chr2 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( Map100_Chr3 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 4 ] = VROMPAGE( Map100_Chr4 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( Map100_Chr5 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE( Map100_Chr6 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( Map100_Chr7 % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + } +} + diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_101.c b/apps/plugins/infones/mapper/InfoNES_Mapper_101.c new file mode 100644 index 0000000..7d06244 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_101.c @@ -0,0 +1,79 @@ +/*===================================================================*/ +/* */ +/* Mapper 101 () */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 101 */ +/*-------------------------------------------------------------------*/ +void Map101_Init() +{ + /* Initialize Mapper */ + MapperInit = Map101_Init; + + /* Write to Mapper */ + MapperWrite = Map101_Write; + + /* Write to SRAM */ + MapperSram = Map101_Write; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 101 Write & Write to SRAM Function */ +/*-------------------------------------------------------------------*/ +void Map101_Write( WORD wAddr, BYTE byData ) +{ + byData &= 0x03; + byData <<= 3; + byData %= ( NesHeader.byVRomSize << 3 ); + + /* Set PPU Banks */ + PPUBANK[ 0 ] = VROMPAGE( byData ); + PPUBANK[ 1 ] = VROMPAGE( byData + 1 ); + PPUBANK[ 2 ] = VROMPAGE( byData + 2 ); + PPUBANK[ 3 ] = VROMPAGE( byData + 3 ); + PPUBANK[ 4 ] = VROMPAGE( byData + 4 ); + PPUBANK[ 5 ] = VROMPAGE( byData + 5 ); + PPUBANK[ 6 ] = VROMPAGE( byData + 6 ); + PPUBANK[ 7 ] = VROMPAGE( byData + 7 ); + InfoNES_SetupChr(); +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_105.c b/apps/plugins/infones/mapper/InfoNES_Mapper_105.c new file mode 100644 index 0000000..80e9f7a --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_105.c @@ -0,0 +1,167 @@ +/*===================================================================*/ +/* */ +/* Mapper 105 : Nintendo World Championship */ +/* */ +/*===================================================================*/ + +BYTE Map105_Init_State; +BYTE Map105_Write_Count; +BYTE Map105_Bits; +BYTE Map105_Reg[4]; + +BYTE Map105_IRQ_Enable; +int Map105_IRQ_Counter; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 105 */ +/*-------------------------------------------------------------------*/ +void Map105_Init() +{ + /* Initialize Mapper */ + MapperInit = Map105_Init; + + /* Write to Mapper */ + MapperWrite = Map105_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map105_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + + /* Set PPU Banks */ + Map105_Reg[0] = 0x0C; + Map105_Reg[1] = 0x00; + Map105_Reg[2] = 0x00; + Map105_Reg[3] = 0x10; + + Map105_Bits = 0; + Map105_Write_Count = 0; + + Map105_IRQ_Counter = 0; + Map105_IRQ_Enable = 0; + Map105_Init_State = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 105 Write Function */ +/*-------------------------------------------------------------------*/ +void Map105_Write( WORD wAddr, BYTE byData ) +{ + WORD reg_num = (wAddr & 0x7FFF) >> 13; + + if( byData & 0x80 ) { + Map105_Bits = Map105_Write_Count = 0; + if( reg_num == 0 ) { + Map105_Reg[reg_num] |= 0x0C; + } + } else { + Map105_Bits |= (byData & 1) << Map105_Write_Count++; + if( Map105_Write_Count == 5) { + Map105_Reg[reg_num] = Map105_Bits & 0x1F; + Map105_Bits = Map105_Write_Count = 0; + } + } + + if( Map105_Reg[0] & 0x02 ) { + if( Map105_Reg[0] & 0x01 ) { + InfoNES_Mirroring( 0 ); + } else { + InfoNES_Mirroring( 1 ); + } + } else { + if( Map105_Reg[0] & 0x01 ) { + InfoNES_Mirroring( 3 ); + } else { + InfoNES_Mirroring( 2 ); + } + } + + switch( Map105_Init_State ) { + case 0: + case 1: + Map105_Init_State++; + break; + + case 2: + if(Map105_Reg[1] & 0x08) { + if (Map105_Reg[0] & 0x08) { + if (Map105_Reg[0] & 0x04) { + ROMBANK0 = ROMPAGE( ((Map105_Reg[3] & 0x07) * 2 + 16) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE( ((Map105_Reg[3] & 0x07) * 2 + 17) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMPAGE( 30 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK3 = ROMPAGE( 31 % ( NesHeader.byRomSize << 1 ) ); + } else { + ROMBANK0 = ROMPAGE( 16 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE( 17 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMPAGE( ((Map105_Reg[3] & 0x07) * 2 + 16) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK3 = ROMPAGE( ((Map105_Reg[3] & 0x07) * 2 + 17) % ( NesHeader.byRomSize << 1 ) ); + } + } else { + ROMBANK0 = ROMPAGE( ((Map105_Reg[3] & 0x06) * 2 + 16) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE( ((Map105_Reg[3] & 0x06) * 2 + 17) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMPAGE( ((Map105_Reg[3] & 0x06) * 2 + 18) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK3 = ROMPAGE( ((Map105_Reg[3] & 0x06) * 2 + 19) % ( NesHeader.byRomSize << 1 ) ); + } + } else { + ROMBANK0 = ROMPAGE( ((Map105_Reg[1] & 0x06) * 2 + 0) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE( ((Map105_Reg[1] & 0x06) * 2 + 1) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMPAGE( ((Map105_Reg[1] & 0x06) * 2 + 2) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK3 = ROMPAGE( ((Map105_Reg[1] & 0x06) * 2 + 3) % ( NesHeader.byRomSize << 1 ) ); + } + + if( Map105_Reg[1] & 0x10 ) { + Map105_IRQ_Counter = 0; + Map105_IRQ_Enable = 0; + } else { + Map105_IRQ_Enable = 1; + } + break; + + default: + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 105 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map105_HSync() +{ + if( !PPU_Scanline ) { + if( Map105_IRQ_Enable ) { + Map105_IRQ_Counter += 29781; + } + if( ((Map105_IRQ_Counter | 0x21FFFFFF) & 0x3E000000) == 0x3E000000 ) { + IRQ_REQ; + } + } +} + diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_107.c b/apps/plugins/infones/mapper/InfoNES_Mapper_107.c new file mode 100644 index 0000000..ac174ff --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_107.c @@ -0,0 +1,82 @@ +/*===================================================================*/ +/* */ +/* Mapper 107 : Magic Dragon Mapper */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 107 */ +/*-------------------------------------------------------------------*/ +void Map107_Init() +{ + /* Initialize Mapper */ + MapperInit = Map107_Init; + + /* Write to Mapper */ + MapperWrite = Map107_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 107 Write Function */ +/*-------------------------------------------------------------------*/ +void Map107_Write( WORD wAddr, BYTE byData ) +{ + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( ( (((byData>>1)&0x03)<<2) + 0 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE( ( (((byData>>1)&0x03)<<2) + 1 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMPAGE( ( (((byData>>1)&0x03)<<2) + 2 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK3 = ROMPAGE( ( (((byData>>1)&0x03)<<2) + 3 ) % ( NesHeader.byRomSize << 1 ) ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) { + PPUBANK[ 0 ] = VROMPAGE( ( ((byData&0x07)<<3) + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( ( ((byData&0x07)<<3) + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( ( ((byData&0x07)<<3) + 2 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( ( ((byData&0x07)<<3) + 3 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 4 ] = VROMPAGE( ( ((byData&0x07)<<3) + 4 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( ( ((byData&0x07)<<3) + 5 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE( ( ((byData&0x07)<<3) + 6 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( ( ((byData&0x07)<<3) + 7 ) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_108.c b/apps/plugins/infones/mapper/InfoNES_Mapper_108.c new file mode 100644 index 0000000..1542494 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_108.c @@ -0,0 +1,59 @@ +/*===================================================================*/ +/* */ +/* Mapper 108 */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 108 */ +/*-------------------------------------------------------------------*/ +void Map108_Init() +{ + /* Initialize Mapper */ + MapperInit = Map108_Init; + + /* Write to Mapper */ + MapperWrite = Map108_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = ROMPAGE( 0 ); + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0xC % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE( 0xD % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMPAGE( 0xE % ( NesHeader.byRomSize << 1 ) ); + ROMBANK3 = ROMPAGE( 0xF % ( NesHeader.byRomSize << 1 ) ); + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 108 Write Function */ +/*-------------------------------------------------------------------*/ +void Map108_Write( WORD wAddr, BYTE byData ) +{ + /* Set SRAM Banks */ + SRAMBANK = ROMPAGE( byData % ( NesHeader.byRomSize << 1 ) ); +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_109.c b/apps/plugins/infones/mapper/InfoNES_Mapper_109.c new file mode 100644 index 0000000..2399367 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_109.c @@ -0,0 +1,134 @@ +/*===================================================================*/ +/* */ +/* Mapper 109 : SACHEN The Great Wall SA-019 */ +/* */ +/*===================================================================*/ + +BYTE Map109_Reg; +BYTE Map109_Chr0, Map109_Chr1, Map109_Chr2, Map109_Chr3; +BYTE Map109_Chrmode0, Map109_Chrmode1; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 109 */ +/*-------------------------------------------------------------------*/ +void Map109_Init() +{ + /* Initialize Mapper */ + MapperInit = Map109_Init; + + /* Write to Mapper */ + MapperWrite = Map0_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map109_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + + /* Initialize Registers */ + Map109_Reg = 0; + Map109_Chr0 = 0; + Map109_Chr1 = 0; + Map109_Chr2 = 0; + Map109_Chr3 = 0; + Map109_Chrmode0 = 0; + Map109_Chrmode1 = 0; + + /* Set PPU Banks */ + Map109_Set_PPU_Banks(); + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 109 Write to APU Function */ +/*-------------------------------------------------------------------*/ +void Map109_Apu( WORD wAddr, BYTE byData ) +{ + switch( wAddr ) { + case 0x4100: + Map109_Reg = byData; + break; + case 0x4101: + switch( Map109_Reg ) { + case 0: + Map109_Chr0 = byData; + Map109_Set_PPU_Banks(); + break; + case 1: + Map109_Chr1 = byData; + Map109_Set_PPU_Banks(); + break; + case 2: + Map109_Chr2 = byData; + Map109_Set_PPU_Banks(); + break; + case 3: + Map109_Chr3 = byData; + Map109_Set_PPU_Banks(); + break; + case 4: + Map109_Chrmode0 = byData & 0x01; + Map109_Set_PPU_Banks(); + break; + case 5: + ROMBANK0 = ROMPAGE( ( ( byData & 0x07 ) + 0 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE( ( ( byData & 0x07 ) + 1 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMPAGE( ( ( byData & 0x07 ) + 2 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK3 = ROMPAGE( ( ( byData & 0x07 ) + 3 ) % ( NesHeader.byRomSize << 1 ) ); + break; + case 6: + Map109_Chrmode1 = byData & 0x07; + Map109_Set_PPU_Banks(); + break; + case 7: + if( byData & 0x01 ) InfoNES_Mirroring( 0 ); + else InfoNES_Mirroring( 1 ); + break; + } + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 109 Set Bank PPU Function */ +/*-------------------------------------------------------------------*/ +void Map109_Set_PPU_Banks() +{ + if ( NesHeader.byVRomSize > 0 ) { + PPUBANK[ 0 ] = VROMPAGE((Map109_Chr0) % (NesHeader.byVRomSize<<3) ); + PPUBANK[ 1 ] = VROMPAGE((Map109_Chr1|((Map109_Chrmode1<<3)&0x8)) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 2 ] = VROMPAGE((Map109_Chr2|((Map109_Chrmode1<<2)&0x8)) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 3 ] = VROMPAGE((Map109_Chr3|((Map109_Chrmode1<<1)&0x8)|(Map109_Chrmode0*0x10)) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 4 ] = VROMPAGE((NesHeader.byVRomSize<<3)-4); + PPUBANK[ 5 ] = VROMPAGE((NesHeader.byVRomSize<<3)-3); + PPUBANK[ 6 ] = VROMPAGE((NesHeader.byVRomSize<<3)-2); + PPUBANK[ 7 ] = VROMPAGE((NesHeader.byVRomSize<<3)-1); + InfoNES_SetupChr(); + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_110.c b/apps/plugins/infones/mapper/InfoNES_Mapper_110.c new file mode 100644 index 0000000..161f5e1 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_110.c @@ -0,0 +1,142 @@ +/*===================================================================*/ +/* */ +/* Mapper 110 */ +/* */ +/*===================================================================*/ + +BYTE Map110_Reg0, Map110_Reg1; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 110 */ +/*-------------------------------------------------------------------*/ +void Map110_Init() +{ + /* Initialize Mapper */ + MapperInit = Map110_Init; + + /* Write to Mapper */ + MapperWrite = Map0_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map110_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Initialize Registers */ + Map110_Reg0 = 0; + Map110_Reg1 = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 110 Write to APU Function */ +/*-------------------------------------------------------------------*/ +void Map110_Apu( WORD wAddr, BYTE byData ) +{ + switch( wAddr ) { + case 0x4100: + Map110_Reg1 = byData & 0x07; + break; + case 0x4101: + switch( Map110_Reg1 ) { + case 5: + ROMBANK0 = ROMPAGE( ((byData << 2) + 0) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE( ((byData << 2) + 1) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMPAGE( ((byData << 2) + 2) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK3 = ROMPAGE( ((byData << 2) + 3) % ( NesHeader.byRomSize << 1 ) ); + break; + + case 0: + Map110_Reg0 = byData & 0x01; + PPUBANK[ 0 ] = VROMPAGE(((Map110_Reg0 << 3) + 0) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 1 ] = VROMPAGE(((Map110_Reg0 << 3) + 1) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 2 ] = VROMPAGE(((Map110_Reg0 << 3) + 2) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 3 ] = VROMPAGE(((Map110_Reg0 << 3) + 3) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 4 ] = VROMPAGE(((Map110_Reg0 << 3) + 4) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 5 ] = VROMPAGE(((Map110_Reg0 << 3) + 5) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 6 ] = VROMPAGE(((Map110_Reg0 << 3) + 6) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 7 ] = VROMPAGE(((Map110_Reg0 << 3) + 7) % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + break; + + case 2: + Map110_Reg0 = byData; + PPUBANK[ 0 ] = VROMPAGE(((Map110_Reg0 << 3) + 0) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 1 ] = VROMPAGE(((Map110_Reg0 << 3) + 1) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 2 ] = VROMPAGE(((Map110_Reg0 << 3) + 2) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 3 ] = VROMPAGE(((Map110_Reg0 << 3) + 3) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 4 ] = VROMPAGE(((Map110_Reg0 << 3) + 4) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 5 ] = VROMPAGE(((Map110_Reg0 << 3) + 5) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 6 ] = VROMPAGE(((Map110_Reg0 << 3) + 6) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 7 ] = VROMPAGE(((Map110_Reg0 << 3) + 7) % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + break; + + case 4: + Map110_Reg0 = Map110_Reg0 | (byData<<1); + PPUBANK[ 0 ] = VROMPAGE(((Map110_Reg0 << 3) + 0) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 1 ] = VROMPAGE(((Map110_Reg0 << 3) + 1) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 2 ] = VROMPAGE(((Map110_Reg0 << 3) + 2) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 3 ] = VROMPAGE(((Map110_Reg0 << 3) + 3) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 4 ] = VROMPAGE(((Map110_Reg0 << 3) + 4) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 5 ] = VROMPAGE(((Map110_Reg0 << 3) + 5) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 6 ] = VROMPAGE(((Map110_Reg0 << 3) + 6) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 7 ] = VROMPAGE(((Map110_Reg0 << 3) + 7) % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + break; + + case 6: + Map110_Reg0 = Map110_Reg0 | (byData<<2); + PPUBANK[ 0 ] = VROMPAGE(((Map110_Reg0 << 3) + 0) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 1 ] = VROMPAGE(((Map110_Reg0 << 3) + 1) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 2 ] = VROMPAGE(((Map110_Reg0 << 3) + 2) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 3 ] = VROMPAGE(((Map110_Reg0 << 3) + 3) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 4 ] = VROMPAGE(((Map110_Reg0 << 3) + 4) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 5 ] = VROMPAGE(((Map110_Reg0 << 3) + 5) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 6 ] = VROMPAGE(((Map110_Reg0 << 3) + 6) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 7 ] = VROMPAGE(((Map110_Reg0 << 3) + 7) % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + break; + + default: + break; + } + break; + default: + break; + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_112.c b/apps/plugins/infones/mapper/InfoNES_Mapper_112.c new file mode 100644 index 0000000..54c53cb --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_112.c @@ -0,0 +1,300 @@ +/*===================================================================*/ +/* */ +/* Mapper 112 (Pirates) */ +/* */ +/*===================================================================*/ + +BYTE Map112_Regs[8]; +DWORD Map112_Prg0,Map112_Prg1; +DWORD Map112_Chr01,Map112_Chr23,Map112_Chr4,Map112_Chr5,Map112_Chr6,Map112_Chr7; + +BYTE Map112_IRQ_Enable; /* IRQs enabled */ +BYTE Map112_IRQ_Cnt; /* IRQ scanline counter, decreasing */ +BYTE Map112_IRQ_Latch; /* IRQ scanline counter latch */ + +#define Map112_Chr_Swap() ( Map112_Regs[0] & 0x80 ) +#define Map112_Prg_Swap() ( Map112_Regs[0] & 0x40 ) + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 112 */ +/*-------------------------------------------------------------------*/ +void Map112_Init() +{ + /* Initialize Mapper */ + MapperInit = Map112_Init; + + /* Write to Mapper */ + MapperWrite = Map112_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map112_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* clear registers FIRST!!! */ + for(int i = 0; i < 8; i++) + { + Map112_Regs[i] = 0x00; + } + + /* set CPU bank pointers */ + Map112_Prg0 = 0; + Map112_Prg1 = 1; + Map112_Set_CPU_Banks(); + + /* set VROM banks */ + if ( NesHeader.byVRomSize > 0 ) + { + Map112_Chr01 = 0; + Map112_Chr23 = 2; + Map112_Chr4 = 4; + Map112_Chr5 = 5; + Map112_Chr6 = 6; + Map112_Chr7 = 7; + Map112_Set_PPU_Banks(); + } + else + { + Map112_Chr01 = Map112_Chr23 = Map112_Chr4 = Map112_Chr5 = Map112_Chr6 = Map112_Chr7 = 0; + } + + Map112_IRQ_Enable = 0; + Map112_IRQ_Cnt = 0; + Map112_IRQ_Latch = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 112 Write Function */ +/*-------------------------------------------------------------------*/ +void Map112_Write( WORD wAddr, BYTE byData ) +{ + DWORD dwBankNum; + + /* Set ROM Banks */ + switch( wAddr & 0xE001 ) + { + case 0x8000: + Map112_Regs[0] = byData; + Map112_Set_PPU_Banks(); + Map112_Set_CPU_Banks(); + break; + + case 0xA000: + Map112_Regs[1] = byData; + dwBankNum = Map112_Regs[1]; + switch ( Map112_Regs[0] & 0x07 ) + { + case 0x02: + if ( NesHeader.byVRomSize > 0 ) + { + dwBankNum &= 0xfe; + Map112_Chr01 = dwBankNum; + Map112_Set_PPU_Banks(); + } + break; + + case 0x03: + if ( NesHeader.byVRomSize > 0 ) + { + dwBankNum &= 0xfe; + Map112_Chr23 = dwBankNum; + Map112_Set_PPU_Banks(); + } + break; + + case 0x04: + if ( NesHeader.byVRomSize > 0 ) + { + Map112_Chr4 = dwBankNum; + Map112_Set_PPU_Banks(); + } + break; + + case 0x05: + if ( NesHeader.byVRomSize > 0 ) + { + Map112_Chr5 = dwBankNum; + Map112_Set_PPU_Banks(); + } + break; + + case 0x06: + if ( NesHeader.byVRomSize > 0 ) + { + Map112_Chr6 = dwBankNum; + Map112_Set_PPU_Banks(); + } + break; + + case 0x07: + if ( NesHeader.byVRomSize > 0 ) + { + Map112_Chr7 = dwBankNum; + Map112_Set_PPU_Banks(); + } + break; + + case 0x00: + Map112_Prg0 = dwBankNum; + Map112_Set_CPU_Banks(); + break; + + case 0x01: + Map112_Prg1 = dwBankNum; + Map112_Set_CPU_Banks(); + break; + } + break; + + case 0x8001: + Map112_Regs[2] = byData; + if ( !ROM_FourScr ) + { + if ( byData & 0x01 ) + { + InfoNES_Mirroring( 1 ); /* Vertical */ + } + else + { + InfoNES_Mirroring( 0 ); /* Horizontal */ + } + } + break; + + case 0xA001: + Map112_Regs[3] = byData; + break; + + case 0xC000: + Map112_Regs[4] = byData; + Map112_IRQ_Cnt = Map112_Regs[4]; + break; + + case 0xC001: + Map112_Regs[5] = byData; + Map112_IRQ_Latch = Map112_Regs[5]; + break; + + case 0xE000: + Map112_Regs[6] = byData; + Map112_IRQ_Enable = 0; + + if ( byData ) + { + InfoNES_Mirroring( 0 ); /* Horizontal */ + } + else + { + InfoNES_Mirroring( 1 ); /* Vertical */ + } + break; + + case 0xE001: + Map112_Regs[7] = byData; + Map112_IRQ_Enable = 1; + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 112 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map112_HSync() +{ +/* + * Callback at HSync + * + */ + if ( Map112_IRQ_Enable ) + { + if ( /* 0 <= PPU_Scanline && */ PPU_Scanline <= 239 ) + { + if ( PPU_R1 & R1_SHOW_SCR || PPU_R1 & R1_SHOW_SP ) + { + if ( !( Map112_IRQ_Cnt-- ) ) + { + Map112_IRQ_Cnt = Map112_IRQ_Latch; + IRQ_REQ; + } + } + } + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 112 Set CPU Banks Function */ +/*-------------------------------------------------------------------*/ +void Map112_Set_CPU_Banks() +{ + /* Set ROM Banks */ + if ( Map112_Prg_Swap() ) + { + ROMBANK0 = ROMLASTPAGE( 1 ); + ROMBANK1 = ROMPAGE( Map112_Prg1 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMPAGE( Map112_Prg0 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK3 = ROMLASTPAGE( 0 ); + } + else + { + ROMBANK0 = ROMPAGE( Map112_Prg0 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE( Map112_Prg1 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 112 Set PPU Banks Function */ +/*-------------------------------------------------------------------*/ +void Map112_Set_PPU_Banks() +{ + if ( NesHeader.byVRomSize > 0 ) + { + if ( Map112_Chr_Swap() ) + { + PPUBANK[ 0 ] = VROMPAGE( Map112_Chr4 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( Map112_Chr5 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( Map112_Chr6 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( Map112_Chr7 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 4 ] = VROMPAGE( ( Map112_Chr01 + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( ( Map112_Chr01 + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE( ( Map112_Chr23 + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( ( Map112_Chr23 + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + } + else + { + PPUBANK[ 0 ] = VROMPAGE( ( Map112_Chr01 + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( ( Map112_Chr01 + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( ( Map112_Chr23 + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( ( Map112_Chr23 + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 4 ] = VROMPAGE( Map112_Chr4 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( Map112_Chr5 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE( Map112_Chr6 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( Map112_Chr7 % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + } + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_113.c b/apps/plugins/infones/mapper/InfoNES_Mapper_113.c new file mode 100644 index 0000000..2cb3176 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_113.c @@ -0,0 +1,150 @@ +/*===================================================================*/ +/* */ +/* Mapper 113 (PC-Sachen/Hacker) */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 113 */ +/*-------------------------------------------------------------------*/ +void Map113_Init() +{ + /* Initialize Mapper */ + MapperInit = Map113_Init; + + /* Write to Mapper */ + MapperWrite = Map113_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map113_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 113 Write to Apu Function */ +/*-------------------------------------------------------------------*/ +void Map113_Apu( WORD wAddr, BYTE byData ) +{ + BYTE byPrgBank, byChrBank; + + switch ( wAddr ) + { + case 0x4100: + case 0x4111: + case 0x4120: + case 0x4900: + byPrgBank = byData >> 3; + + if ( ( NesHeader.byRomSize << 1 ) <= 8 && ( NesHeader.byVRomSize << 3 ) == 128 ) + { + byChrBank = ( ( byData >> 3 ) & 0x08 ) + ( byData & 0x07 ); + } else { + byChrBank = byData & 0x07; + } + + /* Set ROM Banks */ + byPrgBank = ( byPrgBank << 2 ) % ( NesHeader.byRomSize << 1 ); + + ROMBANK0 = ROMPAGE( byPrgBank + 0 ); + ROMBANK1 = ROMPAGE( byPrgBank + 1 ); + ROMBANK2 = ROMPAGE( byPrgBank + 2 ); + ROMBANK3 = ROMPAGE( byPrgBank + 3 ); + + /* Set PPU Banks */ + byChrBank = ( byChrBank << 3 ) % ( NesHeader.byVRomSize << 3 ); + + PPUBANK[ 0 ] = VROMPAGE( byChrBank + 0 ); + PPUBANK[ 1 ] = VROMPAGE( byChrBank + 1 ); + PPUBANK[ 2 ] = VROMPAGE( byChrBank + 2 ); + PPUBANK[ 3 ] = VROMPAGE( byChrBank + 3 ); + PPUBANK[ 4 ] = VROMPAGE( byChrBank + 4 ); + PPUBANK[ 5 ] = VROMPAGE( byChrBank + 5 ); + PPUBANK[ 6 ] = VROMPAGE( byChrBank + 6 ); + PPUBANK[ 7 ] = VROMPAGE( byChrBank + 7 ); + + InfoNES_SetupChr(); + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 113 Write Function */ +/*-------------------------------------------------------------------*/ +void Map113_Write( WORD wAddr, BYTE byData ) +{ + BYTE byPrgBank, byChrBank; + + switch ( wAddr ) + { + case 0x8008: + case 0x8009: + byPrgBank = byData >> 3; + + if ( ( NesHeader.byRomSize << 1 ) <= 8 && ( NesHeader.byVRomSize << 3 ) == 128 ) + { + byChrBank = ( ( byData >> 3 ) & 0x08 ) + ( byData & 0x07 ); + } else { + byChrBank = byData & 0x07; + } + + /* Set ROM Banks */ + byPrgBank = ( byPrgBank << 2 ) % ( NesHeader.byRomSize << 1 ); + + ROMBANK0 = ROMPAGE( byPrgBank + 0 ); + ROMBANK1 = ROMPAGE( byPrgBank + 1 ); + ROMBANK2 = ROMPAGE( byPrgBank + 2 ); + ROMBANK3 = ROMPAGE( byPrgBank + 3 ); + + /* Set PPU Banks */ + byChrBank = ( byChrBank << 3 ) % ( NesHeader.byVRomSize << 3 ); + + PPUBANK[ 0 ] = VROMPAGE( byChrBank + 0 ); + PPUBANK[ 1 ] = VROMPAGE( byChrBank + 1 ); + PPUBANK[ 2 ] = VROMPAGE( byChrBank + 2 ); + PPUBANK[ 3 ] = VROMPAGE( byChrBank + 3 ); + PPUBANK[ 4 ] = VROMPAGE( byChrBank + 4 ); + PPUBANK[ 5 ] = VROMPAGE( byChrBank + 5 ); + PPUBANK[ 6 ] = VROMPAGE( byChrBank + 6 ); + PPUBANK[ 7 ] = VROMPAGE( byChrBank + 7 ); + + InfoNES_SetupChr(); + break; + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_114.c b/apps/plugins/infones/mapper/InfoNES_Mapper_114.c new file mode 100644 index 0000000..813371f --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_114.c @@ -0,0 +1,335 @@ +/*===================================================================*/ +/* */ +/* Mapper 114 (PC-SuperGames) */ +/* */ +/*===================================================================*/ + +BYTE Map114_Regs[ 8 ]; +DWORD Map114_Prg0, Map114_Prg1; +DWORD Map114_Chr01, Map114_Chr23; +DWORD Map114_Chr4, Map114_Chr5, Map114_Chr6, Map114_Chr7; + +BYTE Map114_IRQ_Enable; +BYTE Map114_IRQ_Cnt; +BYTE Map114_IRQ_Latch; + +#define Map114_Chr_Swap() ( Map114_Regs[ 0 ] & 0x80 ) +#define Map114_Prg_Swap() ( Map114_Regs[ 0 ] & 0x40 ) + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 114 */ +/*-------------------------------------------------------------------*/ +void Map114_Init() +{ + /* Initialize Mapper */ + MapperInit = Map114_Init; + + /* Write to Mapper */ + MapperWrite = Map114_Write; + + /* Write to SRAM */ + MapperSram = Map114_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map114_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Initialize State Registers */ + for ( int nPage = 0; nPage < 8; nPage++) + { + Map114_Regs[ nPage ] = 0x00; + } + + /* Set ROM Banks */ + Map114_Prg0 = 0; + Map114_Prg1 = 1; + Map114_Set_CPU_Banks(); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + Map114_Chr01 = 0; + Map114_Chr23 = 2; + Map114_Chr4 = 4; + Map114_Chr5 = 5; + Map114_Chr6 = 6; + Map114_Chr7 = 7; + Map114_Set_PPU_Banks(); + } else { + Map114_Chr01 = Map114_Chr23 = 0; + Map114_Chr4 = Map114_Chr5 = Map114_Chr6 = Map114_Chr7 = 0; + } + + /* Initialize IRQ Registers */ + Map114_IRQ_Enable = 0; + Map114_IRQ_Cnt = 0; + Map114_IRQ_Latch = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 114 Write to Sram Function */ +/*-------------------------------------------------------------------*/ +void Map114_Sram( WORD wAddr, BYTE byData ) +{ + if ( ( wAddr == 0x6000 ) && ( byData == 0x00 ) ) + { + /* Initialize State Registers */ + for ( int nPage = 0; nPage < 8; nPage++) + { + Map114_Regs[ nPage ] = 0x00; + } + + /* Set ROM Banks */ + Map114_Prg0 = 0; + Map114_Prg1 = 1; + Map114_Set_CPU_Banks(); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + Map114_Chr01 = 0; + Map114_Chr23 = 2; + Map114_Chr4 = 4; + Map114_Chr5 = 5; + Map114_Chr6 = 6; + Map114_Chr7 = 7; + Map114_Set_PPU_Banks(); + } else { + Map114_Chr01 = Map114_Chr23 = 0; + Map114_Chr4 = Map114_Chr5 = Map114_Chr6 = Map114_Chr7 = 0; + } + + /* Initialize IRQ Registers */ + Map114_IRQ_Enable = 0; + Map114_IRQ_Cnt = 0; + Map114_IRQ_Latch = 0; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 114 Write Function */ +/*-------------------------------------------------------------------*/ +void Map114_Write( WORD wAddr, BYTE byData ) +{ + DWORD dwBankNum; + + switch ( wAddr & 0xe001 ) + { + case 0x8000: + Map114_Regs[ 0 ] = byData; + Map114_Set_PPU_Banks(); + Map114_Set_CPU_Banks(); + break; + + case 0x8001: + Map114_Regs[ 1 ] = byData; + dwBankNum = Map114_Regs[ 1 ]; + + switch ( Map114_Regs[ 0 ] & 0x07 ) + { + /* Set PPU Banks */ + case 0x00: + if ( NesHeader.byVRomSize > 0 ) + { + dwBankNum &= 0xfe; + Map114_Chr01 = dwBankNum; + Map114_Set_PPU_Banks(); + } + break; + + case 0x01: + if ( NesHeader.byVRomSize > 0 ) + { + dwBankNum &= 0xfe; + Map114_Chr23 = dwBankNum; + Map114_Set_PPU_Banks(); + } + break; + + case 0x02: + if ( NesHeader.byVRomSize > 0 ) + { + Map114_Chr4 = dwBankNum; + Map114_Set_PPU_Banks(); + } + break; + + case 0x03: + if ( NesHeader.byVRomSize > 0 ) + { + Map114_Chr5 = dwBankNum; + Map114_Set_PPU_Banks(); + } + break; + + case 0x04: + if ( NesHeader.byVRomSize > 0 ) + { + Map114_Chr6 = dwBankNum; + Map114_Set_PPU_Banks(); + } + break; + + case 0x05: + if ( NesHeader.byVRomSize > 0 ) + { + Map114_Chr7 = dwBankNum; + Map114_Set_PPU_Banks(); + } + break; + + /* Set ROM Banks */ + case 0x06: + Map114_Prg0 = dwBankNum; + Map114_Set_CPU_Banks(); + break; + + case 0x07: + Map114_Prg1 = dwBankNum; + Map114_Set_CPU_Banks(); + break; + } + break; + + case 0xa000: + Map114_Regs[ 2 ] = byData; + + if ( !ROM_FourScr ) + { + if ( byData & 0x01 ) + { + InfoNES_Mirroring( 0 ); + } else { + InfoNES_Mirroring( 1 ); + } + } + break; + + case 0xa001: + Map114_Regs[ 3 ] = byData; + + if ( byData & 0x80 ) + { + /* Enable Save RAM $6000-$7fff */ + } else { + /* Disable Save RAM $6000-$7fff */ + } + break; + + case 0xc000: + Map114_Regs[ 4 ] = byData; + Map114_IRQ_Cnt = Map114_Regs[ 4 ]; + break; + + case 0xc001: + Map114_Regs[ 5 ] = byData; + Map114_IRQ_Latch = Map114_Regs[ 5 ]; + break; + + case 0xe000: + Map114_Regs[ 6 ] = byData; + Map114_IRQ_Enable = 0; + break; + + case 0xe001: + Map114_Regs[ 7 ] = byData; + Map114_IRQ_Enable = 1; + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 114 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map114_HSync() +{ +/* + * Callback at HSync + * + */ + if ( Map114_IRQ_Enable ) + { + if ( /* 0 <= PPU_Scanline && */ PPU_Scanline <= 239 ) + { + if ( PPU_R1 & R1_SHOW_SCR || PPU_R1 & R1_SHOW_SP ) + { + if ( !( Map114_IRQ_Cnt-- ) ) + { + Map114_IRQ_Cnt = Map114_IRQ_Latch; + IRQ_REQ; + } + } + } + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 114 Set CPU Banks Function */ +/*-------------------------------------------------------------------*/ +void Map114_Set_CPU_Banks() +{ + if ( Map114_Prg_Swap() ) + { + ROMBANK0 = ROMLASTPAGE( 1 ); + ROMBANK1 = ROMPAGE( Map114_Prg1 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMPAGE( Map114_Prg0 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK3 = ROMLASTPAGE( 0 ); + } else { + ROMBANK0 = ROMPAGE( Map114_Prg0 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE( Map114_Prg1 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 114 Set PPU Banks Function */ +/*-------------------------------------------------------------------*/ +void Map114_Set_PPU_Banks() +{ + if ( NesHeader.byVRomSize > 0 ) + { + if ( Map114_Chr_Swap() ) + { + PPUBANK[ 0 ] = VROMPAGE( Map114_Chr4 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( Map114_Chr5 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( Map114_Chr6 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( Map114_Chr7 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 4 ] = VROMPAGE( ( Map114_Chr01 + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( ( Map114_Chr01 + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE( ( Map114_Chr23 + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( ( Map114_Chr23 + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + } else { + PPUBANK[ 0 ] = VROMPAGE( ( Map114_Chr01 + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( ( Map114_Chr01 + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( ( Map114_Chr23 + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( ( Map114_Chr23 + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 4 ] = VROMPAGE( Map114_Chr4 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( Map114_Chr5 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE( Map114_Chr6 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( Map114_Chr7 % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + } + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_115.c b/apps/plugins/infones/mapper/InfoNES_Mapper_115.c new file mode 100644 index 0000000..dff8db3 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_115.c @@ -0,0 +1,268 @@ +/*===================================================================*/ +/* */ +/* Mapper 115 : CartSaint : Yuu Yuu Hakusho Final JusticePao(?) */ +/* */ +/*===================================================================*/ + +BYTE Map115_Reg[8]; +BYTE Map115_Prg0, Map115_Prg1, Map115_Prg2, Map115_Prg3; +BYTE Map115_Prg0L, Map115_Prg1L; +BYTE Map115_Chr0, Map115_Chr1, Map115_Chr2, Map115_Chr3; +BYTE Map115_Chr4, Map115_Chr5, Map115_Chr6, Map115_Chr7; + +BYTE Map115_IRQ_Enable; +BYTE Map115_IRQ_Counter; +BYTE Map115_IRQ_Latch; + +BYTE Map115_ExPrgSwitch; +BYTE Map115_ExChrSwitch; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 115 */ +/*-------------------------------------------------------------------*/ +void Map115_Init() +{ + /* Initialize Mapper */ + MapperInit = Map115_Init; + + /* Write to Mapper */ + MapperWrite = Map115_Write; + + /* Write to SRAM */ + MapperSram = Map115_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map115_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Initialize Registers */ + for( int i = 0; i < 8; i++ ) { + Map115_Reg[i] = 0x00; + } + + Map115_Prg0 = Map115_Prg0L = 0; + Map115_Prg1 = Map115_Prg1L = 1; + Map115_Prg2 = ( NesHeader.byRomSize << 1 ) - 2; + Map115_Prg3 = ( NesHeader.byRomSize << 1 ) - 1; + + Map115_ExPrgSwitch = 0; + Map115_ExChrSwitch = 0; + + /* Set ROM Banks */ + Map115_Set_CPU_Banks(); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) { + Map115_Chr0 = 0; + Map115_Chr1 = 1; + Map115_Chr2 = 2; + Map115_Chr3 = 3; + Map115_Chr4 = 4; + Map115_Chr5 = 5; + Map115_Chr6 = 6; + Map115_Chr7 = 7; + Map115_Set_PPU_Banks(); + } else { + Map115_Chr0 = Map115_Chr2 = Map115_Chr4 = Map115_Chr5 = Map115_Chr6 = Map115_Chr7 = 0; + Map115_Chr1 = Map115_Chr3 = 1; + } + + Map115_IRQ_Enable = 0; /* Disable */ + Map115_IRQ_Counter = 0; + Map115_IRQ_Latch = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 115 Write Function */ +/*-------------------------------------------------------------------*/ +void Map115_Write( WORD wAddr, BYTE byData ) +{ + switch( wAddr & 0xE001 ) { + case 0x8000: + Map115_Reg[0] = byData; + Map115_Set_CPU_Banks(); + Map115_Set_PPU_Banks(); + break; + case 0x8001: + Map115_Reg[1] = byData; + switch( Map115_Reg[0] & 0x07 ) { + case 0x00: + Map115_Chr0 = byData & 0xFE; + Map115_Chr1 = Map115_Chr0+1; + Map115_Set_PPU_Banks(); + break; + case 0x01: + Map115_Chr2 = byData & 0xFE; + Map115_Chr3 = Map115_Chr2+1; + Map115_Set_PPU_Banks(); + break; + case 0x02: + Map115_Chr4 = byData; + Map115_Set_PPU_Banks(); + break; + case 0x03: + Map115_Chr5 = byData; + Map115_Set_PPU_Banks(); + break; + case 0x04: + Map115_Chr6 = byData; + Map115_Set_PPU_Banks(); + break; + case 0x05: + Map115_Chr7 = byData; + Map115_Set_PPU_Banks(); + break; + case 0x06: + Map115_Prg0 = Map115_Prg0L = byData; + Map115_Set_CPU_Banks(); + break; + case 0x07: + Map115_Prg1 = Map115_Prg1L = byData; + Map115_Set_CPU_Banks(); + break; + } + break; + case 0xA000: + Map115_Reg[2] = byData; + if ( !ROM_FourScr ) { + if( byData & 0x01 ) InfoNES_Mirroring( 0 ); + else InfoNES_Mirroring( 1 ); + } + break; + case 0xA001: + Map115_Reg[3] = byData; + break; + case 0xC000: + Map115_Reg[4] = byData; + Map115_IRQ_Counter = byData; + Map115_IRQ_Enable = 0xFF; + break; + case 0xC001: + Map115_Reg[5] = byData; + Map115_IRQ_Latch = byData; + break; + case 0xE000: + Map115_Reg[6] = byData; + Map115_IRQ_Enable = 0; + break; + case 0xE001: + Map115_Reg[7] = byData; + Map115_IRQ_Enable = 0xFF; + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 115 Write to SRAM Function */ +/*-------------------------------------------------------------------*/ +void Map115_Sram( WORD wAddr, BYTE byData ) +{ + switch ( wAddr ) { + case 0x6000: + Map115_ExPrgSwitch = byData; + Map115_Set_CPU_Banks(); + break; + case 0x6001: + Map115_ExChrSwitch = byData&0x1; + Map115_Set_PPU_Banks(); + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 115 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map115_HSync() +{ + if( ( /* PPU_Scanline >= 0 && */ PPU_Scanline <= 239) ) { + if( PPU_R1 & R1_SHOW_SCR || PPU_R1 & R1_SHOW_SP ) { + if( Map115_IRQ_Enable ) { + if( !(Map115_IRQ_Counter--) ) { + Map115_IRQ_Counter = Map115_IRQ_Latch; + IRQ_REQ; + } + } + } + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 115 Set CPU Banks Function */ +/*-------------------------------------------------------------------*/ +void Map115_Set_CPU_Banks() +{ + if( Map115_ExPrgSwitch & 0x80 ) { + Map115_Prg0 = ((Map115_ExPrgSwitch<<1)&0x1e); + Map115_Prg1 = Map115_Prg0+1; + + ROMBANK0 = ROMPAGE( Map115_Prg0 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE( Map115_Prg1 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMPAGE( ( Map115_Prg0+2 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK3 = ROMPAGE( ( Map115_Prg1+2 ) % ( NesHeader.byRomSize << 1 ) ); + } else { + Map115_Prg0 = Map115_Prg0L; + Map115_Prg1 = Map115_Prg1L; + if( Map115_Reg[0] & 0x40 ) { + ROMBANK0 = ROMPAGE( ( NesHeader.byRomSize << 1 ) - 2 ); + ROMBANK1 = ROMPAGE( Map115_Prg1 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMPAGE( Map115_Prg0 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK3 = ROMPAGE( ( NesHeader.byRomSize << 1 ) - 1 ); + } else { + ROMBANK0 = ROMPAGE( Map115_Prg0 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE( Map115_Prg1 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMPAGE( ( NesHeader.byRomSize << 1 ) - 2 ); + ROMBANK3 = ROMPAGE( ( NesHeader.byRomSize << 1 ) - 1 ); + } + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 115 Set PPU Banks Function */ +/*-------------------------------------------------------------------*/ +void Map115_Set_PPU_Banks() +{ + if ( NesHeader.byVRomSize > 0 ) { + if( Map115_Reg[0] & 0x80 ) { + PPUBANK[ 0 ] = VROMPAGE( ((Map115_ExChrSwitch<<8)+Map115_Chr4) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 1 ] = VROMPAGE( ((Map115_ExChrSwitch<<8)+Map115_Chr5) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 2 ] = VROMPAGE( ((Map115_ExChrSwitch<<8)+Map115_Chr6) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 3 ] = VROMPAGE( ((Map115_ExChrSwitch<<8)+Map115_Chr7) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 4 ] = VROMPAGE( ((Map115_ExChrSwitch<<8)+Map115_Chr0) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 5 ] = VROMPAGE( ((Map115_ExChrSwitch<<8)+Map115_Chr1) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 6 ] = VROMPAGE( ((Map115_ExChrSwitch<<8)+Map115_Chr2) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 7 ] = VROMPAGE( ((Map115_ExChrSwitch<<8)+Map115_Chr3) % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + } else { + PPUBANK[ 0 ] = VROMPAGE( ((Map115_ExChrSwitch<<8)+Map115_Chr0) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 1 ] = VROMPAGE( ((Map115_ExChrSwitch<<8)+Map115_Chr1) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 2 ] = VROMPAGE( ((Map115_ExChrSwitch<<8)+Map115_Chr2) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 3 ] = VROMPAGE( ((Map115_ExChrSwitch<<8)+Map115_Chr3) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 4 ] = VROMPAGE( ((Map115_ExChrSwitch<<8)+Map115_Chr4) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 5 ] = VROMPAGE( ((Map115_ExChrSwitch<<8)+Map115_Chr5) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 6 ] = VROMPAGE( ((Map115_ExChrSwitch<<8)+Map115_Chr6) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 7 ] = VROMPAGE( ((Map115_ExChrSwitch<<8)+Map115_Chr7) % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + } + } +} + diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_116.c b/apps/plugins/infones/mapper/InfoNES_Mapper_116.c new file mode 100644 index 0000000..af68216 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_116.c @@ -0,0 +1,239 @@ +/*===================================================================*/ +/* */ +/* Mapper 116 : CartSaint : Yuu Yuu AV Kyoretsuden */ +/* */ +/*===================================================================*/ + +BYTE Map116_Reg[8]; +BYTE Map116_Prg0, Map116_Prg1, Map116_Prg2, Map116_Prg3; +BYTE Map116_Prg0L, Map116_Prg1L; +BYTE Map116_Chr0, Map116_Chr1, Map116_Chr2, Map116_Chr3; +BYTE Map116_Chr4, Map116_Chr5, Map116_Chr6, Map116_Chr7; + +BYTE Map116_IRQ_Enable; +BYTE Map116_IRQ_Counter; +BYTE Map116_IRQ_Latch; + +BYTE Map116_ExPrgSwitch; +BYTE Map116_ExChrSwitch; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 116 */ +/*-------------------------------------------------------------------*/ +void Map116_Init() +{ + /* Initialize Mapper */ + MapperInit = Map116_Init; + + /* Write to Mapper */ + MapperWrite = Map116_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map116_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Initialize Registers */ + for( int i = 0; i < 8; i++ ) { + Map116_Reg[i] = 0x00; + } + + Map116_Prg0 = Map116_Prg0L = 0; + Map116_Prg1 = Map116_Prg1L = 1; + Map116_Prg2 = ( NesHeader.byRomSize << 1 ) - 2; + Map116_Prg3 = ( NesHeader.byRomSize << 1 ) - 1; + + Map116_ExPrgSwitch = 0; + Map116_ExChrSwitch = 0; + + /* Set ROM Banks */ + Map116_Set_CPU_Banks(); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) { + Map116_Chr0 = 0; + Map116_Chr1 = 1; + Map116_Chr2 = 2; + Map116_Chr3 = 3; + Map116_Chr4 = 4; + Map116_Chr5 = 5; + Map116_Chr6 = 6; + Map116_Chr7 = 7; + Map116_Set_PPU_Banks(); + } else { + Map116_Chr0 = Map116_Chr2 = Map116_Chr4 = Map116_Chr5 = Map116_Chr6 = Map116_Chr7 = 0; + Map116_Chr1 = Map116_Chr3 = 1; + } + + Map116_IRQ_Enable = 0; /* Disable */ + Map116_IRQ_Counter = 0; + Map116_IRQ_Latch = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 116 Write Function */ +/*-------------------------------------------------------------------*/ +void Map116_Write( WORD wAddr, BYTE byData ) +{ + switch( wAddr & 0xE001 ) { + case 0x8000: + Map116_Reg[0] = byData; + Map116_Set_CPU_Banks(); + Map116_Set_PPU_Banks(); + break; + case 0x8001: + Map116_Reg[1] = byData; + switch( Map116_Reg[0] & 0x07 ) { + case 0x00: + Map116_Chr0 = byData & 0xFE; + Map116_Chr1 = Map116_Chr0+1; + Map116_Set_PPU_Banks(); + break; + case 0x01: + Map116_Chr2 = byData & 0xFE; + Map116_Chr3 = Map116_Chr2+1; + Map116_Set_PPU_Banks(); + break; + case 0x02: + Map116_Chr4 = byData; + Map116_Set_PPU_Banks(); + break; + case 0x03: + Map116_Chr5 = byData; + Map116_Set_PPU_Banks(); + break; + case 0x04: + Map116_Chr6 = byData; + Map116_Set_PPU_Banks(); + break; + case 0x05: + Map116_Chr7 = byData; + Map116_Set_PPU_Banks(); + break; + case 0x06: + Map116_Prg0 = byData; + Map116_Set_CPU_Banks(); + break; + case 0x07: + Map116_Prg1 = byData; + Map116_Set_CPU_Banks(); + break; + } + break; + case 0xA000: + Map116_Reg[2] = byData; + if ( !ROM_FourScr ) { + if( byData & 0x01 ) InfoNES_Mirroring( 0 ); + else InfoNES_Mirroring( 1 ); + } + break; + case 0xA001: + Map116_Reg[3] = byData; + break; + case 0xC000: + Map116_Reg[4] = byData; + Map116_IRQ_Counter = byData; + Map116_IRQ_Enable = 0xFF; + break; + case 0xC001: + Map116_Reg[5] = byData; + Map116_IRQ_Latch = byData; + break; + case 0xE000: + Map116_Reg[6] = byData; + Map116_IRQ_Enable = 0; + break; + case 0xE001: + Map116_Reg[7] = byData; + Map116_IRQ_Enable = 0xFF; + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 116 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map116_HSync() +{ + if( ( /* PPU_Scanline >= 0 && */ PPU_Scanline <= 239) ) { + if( PPU_R1 & R1_SHOW_SCR || PPU_R1 & R1_SHOW_SP ) { + if( Map116_IRQ_Enable ) { + if( !(Map116_IRQ_Counter--) ) { + Map116_IRQ_Counter = Map116_IRQ_Latch; + IRQ_REQ; + } + } + } + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 116 Set CPU Banks Function */ +/*-------------------------------------------------------------------*/ +void Map116_Set_CPU_Banks() +{ + if( Map116_Reg[0] & 0x40 ) { + ROMBANK0 = ROMPAGE( ( NesHeader.byRomSize << 1 ) - 2 ); + ROMBANK1 = ROMPAGE( Map116_Prg1 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMPAGE( Map116_Prg0 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK3 = ROMPAGE( ( NesHeader.byRomSize << 1 ) - 1 ); + } else { + ROMBANK0 = ROMPAGE( Map116_Prg0 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE( Map116_Prg1 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMPAGE( ( NesHeader.byRomSize << 1 ) - 2 ); + ROMBANK3 = ROMPAGE( ( NesHeader.byRomSize << 1 ) - 1 ); + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 116 Set PPU Banks Function */ +/*-------------------------------------------------------------------*/ +void Map116_Set_PPU_Banks() +{ + if ( NesHeader.byVRomSize > 0 ) { + if( Map116_Reg[0] & 0x80 ) { + PPUBANK[ 0 ] = VROMPAGE( ((Map116_ExChrSwitch<<8)+Map116_Chr4) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 1 ] = VROMPAGE( ((Map116_ExChrSwitch<<8)+Map116_Chr5) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 2 ] = VROMPAGE( ((Map116_ExChrSwitch<<8)+Map116_Chr6) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 3 ] = VROMPAGE( ((Map116_ExChrSwitch<<8)+Map116_Chr7) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 4 ] = VROMPAGE( ((Map116_ExChrSwitch<<8)+Map116_Chr0) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 5 ] = VROMPAGE( ((Map116_ExChrSwitch<<8)+Map116_Chr1) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 6 ] = VROMPAGE( ((Map116_ExChrSwitch<<8)+Map116_Chr2) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 7 ] = VROMPAGE( ((Map116_ExChrSwitch<<8)+Map116_Chr3) % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + } else { + PPUBANK[ 0 ] = VROMPAGE( ((Map116_ExChrSwitch<<8)+Map116_Chr0) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 1 ] = VROMPAGE( ((Map116_ExChrSwitch<<8)+Map116_Chr1) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 2 ] = VROMPAGE( ((Map116_ExChrSwitch<<8)+Map116_Chr2) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 3 ] = VROMPAGE( ((Map116_ExChrSwitch<<8)+Map116_Chr3) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 4 ] = VROMPAGE( ((Map116_ExChrSwitch<<8)+Map116_Chr4) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 5 ] = VROMPAGE( ((Map116_ExChrSwitch<<8)+Map116_Chr5) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 6 ] = VROMPAGE( ((Map116_ExChrSwitch<<8)+Map116_Chr6) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 7 ] = VROMPAGE( ((Map116_ExChrSwitch<<8)+Map116_Chr7) % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + } + } +} + diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_117.c b/apps/plugins/infones/mapper/InfoNES_Mapper_117.c new file mode 100644 index 0000000..9ec1a69 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_117.c @@ -0,0 +1,167 @@ +/*===================================================================*/ +/* */ +/* Mapper 117 (PC-Future) */ +/* */ +/*===================================================================*/ + +BYTE Map117_IRQ_Line; +BYTE Map117_IRQ_Enable1; +BYTE Map117_IRQ_Enable2; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 117 */ +/*-------------------------------------------------------------------*/ +void Map117_Init() +{ + /* Initialize Mapper */ + MapperInit = Map117_Init; + + /* Write to Mapper */ + MapperWrite = Map117_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map117_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Initialize IRQ Registers */ + Map117_IRQ_Line = 0; + Map117_IRQ_Enable1 = 0; + Map117_IRQ_Enable2 = 1; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 117 Write Function */ +/*-------------------------------------------------------------------*/ +void Map117_Write( WORD wAddr, BYTE byData ) +{ + switch ( wAddr ) + { + + /* Set ROM Banks */ + case 0x8000: + byData %= ( NesHeader.byRomSize << 1 ); + ROMBANK0 = ROMPAGE( byData ); + break; + + case 0x8001: + byData %= ( NesHeader.byRomSize << 1 ); + ROMBANK1 = ROMPAGE( byData ); + break; + + case 0x8002: + byData %= ( NesHeader.byRomSize << 1 ); + ROMBANK2 = ROMPAGE( byData ); + break; + + /* Set PPU Banks */ + case 0xA000: + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 0 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0xA001: + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 1 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0xA002: + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 2 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0xA003: + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 3 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0xA004: + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 4 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0xA005: + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 5 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0xA006: + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 6 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0xA007: + byData %= ( NesHeader.byVRomSize << 3 ); + PPUBANK[ 7 ] = VROMPAGE( byData ); + InfoNES_SetupChr(); + break; + + case 0xc001: + case 0xc002: + case 0xc003: + Map117_IRQ_Enable1 = Map117_IRQ_Line = byData; + break; + + case 0xe000: + Map117_IRQ_Enable2 = byData & 0x01; + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 117 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map117_HSync() +{ + if ( Map117_IRQ_Enable1 && Map117_IRQ_Enable2 ) + { + if ( Map117_IRQ_Line == PPU_Scanline ) + { + Map117_IRQ_Enable1 = 0x00; + IRQ_REQ; + } + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_118.c b/apps/plugins/infones/mapper/InfoNES_Mapper_118.c new file mode 100644 index 0000000..aa38aa9 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_118.c @@ -0,0 +1,285 @@ +/*===================================================================*/ +/* */ +/* Mapper 118 (Others) */ +/* */ +/*===================================================================*/ + +BYTE Map118_Regs[ 8 ]; +DWORD Map118_Prg0, Map118_Prg1; +DWORD Map118_Chr0, Map118_Chr1, Map118_Chr2, Map118_Chr3; +DWORD Map118_Chr4, Map118_Chr5, Map118_Chr6, Map118_Chr7; + +BYTE Map118_IRQ_Enable; +BYTE Map118_IRQ_Cnt; +BYTE Map118_IRQ_Latch; + +#define Map118_Chr_Swap() ( Map118_Regs[ 0 ] & 0x80 ) +#define Map118_Prg_Swap() ( Map118_Regs[ 0 ] & 0x40 ) + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 118 */ +/*-------------------------------------------------------------------*/ +void Map118_Init() +{ + /* Initialize Mapper */ + MapperInit = Map118_Init; + + /* Write to Mapper */ + MapperWrite = Map118_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map118_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Initialize State Registers */ + for ( int nPage = 0; nPage < 8; nPage++) + { + Map118_Regs[ nPage ] = 0x00; + } + + /* Set ROM Banks */ + Map118_Prg0 = 0; + Map118_Prg1 = 1; + Map118_Set_CPU_Banks(); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + Map118_Chr0 = 0; + Map118_Chr1 = 1; + Map118_Chr2 = 2; + Map118_Chr3 = 3; + Map118_Chr4 = 4; + Map118_Chr5 = 5; + Map118_Chr6 = 6; + Map118_Chr7 = 7; + Map118_Set_PPU_Banks(); + } else { + Map118_Chr0 = Map118_Chr1 = Map118_Chr2 = Map118_Chr3 = 0; + Map118_Chr4 = Map118_Chr5 = Map118_Chr6 = Map118_Chr7 = 0; + } + + /* Initialize IRQ Registers */ + Map118_IRQ_Enable = 0; + Map118_IRQ_Cnt = 0; + Map118_IRQ_Latch = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 118 Write Function */ +/*-------------------------------------------------------------------*/ +void Map118_Write( WORD wAddr, BYTE byData ) +{ + DWORD dwBankNum; + + switch ( wAddr & 0xe001 ) + { + case 0x8000: + Map118_Regs[ 0 ] = byData; + Map118_Set_PPU_Banks(); + Map118_Set_CPU_Banks(); + break; + + case 0x8001: + Map118_Regs[ 1 ] = byData; + dwBankNum = Map118_Regs[ 1 ]; + + /* Name Table Mirroring */ + if ( ( Map118_Regs[ 0 ] & 0x07 ) < 6 ) + { + if ( byData & 0x80 ) + { + InfoNES_Mirroring( 3 ); + } else { + InfoNES_Mirroring( 2 ); + } + } + + switch ( Map118_Regs[ 0 ] & 0x07 ) + { + /* Set PPU Banks */ + case 0x00: + if ( NesHeader.byVRomSize > 0 ) + { + dwBankNum &= 0xfe; + Map118_Chr0 = dwBankNum; + Map118_Chr1 = dwBankNum + 1; + Map118_Set_PPU_Banks(); + } + break; + + case 0x01: + if ( NesHeader.byVRomSize > 0 ) + { + dwBankNum &= 0xfe; + Map118_Chr2 = dwBankNum; + Map118_Chr3 = dwBankNum + 1; + Map118_Set_PPU_Banks(); + } + break; + + case 0x02: + if ( NesHeader.byVRomSize > 0 ) + { + Map118_Chr4 = dwBankNum; + Map118_Set_PPU_Banks(); + } + break; + + case 0x03: + if ( NesHeader.byVRomSize > 0 ) + { + Map118_Chr5 = dwBankNum; + Map118_Set_PPU_Banks(); + } + break; + + case 0x04: + if ( NesHeader.byVRomSize > 0 ) + { + Map118_Chr6 = dwBankNum; + Map118_Set_PPU_Banks(); + } + break; + + case 0x05: + if ( NesHeader.byVRomSize > 0 ) + { + Map118_Chr7 = dwBankNum; + Map118_Set_PPU_Banks(); + } + break; + + /* Set ROM Banks */ + case 0x06: + Map118_Prg0 = dwBankNum; + Map118_Set_CPU_Banks(); + break; + + case 0x07: + Map118_Prg1 = dwBankNum; + Map118_Set_CPU_Banks(); + break; + } + break; + + case 0xc000: + Map118_Regs[ 4 ] = byData; + Map118_IRQ_Cnt = Map118_Regs[ 4 ]; + break; + + case 0xc001: + Map118_Regs[ 5 ] = byData; + Map118_IRQ_Latch = Map118_Regs[ 5 ]; + break; + + case 0xe000: + Map118_Regs[ 6 ] = byData; + Map118_IRQ_Enable = 0; + break; + + case 0xe001: + Map118_Regs[ 7 ] = byData; + Map118_IRQ_Enable = 1; + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 118 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map118_HSync() +{ +/* + * Callback at HSync + * + */ + if ( Map118_IRQ_Enable ) + { + if ( /* 0 <= PPU_Scanline && */ PPU_Scanline <= 239 ) + { + if ( PPU_R1 & R1_SHOW_SCR || PPU_R1 & R1_SHOW_SP ) + { + if ( !( Map118_IRQ_Cnt-- ) ) + { + Map118_IRQ_Cnt = Map118_IRQ_Latch; + IRQ_REQ; + } + } + } + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 118 Set CPU Banks Function */ +/*-------------------------------------------------------------------*/ +void Map118_Set_CPU_Banks() +{ + if ( Map118_Prg_Swap() ) + { + ROMBANK0 = ROMLASTPAGE( 1 ); + ROMBANK1 = ROMPAGE( Map118_Prg1 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMPAGE( Map118_Prg0 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK3 = ROMLASTPAGE( 0 ); + } else { + ROMBANK0 = ROMPAGE( Map118_Prg0 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE( Map118_Prg1 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 118 Set PPU Banks Function */ +/*-------------------------------------------------------------------*/ +void Map118_Set_PPU_Banks() +{ + if ( NesHeader.byVRomSize > 0 ) + { + if ( Map118_Chr_Swap() ) + { + PPUBANK[ 0 ] = VROMPAGE( Map118_Chr4 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( Map118_Chr5 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( Map118_Chr6 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( Map118_Chr7 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 4 ] = VROMPAGE( Map118_Chr0 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( Map118_Chr1 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE( Map118_Chr2 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( Map118_Chr3 % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + } else { + PPUBANK[ 0 ] = VROMPAGE( Map118_Chr0 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( Map118_Chr1 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( Map118_Chr2 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( Map118_Chr3 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 4 ] = VROMPAGE( Map118_Chr4 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( Map118_Chr5 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE( Map118_Chr6 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( Map118_Chr7 % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + } + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_119.c b/apps/plugins/infones/mapper/InfoNES_Mapper_119.c new file mode 100644 index 0000000..782578f --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_119.c @@ -0,0 +1,249 @@ +/*===================================================================*/ +/* */ +/* Mapper 119 : TQ-ROM */ +/* */ +/*===================================================================*/ + +BYTE Map119_Reg[8]; +BYTE Map119_Prg0, Map119_Prg1; +BYTE Map119_Chr01, Map119_Chr23, Map119_Chr4, Map119_Chr5, Map119_Chr6, Map119_Chr7; +BYTE Map119_WeSram; + +BYTE Map119_IRQ_Enable; +BYTE Map119_IRQ_Counter; +BYTE Map119_IRQ_Latch; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 119 */ +/*-------------------------------------------------------------------*/ +void Map119_Init() +{ + /* Initialize Mapper */ + MapperInit = Map119_Init; + + /* Write to Mapper */ + MapperWrite = Map119_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map119_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set Registers */ + for( int i = 0; i < 8; i++ ) { + Map119_Reg[i] = 0x00; + } + + /* Set ROM Banks */ + Map119_Prg0 = 0; + Map119_Prg1 = 1; + Map119_Set_CPU_Banks(); + + /* Set PPU Banks */ + Map119_Chr01 = 0; + Map119_Chr23 = 2; + Map119_Chr4 = 4; + Map119_Chr5 = 5; + Map119_Chr6 = 6; + Map119_Chr7 = 7; + Map119_Set_PPU_Banks(); + + Map119_WeSram = 0; // Disable + Map119_IRQ_Enable = 0; // Disable + Map119_IRQ_Counter = 0; + Map119_IRQ_Latch = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 119 Write Function */ +/*-------------------------------------------------------------------*/ +void Map119_Write( WORD wAddr, BYTE byData ) +{ + switch( wAddr & 0xE001 ) { + case 0x8000: + Map119_Reg[0] = byData; + Map119_Set_CPU_Banks(); + Map119_Set_PPU_Banks(); + break; + case 0x8001: + Map119_Reg[1] = byData; + + switch( Map119_Reg[0] & 0x07 ) { + case 0x00: + if( NesHeader.byVRomSize > 0 ) { + Map119_Chr01 = byData & 0xFE; + Map119_Set_PPU_Banks(); + } + break; + case 0x01: + if( NesHeader.byVRomSize > 0 ) { + Map119_Chr23 = byData & 0xFE; + Map119_Set_PPU_Banks(); + } + break; + case 0x02: + if( NesHeader.byVRomSize > 0 ) { + Map119_Chr4 = byData; + Map119_Set_PPU_Banks(); + } + break; + case 0x03: + if( NesHeader.byVRomSize > 0 ) { + Map119_Chr5 = byData; + Map119_Set_PPU_Banks(); + } + break; + case 0x04: + if( NesHeader.byVRomSize > 0 ) { + Map119_Chr6 = byData; + Map119_Set_PPU_Banks(); + } + break; + case 0x05: + if( NesHeader.byVRomSize > 0 ) { + Map119_Chr7 = byData; + Map119_Set_PPU_Banks(); + } + break; + case 0x06: + Map119_Prg0 = byData; + Map119_Set_CPU_Banks(); + break; + case 0x07: + Map119_Prg1 = byData; + Map119_Set_CPU_Banks(); + break; + } + break; + case 0xA000: + Map119_Reg[2] = byData; + if( !ROM_FourScr ) { + if( byData & 0x01 ) InfoNES_Mirroring( 0 ); + else InfoNES_Mirroring( 1 ); + } + break; + case 0xA001: + Map119_Reg[3] = byData; + break; + case 0xC000: + Map119_Reg[4] = byData; + Map119_IRQ_Counter = byData; + break; + case 0xC001: + Map119_Reg[5] = byData; + Map119_IRQ_Latch = byData; + break; + case 0xE000: + Map119_Reg[6] = byData; + Map119_IRQ_Enable = 0; + Map119_IRQ_Counter = Map119_IRQ_Latch; + break; + case 0xE001: + Map119_Reg[7] = byData; + Map119_IRQ_Enable = 1; + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 119 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map119_HSync() +{ + if( ( /* PPU_Scanline >= 0 && */ PPU_Scanline <= 239) ) { + if( PPU_R1 & R1_SHOW_SCR || PPU_R1 & R1_SHOW_SP ) { + if( Map119_IRQ_Enable ) { + if( !(Map119_IRQ_Counter--) ) { + Map119_IRQ_Counter = Map119_IRQ_Latch; + IRQ_REQ; + } + } + } + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 119 Set CPU Banks Function */ +/*-------------------------------------------------------------------*/ +void Map119_Set_CPU_Banks() +{ + if( Map119_Reg[0] & 0x40 ) { + ROMBANK0 = ROMLASTPAGE( 1 ); + ROMBANK1 = ROMPAGE( Map119_Prg1 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMPAGE( Map119_Prg0 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK3 = ROMLASTPAGE( 0 ); + } else { + ROMBANK0 = ROMPAGE( Map119_Prg0 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE( Map119_Prg1 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 119 Set PPU Banks Function */ +/*-------------------------------------------------------------------*/ +void Map119_Set_PPU_Banks() +{ + if( Map119_Reg[0]&0x80 ) { + if(Map119_Chr4&0x40) PPUBANK[ 0 ] = CRAMPAGE(Map119_Chr4&0x07); + else PPUBANK[ 0 ] = VROMPAGE(Map119_Chr4 % (NesHeader.byRomSize<<1)); + if(Map119_Chr5&0x40) PPUBANK[ 1 ] = CRAMPAGE(Map119_Chr5&0x07); + else PPUBANK[ 1 ] = VROMPAGE(Map119_Chr5 % (NesHeader.byRomSize<<1)); + if(Map119_Chr6&0x40) PPUBANK[ 2 ] = CRAMPAGE(Map119_Chr6&0x07); + else PPUBANK[ 2 ] = VROMPAGE(Map119_Chr6 % (NesHeader.byRomSize<<1)); + if(Map119_Chr7&0x40) PPUBANK[ 3 ] = CRAMPAGE(Map119_Chr7&0x07); + else PPUBANK[ 3 ] = VROMPAGE(Map119_Chr7 % (NesHeader.byRomSize<<1)); + + if((Map119_Chr01+0)&0x40) PPUBANK[ 4 ] = CRAMPAGE((Map119_Chr01+0)&0x07); + else PPUBANK[ 4 ] = VROMPAGE((Map119_Chr01+0) % (NesHeader.byVRomSize<<3)); + if((Map119_Chr01+1)&0x40) PPUBANK[ 5 ] = CRAMPAGE((Map119_Chr01+1)&0x07); + else PPUBANK[ 5 ] = VROMPAGE((Map119_Chr01+1) % (NesHeader.byVRomSize<<3)); + if((Map119_Chr23+0)&0x40) PPUBANK[ 6 ] = CRAMPAGE((Map119_Chr23+0)&0x07); + else PPUBANK[ 6 ] = VROMPAGE((Map119_Chr23+0) % (NesHeader.byVRomSize<<3)); + if((Map119_Chr23+1)&0x40) PPUBANK[ 7 ] = CRAMPAGE((Map119_Chr23+1)&0x07); + else PPUBANK[ 7 ] = VROMPAGE((Map119_Chr23+1) % (NesHeader.byVRomSize<<3)); + } else { + if((Map119_Chr01+0)&0x40) PPUBANK[ 0 ] = CRAMPAGE((Map119_Chr01+0)&0x07); + else PPUBANK[ 0 ] = VROMPAGE((Map119_Chr01+0) % (NesHeader.byVRomSize<<3)); + if((Map119_Chr01+1)&0x40) PPUBANK[ 1 ] = CRAMPAGE((Map119_Chr01+1)&0x07); + else PPUBANK[ 1 ] = VROMPAGE((Map119_Chr01+1) % (NesHeader.byVRomSize<<3)); + if((Map119_Chr23+0)&0x40) PPUBANK[ 2 ] = CRAMPAGE((Map119_Chr23+0)&0x07); + else PPUBANK[ 2 ] = VROMPAGE((Map119_Chr23+0) % (NesHeader.byVRomSize<<3)); + if((Map119_Chr23+1)&0x40) PPUBANK[ 3 ] = CRAMPAGE((Map119_Chr23+1)&0x07); + else PPUBANK[ 3 ] = VROMPAGE((Map119_Chr23+1) % (NesHeader.byVRomSize<<3)); + + if(Map119_Chr4&0x40) PPUBANK[ 4 ] = CRAMPAGE(Map119_Chr4&0x07); + else PPUBANK[ 4 ] = VROMPAGE(Map119_Chr4 % (NesHeader.byVRomSize<<3)); + if(Map119_Chr5&0x40) PPUBANK[ 5 ] = CRAMPAGE(Map119_Chr5&0x07); + else PPUBANK[ 5 ] = VROMPAGE(Map119_Chr5 % (NesHeader.byVRomSize<<3)); + if(Map119_Chr6&0x40) PPUBANK[ 6 ] = CRAMPAGE(Map119_Chr6&0x07); + else PPUBANK[ 6 ] = VROMPAGE(Map119_Chr6 % (NesHeader.byVRomSize<<3)); + if(Map119_Chr7&0x40) PPUBANK[ 7 ] = CRAMPAGE(Map119_Chr7&0x07); + else PPUBANK[ 7 ] = VROMPAGE(Map119_Chr7 % (NesHeader.byVRomSize<<3)); + } + InfoNES_SetupChr(); +} + diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_122.c b/apps/plugins/infones/mapper/InfoNES_Mapper_122.c new file mode 100644 index 0000000..78ff2c7 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_122.c @@ -0,0 +1,75 @@ +/*===================================================================*/ +/* */ +/* Mapper 122 (Sunsoft) */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 122 */ +/*-------------------------------------------------------------------*/ +void Map122_Init() +{ + /* Initialize Mapper */ + MapperInit = Map122_Init; + + /* Write to Mapper */ + MapperWrite = Map0_Write; + + /* Write to SRAM */ + MapperSram = Map122_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 122 Write to Sram Function */ +/*-------------------------------------------------------------------*/ +void Map122_Sram( WORD wAddr, BYTE byData ) +{ + if ( wAddr == 0x6000 ) + { + BYTE byChrBank0 = byData & 0x07; + BYTE byChrBank1 = ( byData & 0x70 ) >> 4; + + byChrBank0 = ( byChrBank0 << 2 ) % ( NesHeader.byVRomSize << 3 ); + byChrBank1 = ( byChrBank1 << 2 ) % ( NesHeader.byVRomSize << 3 ); + + PPUBANK[ 0 ] = VROMPAGE( byChrBank0 + 0 ); + PPUBANK[ 1 ] = VROMPAGE( byChrBank0 + 1 ); + PPUBANK[ 2 ] = VROMPAGE( byChrBank0 + 2 ); + PPUBANK[ 3 ] = VROMPAGE( byChrBank0 + 3 ); + PPUBANK[ 4 ] = VROMPAGE( byChrBank1 + 0 ); + PPUBANK[ 5 ] = VROMPAGE( byChrBank1 + 1 ); + PPUBANK[ 6 ] = VROMPAGE( byChrBank1 + 2 ); + PPUBANK[ 7 ] = VROMPAGE( byChrBank1 + 3 ); + InfoNES_SetupChr(); + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_133.c b/apps/plugins/infones/mapper/InfoNES_Mapper_133.c new file mode 100644 index 0000000..55c42be --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_133.c @@ -0,0 +1,83 @@ +/*===================================================================*/ +/* */ +/* Mapper 133 : SACHEN CHEN */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 133 */ +/*-------------------------------------------------------------------*/ +void Map133_Init() +{ + /* Initialize Mapper */ + MapperInit = Map133_Init; + + /* Write to Mapper */ + MapperWrite = Map0_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map133_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 133 Write to APU Function */ +/*-------------------------------------------------------------------*/ +void Map133_Apu( WORD wAddr, BYTE byData ) +{ + if ( wAddr == 0x4120 ) { + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( ((byData&0x04) + 0 ) % (NesHeader.byRomSize << 1) ); + ROMBANK1 = ROMPAGE( ((byData&0x04) + 1 ) % (NesHeader.byRomSize << 1) ); + ROMBANK2 = ROMPAGE( ((byData&0x04) + 2 ) % (NesHeader.byRomSize << 1) ); + ROMBANK3 = ROMPAGE( ((byData&0x04) + 3 ) % (NesHeader.byRomSize << 1) ); + + /* Set PPU Banks */ + PPUBANK[ 0 ] = VROMPAGE( (((byData&0x03)<<3) + 0) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 1 ] = VROMPAGE( (((byData&0x03)<<3) + 1) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 2 ] = VROMPAGE( (((byData&0x03)<<3) + 2) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 3 ] = VROMPAGE( (((byData&0x03)<<3) + 3) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 4 ] = VROMPAGE( (((byData&0x03)<<3) + 4) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 5 ] = VROMPAGE( (((byData&0x03)<<3) + 5) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 6 ] = VROMPAGE( (((byData&0x03)<<3) + 6) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 7 ] = VROMPAGE( (((byData&0x03)<<3) + 7) % (NesHeader.byVRomSize << 3) ); + InfoNES_SetupChr(); + } + //Map133_Wram[ wAddr & 0x1fff ] = byData; +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_134.c b/apps/plugins/infones/mapper/InfoNES_Mapper_134.c new file mode 100644 index 0000000..4df75b3 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_134.c @@ -0,0 +1,113 @@ +/*===================================================================*/ +/* */ +/* Mapper 134 */ +/* */ +/*===================================================================*/ + +BYTE Map134_Cmd, Map134_Prg, Map134_Chr; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 134 */ +/*-------------------------------------------------------------------*/ +void Map134_Init() +{ + /* Initialize Mapper */ + MapperInit = Map134_Init; + + /* Write to Mapper */ + MapperWrite = Map0_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map134_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 134 Write to APU Function */ +/*-------------------------------------------------------------------*/ +void Map134_Apu( WORD wAddr, BYTE byData ) +{ + switch( wAddr & 0x4101 ) { + case 0x4100: + Map134_Cmd = byData & 0x07; + break; + case 0x4101: + switch( Map134_Cmd ) { + case 0: + Map134_Prg = 0; + Map134_Chr = 3; + break; + case 4: + Map134_Chr &= 0x3; + Map134_Chr |= (byData & 0x07) << 2; + break; + case 5: + Map134_Prg = byData & 0x07; + break; + case 6: + Map134_Chr &= 0x1C; + Map134_Chr |= byData & 0x3; + break; + case 7: + if( byData & 0x01 ) InfoNES_Mirroring( 0 ); + else InfoNES_Mirroring( 1 ); + break; + } + break; + } + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( ((Map134_Prg<<2) + 0 ) % (NesHeader.byRomSize << 1) ); + ROMBANK1 = ROMPAGE( ((Map134_Prg<<2) + 1 ) % (NesHeader.byRomSize << 1) ); + ROMBANK2 = ROMPAGE( ((Map134_Prg<<2) + 2 ) % (NesHeader.byRomSize << 1) ); + ROMBANK3 = ROMPAGE( ((Map134_Prg<<2) + 3 ) % (NesHeader.byRomSize << 1) ); + + /* Set PPU Banks */ + PPUBANK[ 0 ] = VROMPAGE( ((Map134_Chr<<3) + 0) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 1 ] = VROMPAGE( ((Map134_Chr<<3) + 1) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 2 ] = VROMPAGE( ((Map134_Chr<<3) + 2) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 3 ] = VROMPAGE( ((Map134_Chr<<3) + 3) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 4 ] = VROMPAGE( ((Map134_Chr<<3) + 4) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 5 ] = VROMPAGE( ((Map134_Chr<<3) + 5) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 6 ] = VROMPAGE( ((Map134_Chr<<3) + 6) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 7 ] = VROMPAGE( ((Map134_Chr<<3) + 7) % (NesHeader.byVRomSize << 3) ); + InfoNES_SetupChr(); + + //Map134_Wram[ wAddr & 0x1fff ] = byData; +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_135.c b/apps/plugins/infones/mapper/InfoNES_Mapper_135.c new file mode 100644 index 0000000..966c7e5 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_135.c @@ -0,0 +1,131 @@ +/*===================================================================*/ +/* */ +/* Mapper 135 : SACHEN CHEN */ +/* */ +/*===================================================================*/ + +BYTE Map135_Cmd; +BYTE Map135_Chr0l, Map135_Chr1l, Map135_Chr0h, Map135_Chr1h, Map135_Chrch; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 135 */ +/*-------------------------------------------------------------------*/ +void Map135_Init() +{ + /* Initialize Mapper */ + MapperInit = Map135_Init; + + /* Write to Mapper */ + MapperWrite = Map0_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map135_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Initialize Registers */ + Map135_Cmd = 0; + Map135_Chr0l = Map135_Chr1l = Map135_Chr0h = Map135_Chr1h = Map135_Chrch = 0; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + + /* Set PPU Banks */ + Map135_Set_PPU_Banks(); + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 135 Write to APU Function */ +/*-------------------------------------------------------------------*/ +void Map135_Apu( WORD wAddr, BYTE byData ) +{ + switch( wAddr & 0x4101 ) { + case 0x4100: + Map135_Cmd = byData & 0x07; + break; + case 0x4101: + switch( Map135_Cmd ) { + case 0: + Map135_Chr0l = byData & 0x07; + Map135_Set_PPU_Banks(); + break; + case 1: + Map135_Chr0h = byData & 0x07; + Map135_Set_PPU_Banks(); + break; + case 2: + Map135_Chr1l = byData & 0x07; + Map135_Set_PPU_Banks(); + break; + case 3: + Map135_Chr1h = byData & 0x07; + Map135_Set_PPU_Banks(); + break; + case 4: + Map135_Chrch = byData & 0x07; + Map135_Set_PPU_Banks(); + break; + case 5: + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( (((byData%0x07)<<2) + 0 ) % (NesHeader.byRomSize << 1) ); + ROMBANK1 = ROMPAGE( (((byData%0x07)<<2) + 1 ) % (NesHeader.byRomSize << 1) ); + ROMBANK2 = ROMPAGE( (((byData%0x07)<<2) + 2 ) % (NesHeader.byRomSize << 1) ); + ROMBANK3 = ROMPAGE( (((byData%0x07)<<2) + 3 ) % (NesHeader.byRomSize << 1) ); + break; + case 6: + break; + case 7: + switch( (byData>>1)&0x03 ) { + case 0: InfoNES_Mirroring( 2 ); break; + case 1: InfoNES_Mirroring( 0 ); break; + case 2: InfoNES_Mirroring( 1 ); break; + case 3: InfoNES_Mirroring( 2 ); break; + } + break; + } + break; + } + //Map135_Wram[ wAddr & 0x1fff ] = byData; +} + +/*-------------------------------------------------------------------*/ +/* Mapper 135 Set PPU Banks Function */ +/*-------------------------------------------------------------------*/ +void Map135_Set_PPU_Banks() +{ + /* Set PPU Banks */ + PPUBANK[ 0 ] = VROMPAGE( (((0|(Map135_Chr0l<<1)|(Map135_Chrch<<4))<<1) + 0) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 1 ] = VROMPAGE( (((0|(Map135_Chr0l<<1)|(Map135_Chrch<<4))<<1) + 1) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 2 ] = VROMPAGE( (((1|(Map135_Chr0h<<1)|(Map135_Chrch<<4))<<1) + 0) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 3 ] = VROMPAGE( (((1|(Map135_Chr0h<<1)|(Map135_Chrch<<4))<<1) + 1) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 4 ] = VROMPAGE( (((0|(Map135_Chr1l<<1)|(Map135_Chrch<<4))<<1) + 0) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 5 ] = VROMPAGE( (((0|(Map135_Chr1l<<1)|(Map135_Chrch<<4))<<1) + 1) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 6 ] = VROMPAGE( (((1|(Map135_Chr1h<<1)|(Map135_Chrch<<4))<<1) + 0) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 7 ] = VROMPAGE( (((1|(Map135_Chr1h<<1)|(Map135_Chrch<<4))<<1) + 1) % (NesHeader.byVRomSize << 3) ); + InfoNES_SetupChr(); +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_140.c b/apps/plugins/infones/mapper/InfoNES_Mapper_140.c new file mode 100644 index 0000000..a0060f6 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_140.c @@ -0,0 +1,88 @@ +/*===================================================================*/ +/* */ +/* Mapper 140 */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 140 */ +/*-------------------------------------------------------------------*/ +void Map140_Init() +{ + /* Initialize Mapper */ + MapperInit = Map0_Init; + + /* Write to Mapper */ + MapperWrite = Map0_Write; + + /* Write to SRAM */ + MapperSram = Map140_Sram; + + /* Write to APU */ + MapperApu = Map140_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 140 Write to SRAM Function */ +/*-------------------------------------------------------------------*/ +void Map140_Sram( WORD wAddr, BYTE byData ) +{ + Map140_Apu( wAddr, byData ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 140 Write to APU Function */ +/*-------------------------------------------------------------------*/ +void Map140_Apu( WORD wAddr, BYTE byData ) +{ + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( (((byData&0xF0)>>2) + 0 ) % (NesHeader.byRomSize << 1) ); + ROMBANK1 = ROMPAGE( (((byData%0xF0)>>2) + 1 ) % (NesHeader.byRomSize << 1) ); + ROMBANK2 = ROMPAGE( (((byData%0xF0)>>2) + 2 ) % (NesHeader.byRomSize << 1) ); + ROMBANK3 = ROMPAGE( (((byData%0xF0)>>2) + 3 ) % (NesHeader.byRomSize << 1) ); + + /* Set PPU Banks */ + PPUBANK[ 0 ] = VROMPAGE( (((byData&0x0F)<<3) + 0) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 1 ] = VROMPAGE( (((byData&0x0F)<<3) + 1) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 2 ] = VROMPAGE( (((byData&0x0F)<<3) + 2) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 3 ] = VROMPAGE( (((byData&0x0F)<<3) + 3) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 4 ] = VROMPAGE( (((byData&0x0F)<<3) + 4) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 5 ] = VROMPAGE( (((byData&0x0F)<<3) + 5) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 6 ] = VROMPAGE( (((byData&0x0F)<<3) + 6) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 7 ] = VROMPAGE( (((byData&0x0F)<<3) + 7) % (NesHeader.byVRomSize << 3) ); + InfoNES_SetupChr(); +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_151.c b/apps/plugins/infones/mapper/InfoNES_Mapper_151.c new file mode 100644 index 0000000..c38e8e9 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_151.c @@ -0,0 +1,96 @@ +/*===================================================================*/ +/* */ +/* Mapper 151 (VSUnisystem) */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 151 */ +/*-------------------------------------------------------------------*/ +void Map151_Init() +{ + /* Initialize Mapper */ + MapperInit = Map151_Init; + + /* Write to Mapper */ + MapperWrite = Map151_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 151 Write Function */ +/*-------------------------------------------------------------------*/ +void Map151_Write( WORD wAddr, BYTE byData ) +{ + /* Set ROM Banks */ + switch( wAddr & 0xF000 ) + { + case 0x8000: + ROMBANK0 = ROMPAGE( byData % ( NesHeader.byRomSize << 1 ) ); + break; + + case 0xA000: + ROMBANK1 = ROMPAGE( byData % ( NesHeader.byRomSize << 1 ) ); + break; + + case 0xC000: + ROMBANK2 = ROMPAGE( byData % ( NesHeader.byRomSize << 1 ) ); + break; + + case 0xE000: + PPUBANK[ 0 ] = VROMPAGE( ( byData*4+0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( ( byData*4+1 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( ( byData*4+2 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( ( byData*4+3 ) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xF000: + PPUBANK[ 4 ] = VROMPAGE( ( byData*4+0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( ( byData*4+1 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE( ( byData*4+2 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( ( byData*4+3 ) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_160.c b/apps/plugins/infones/mapper/InfoNES_Mapper_160.c new file mode 100644 index 0000000..c9698fc --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_160.c @@ -0,0 +1,311 @@ +/*===================================================================*/ +/* */ +/* Mapper 160 (Pirates) */ +/* */ +/*===================================================================*/ + +BYTE Map160_IRQ_Enable; +BYTE Map160_IRQ_Cnt; +BYTE Map160_IRQ_Latch; +BYTE Map160_Refresh_Type; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 160 */ +/*-------------------------------------------------------------------*/ +void Map160_Init() +{ + /* Initialize Mapper */ + MapperInit = Map160_Init; + + /* Write to Mapper */ + MapperWrite = Map160_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map160_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Initialize IRQ Registers */ + Map160_IRQ_Enable = 0; + Map160_IRQ_Cnt = 0; + Map160_IRQ_Latch = 0; + Map160_Refresh_Type = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 160 Write Function */ +/*-------------------------------------------------------------------*/ +void Map160_Write( WORD wAddr, BYTE byData ) +{ + switch ( wAddr ) + { + /* Set ROM Banks */ + case 0x8000: + ROMBANK0 = ROMPAGE( byData % ( NesHeader.byRomSize << 1 ) ); + break; + + case 0x8001: + ROMBANK1 = ROMPAGE( byData % ( NesHeader.byRomSize << 1 ) ); + break; + + case 0x8002: + ROMBANK2 = ROMPAGE( byData % ( NesHeader.byRomSize << 1 ) ); + break; + + case 0x9000: + if ( byData == 0x2b ) + { + Map160_Refresh_Type = 1; /* Title */ + } + else if ( byData == 0xa8 ) + { + Map160_Refresh_Type = 2; /* Passwd */ + } + else if ( byData == 0x1f ) + { + Map160_Refresh_Type = 3; /* Game Over */ + } + else if ( byData == 0x7c ) + { + Map160_Refresh_Type = 4; /* Continue */ + } + else if ( byData == 0x18 ) + { + Map160_Refresh_Type = 5; /* Roulette */ + } + else if ( byData == 0x60 ) + { + Map160_Refresh_Type = 6; /* Congratulation */ + } + else + { + Map160_Refresh_Type = 0; + } + + PPUBANK[ 0 ] = VROMPAGE( byData % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0x9001: + PPUBANK[ 1 ] = VROMPAGE( byData % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0x9002: + if ( Map160_Refresh_Type == 2 && byData != 0xe8 ) + { + Map160_Refresh_Type = 0; /* Not Passwd */ + } + PPUBANK[ 2 ] = VROMPAGE( byData % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0x9003: + PPUBANK[ 3 ] = VROMPAGE( byData % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0x9004: + PPUBANK[ 4 ] = VROMPAGE( byData % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0x9005: + PPUBANK[ 5 ] = VROMPAGE( byData % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0x9006: + PPUBANK[ 6 ] = VROMPAGE( byData % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0x9007: + PPUBANK[ 7 ] = VROMPAGE( byData % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0xc000: + Map160_IRQ_Cnt = Map160_IRQ_Latch; + Map160_IRQ_Enable = Map160_IRQ_Latch; + break; + + case 0xc001: + Map160_IRQ_Latch = byData; + break; + + case 0xc002: + Map160_IRQ_Enable = 0; + break; + + case 0xc003: + Map160_IRQ_Cnt = byData; + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 160 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map160_HSync() +{ +/* + * Callback at HSync + * + */ + if ( PPU_Scanline == 0 || PPU_Scanline == 239 ) + { + if ( Map160_Refresh_Type == 1 ) + { + PPUBANK[ 0 ] = VROMPAGE( 0x58 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( 0x59 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( 0x5a % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( 0x5b % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 4 ] = VROMPAGE( 0x58 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( 0x59 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE( 0x5a % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( 0x5b % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + } + else if ( Map160_Refresh_Type == 2 ) + { + PPUBANK[ 0 ] = VROMPAGE( 0x78 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( 0x79 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( 0x7a % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( 0x7b % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 4 ] = VROMPAGE( 0x78 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( 0x79 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE( 0x7a % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( 0x7b % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + } + else if ( Map160_Refresh_Type == 3 ) + { + PPUBANK[ 0 ] = VROMPAGE( 0x7c % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( 0x7d % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( 0x7e % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( 0x7f % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 4 ] = VROMPAGE( 0x7c % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( 0x7d % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE( 0x7e % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( 0x7f % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + } + else if ( Map160_Refresh_Type == 5 ) + { + PPUBANK[ 0 ] = VROMPAGE( 0x70 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( 0x71 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( 0x72 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( 0x73 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 4 ] = VROMPAGE( 0x74 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( 0x75 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE( 0x76 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( 0x77 % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + } + else if ( Map160_Refresh_Type == 6 ) + { + PPUBANK[ 0 ] = VROMPAGE( 0x5c % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( 0x5d % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( 0x5e % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( 0x5f % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 4 ] = VROMPAGE( 0x7c % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( 0x7d % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE( 0x7e % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( 0x7f % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + } + } + + if ( PPU_Scanline == 64 ) + { + if ( Map160_Refresh_Type == 4 ) + { + PPUBANK[ 0 ] = VROMPAGE( 0x6c % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( 0x6d % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( 0x6e % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( 0x6f % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + } + } + + if ( PPU_Scanline == 128 ) + { + if ( Map160_Refresh_Type == 4 ) + { + PPUBANK[ 0 ] = VROMPAGE( 0x68 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( 0x69 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( 0x6a % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( 0x6b % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + } + else if ( Map160_Refresh_Type == 5 ) + { + PPUBANK[ 0 ] = VROMPAGE( 0x74 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( 0x75 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( 0x76 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( 0x77 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 4 ] = VROMPAGE( 0x74 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( 0x75 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE( 0x76 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( 0x77 % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + } + } + + if ( PPU_Scanline == 160 ) + { + if ( Map160_Refresh_Type == 6 ) + { + PPUBANK[ 0 ] = VROMPAGE( 0x60 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( 0x61 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( 0x5e % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( 0x5f % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 4 ] = VROMPAGE( 0x7c % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( 0x7d % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE( 0x7e % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( 0x7f % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + } + } + + if ( Map160_IRQ_Enable ) + { + if ( Map160_IRQ_Cnt == 0xff ) + { + IRQ_REQ; + Map160_IRQ_Cnt = 0; + Map160_IRQ_Enable = 0; + } else { + Map160_IRQ_Cnt++; + } + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_180.c b/apps/plugins/infones/mapper/InfoNES_Mapper_180.c new file mode 100644 index 0000000..1f5d8f9 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_180.c @@ -0,0 +1,71 @@ +/*===================================================================*/ +/* */ +/* Mapper 180 (Nichibutsu) */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 180 */ +/*-------------------------------------------------------------------*/ +void Map180_Init() +{ + /* Initialize Mapper */ + MapperInit = Map180_Init; + + /* Write to Mapper */ + MapperWrite = Map180_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 180 Write Function */ +/*-------------------------------------------------------------------*/ +void Map180_Write( WORD wAddr, BYTE byData ) +{ + /* Set ROM Banks */ + byData &= 0x07; + byData <<= 1; + byData %= ( NesHeader.byRomSize << 1 ); + ROMBANK2 = ROMPAGE( byData ); + ROMBANK3 = ROMPAGE( byData + 1 ); +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_181.c b/apps/plugins/infones/mapper/InfoNES_Mapper_181.c new file mode 100644 index 0000000..0bed278 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_181.c @@ -0,0 +1,82 @@ +/*===================================================================*/ +/* */ +/* Mapper 181 : Hacker International Type2 */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 181 */ +/*-------------------------------------------------------------------*/ +void Map181_Init() +{ + /* Initialize Mapper */ + MapperInit = Map181_Init; + + /* Write to Mapper */ + MapperWrite = Map0_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map181_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 181 Write to APU Function */ +/*-------------------------------------------------------------------*/ +void Map181_Apu( WORD wAddr, BYTE byData ) +{ + if( wAddr == 0x4120 ) { + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( (((byData&0x08)>>1) + 0 ) % (NesHeader.byRomSize << 1) ); + ROMBANK1 = ROMPAGE( (((byData&0x08)>>1) + 1 ) % (NesHeader.byRomSize << 1) ); + ROMBANK2 = ROMPAGE( (((byData&0x08)>>1) + 2 ) % (NesHeader.byRomSize << 1) ); + ROMBANK3 = ROMPAGE( (((byData&0x08)>>1) + 3 ) % (NesHeader.byRomSize << 1) ); + + /* Set PPU Banks */ + PPUBANK[ 0 ] = VROMPAGE( (((byData&0x07)<<3) + 0) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 1 ] = VROMPAGE( (((byData&0x07)<<3) + 1) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 2 ] = VROMPAGE( (((byData&0x07)<<3) + 2) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 3 ] = VROMPAGE( (((byData&0x07)<<3) + 3) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 4 ] = VROMPAGE( (((byData&0x07)<<3) + 4) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 5 ] = VROMPAGE( (((byData&0x07)<<3) + 5) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 6 ] = VROMPAGE( (((byData&0x07)<<3) + 6) % (NesHeader.byVRomSize << 3) ); + PPUBANK[ 7 ] = VROMPAGE( (((byData&0x07)<<3) + 7) % (NesHeader.byVRomSize << 3) ); + InfoNES_SetupChr(); + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_182.c b/apps/plugins/infones/mapper/InfoNES_Mapper_182.c new file mode 100644 index 0000000..cb45154 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_182.c @@ -0,0 +1,173 @@ +/*===================================================================*/ +/* */ +/* Mapper 182 (Pirates) */ +/* */ +/*===================================================================*/ + +BYTE Map182_Regs[1]; +BYTE Map182_IRQ_Enable; +BYTE Map182_IRQ_Cnt; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 182 */ +/*-------------------------------------------------------------------*/ +void Map182_Init() +{ + /* Initialize Mapper */ + MapperInit = Map182_Init; + + /* Write to Mapper */ + MapperWrite = Map182_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map182_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( int nPage = 0; nPage < 8; ++nPage ) + { + PPUBANK[ nPage ] = VROMPAGE( nPage ); + } + InfoNES_SetupChr(); + } + + /* Initialize IRQ registers */ + Map182_Regs[0] = 0; + Map182_IRQ_Enable = 0; + Map182_IRQ_Cnt = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 182 Write Function */ +/*-------------------------------------------------------------------*/ +void Map182_Write( WORD wAddr, BYTE byData ) +{ + switch( wAddr & 0xF003 ) + { + /* Name Table Mirroring */ + case 0x8001: + if ( byData & 0x01 ) + { + InfoNES_Mirroring( 0 ); /* Horizontal */ + } + else + { + InfoNES_Mirroring( 1 ); /* Vertical */ + } + break; + + case 0xA000: + Map182_Regs[0] = byData & 0x07; + break; + + case 0xC000: + switch( Map182_Regs[0] ) + { + /* Set PPU Banks */ + case 0x00: + PPUBANK[ 0 ] = VROMPAGE( ( ( byData & 0xFE ) + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( ( ( byData & 0xFE ) + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0x01: + PPUBANK[ 5 ] = VROMPAGE( byData % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0x02: + PPUBANK[ 2 ] = VROMPAGE( ( ( byData & 0xFE ) + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( ( ( byData & 0xFE ) + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0x03: + PPUBANK[ 7 ] = VROMPAGE( byData % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + /* Set ROM Banks */ + case 0x04: + ROMBANK0 = ROMPAGE( byData % ( NesHeader.byRomSize << 1 ) ); + break; + + case 0x05: + ROMBANK1 = ROMPAGE( byData % ( NesHeader.byRomSize << 1 ) ); + break; + + /* Set PPU Banks */ + case 0x06: + PPUBANK[ 4 ] = VROMPAGE( byData % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0x07: + PPUBANK[ 6 ] = VROMPAGE( byData % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + } + break; + + case 0xE003: + Map182_IRQ_Cnt = byData; + Map182_IRQ_Enable = byData; + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 182 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map182_HSync() +{ +/* + * Callback at HSync + * + */ + if ( Map182_IRQ_Enable ) + { + if ( /* 0 <= PPU_Scanline && */ PPU_Scanline <= 240 ) + { + if ( PPU_R1 & R1_SHOW_SCR || PPU_R1 & R1_SHOW_SP ) + { + if ( !( --Map182_IRQ_Cnt ) ) + { + Map182_IRQ_Cnt = 0; + Map182_IRQ_Enable = 0; + IRQ_REQ; + } + } + } + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_183.c b/apps/plugins/infones/mapper/InfoNES_Mapper_183.c new file mode 100644 index 0000000..25bd234 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_183.c @@ -0,0 +1,228 @@ +/*===================================================================*/ +/* */ +/* Mapper 183 : Gimmick (Bootleg) */ +/* */ +/*===================================================================*/ + +BYTE Map183_Reg[8]; +BYTE Map183_IRQ_Enable; +int Map183_IRQ_Counter; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 183 */ +/*-------------------------------------------------------------------*/ +void Map183_Init() +{ + /* Initialize Mapper */ + MapperInit = Map183_Init; + + /* Write to Mapper */ + MapperWrite = Map183_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map183_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Initialize Registers */ + for( int i = 0; i < 8; i++ ) { + Map183_Reg[i] = i; + } + Map183_IRQ_Enable = 0; + Map183_IRQ_Counter = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 183 Write Function */ +/*-------------------------------------------------------------------*/ +void Map183_Write( WORD wAddr, BYTE byData ) +{ + switch( wAddr ) { + case 0x8800: + ROMBANK0 = ROMPAGE( byData % (NesHeader.byRomSize << 1) ); + break; + case 0xA800: + ROMBANK1 = ROMPAGE( byData % (NesHeader.byRomSize << 1) ); + break; + case 0xA000: + ROMBANK2 = ROMPAGE( byData % (NesHeader.byRomSize << 1) ); + break; + + case 0xB000: + Map183_Reg[0] = (Map183_Reg[0]&0xF0)|(byData&0x0F); + PPUBANK[ 0 ] = VROMPAGE( Map183_Reg[0] % (NesHeader.byVRomSize << 3) ); + InfoNES_SetupChr(); + break; + case 0xB004: + Map183_Reg[0] = (Map183_Reg[0]&0x0F)|((byData&0x0F)<<4); + PPUBANK[ 0 ] = VROMPAGE( Map183_Reg[0] % (NesHeader.byVRomSize << 3) ); + InfoNES_SetupChr(); + break; + case 0xB008: + Map183_Reg[1] = (Map183_Reg[1]&0xF0)|(byData&0x0F); + PPUBANK[ 1 ] = VROMPAGE( Map183_Reg[1] % (NesHeader.byVRomSize << 3) ); + InfoNES_SetupChr(); + break; + case 0xB00C: + Map183_Reg[1] = (Map183_Reg[1]&0x0F)|((byData&0x0F)<<4); + PPUBANK[ 1 ] = VROMPAGE( Map183_Reg[1] % (NesHeader.byVRomSize << 3) ); + InfoNES_SetupChr(); + break; + + case 0xC000: + Map183_Reg[2] = (Map183_Reg[2]&0xF0)|(byData&0x0F); + PPUBANK[ 2 ] = VROMPAGE( Map183_Reg[2] % (NesHeader.byVRomSize << 3) ); + InfoNES_SetupChr(); + break; + case 0xC004: + Map183_Reg[2] = (Map183_Reg[2]&0x0F)|((byData&0x0F)<<4); + PPUBANK[ 2 ] = VROMPAGE( Map183_Reg[2] % (NesHeader.byVRomSize << 3) ); + InfoNES_SetupChr(); + break; + case 0xC008: + Map183_Reg[3] = (Map183_Reg[3]&0xF0)|(byData&0x0F); + PPUBANK[ 3 ] = VROMPAGE( Map183_Reg[3] % (NesHeader.byVRomSize << 3) ); + InfoNES_SetupChr(); + break; + case 0xC00C: + Map183_Reg[3] = (Map183_Reg[3]&0x0F)|((byData&0x0F)<<4); + PPUBANK[ 3 ] = VROMPAGE( Map183_Reg[3] % (NesHeader.byVRomSize << 3) ); + InfoNES_SetupChr(); + break; + + case 0xD000: + Map183_Reg[4] = (Map183_Reg[4]&0xF0)|(byData&0x0F); + PPUBANK[ 4 ] = VROMPAGE( Map183_Reg[4] % (NesHeader.byVRomSize << 3) ); + InfoNES_SetupChr(); + break; + case 0xD004: + Map183_Reg[4] = (Map183_Reg[4]&0x0F)|((byData&0x0F)<<4); + PPUBANK[ 4 ] = VROMPAGE( Map183_Reg[4] % (NesHeader.byVRomSize << 3) ); + InfoNES_SetupChr(); + break; + case 0xD008: + Map183_Reg[5] = (Map183_Reg[5]&0xF0)|(byData&0x0F); + PPUBANK[ 5 ] = VROMPAGE( Map183_Reg[5] % (NesHeader.byVRomSize << 3) ); + InfoNES_SetupChr(); + break; + case 0xD00C: + Map183_Reg[5] = (Map183_Reg[5]&0x0F)|((byData&0x0F)<<4); + PPUBANK[ 5 ] = VROMPAGE( Map183_Reg[5] % (NesHeader.byVRomSize << 3) ); + InfoNES_SetupChr(); + break; + + case 0xE000: + Map183_Reg[6] = (Map183_Reg[6]&0xF0)|(byData&0x0F); + PPUBANK[ 6 ] = VROMPAGE( Map183_Reg[6] % (NesHeader.byVRomSize << 3) ); + InfoNES_SetupChr(); + break; + case 0xE004: + Map183_Reg[6] = (Map183_Reg[6]&0x0F)|((byData&0x0F)<<4); + PPUBANK[ 6 ] = VROMPAGE( Map183_Reg[6] % (NesHeader.byVRomSize << 3) ); + InfoNES_SetupChr(); + break; + case 0xE008: + Map183_Reg[7] = (Map183_Reg[3]&0xF0)|(byData&0x0F); + PPUBANK[ 7 ] = VROMPAGE( Map183_Reg[7] % (NesHeader.byVRomSize << 3) ); + InfoNES_SetupChr(); + break; + case 0xE00C: + Map183_Reg[7] = (Map183_Reg[3]&0x0F)|((byData&0x0F)<<4); + PPUBANK[ 7 ] = VROMPAGE( Map183_Reg[7] % (NesHeader.byVRomSize << 3) ); + InfoNES_SetupChr(); + break; + + case 0x9008: + if( byData == 1 ) { + for( int i = 0; i < 8; i++ ) { + Map183_Reg[i] = i; + } + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) { + PPUBANK[ 0 ] = VROMPAGE( 0 ); + PPUBANK[ 1 ] = VROMPAGE( 1 ); + PPUBANK[ 2 ] = VROMPAGE( 2 ); + PPUBANK[ 3 ] = VROMPAGE( 3 ); + PPUBANK[ 4 ] = VROMPAGE( 4 ); + PPUBANK[ 5 ] = VROMPAGE( 5 ); + PPUBANK[ 6 ] = VROMPAGE( 6 ); + PPUBANK[ 7 ] = VROMPAGE( 7 ); + InfoNES_SetupChr(); + } + } + break; + + case 0x9800: + if( byData == 0 ) InfoNES_Mirroring( 1 ); + else if( byData == 1 ) InfoNES_Mirroring( 0 ); + else if( byData == 2 ) InfoNES_Mirroring( 2 ); + else if( byData == 3 ) InfoNES_Mirroring( 3 ); + break; + + case 0xF000: + Map183_IRQ_Counter = (Map183_IRQ_Counter&0xFF00)|byData; + break; + case 0xF004: + Map183_IRQ_Counter = (Map183_IRQ_Counter&0x00FF)|(byData<<8); + break; + case 0xF008: + Map183_IRQ_Enable = byData; + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 183 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map183_HSync() +{ + if( Map183_IRQ_Enable & 0x02 ) { + if( Map183_IRQ_Counter <= 113 ) { + Map183_IRQ_Counter = 0; + IRQ_REQ; + } else { + Map183_IRQ_Counter -= 113; + } + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_185.c b/apps/plugins/infones/mapper/InfoNES_Mapper_185.c new file mode 100644 index 0000000..ebd854a --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_185.c @@ -0,0 +1,88 @@ +/*===================================================================*/ +/* */ +/* Mapper 185 (Tecmo) */ +/* */ +/*===================================================================*/ + +BYTE Map185_Dummy_Chr_Rom[ 0x400 ]; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 185 */ +/*-------------------------------------------------------------------*/ +void Map185_Init() +{ + /* Initialize Mapper */ + MapperInit = Map185_Init; + + /* Write to Mapper */ + MapperWrite = Map185_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + + /* Initialize Dummy VROM */ + for ( int nPage = 0; nPage < 0x400; nPage++ ) + { + Map185_Dummy_Chr_Rom[ nPage ] = 0xff; + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 185 Write Function */ +/*-------------------------------------------------------------------*/ +void Map185_Write( WORD wAddr, BYTE byData ) +{ + /* Set PPU Banks */ + if ( byData & 0x03 ) + { + PPUBANK[ 0 ] = VROMPAGE( 0 ); + PPUBANK[ 1 ] = VROMPAGE( 1 ); + PPUBANK[ 2 ] = VROMPAGE( 2 ); + PPUBANK[ 3 ] = VROMPAGE( 3 ); + PPUBANK[ 4 ] = VROMPAGE( 4 ); + PPUBANK[ 5 ] = VROMPAGE( 5 ); + PPUBANK[ 6 ] = VROMPAGE( 6 ); + PPUBANK[ 7 ] = VROMPAGE( 7 ); + InfoNES_SetupChr(); + } else { + PPUBANK[ 0 ] = Map185_Dummy_Chr_Rom; + PPUBANK[ 1 ] = Map185_Dummy_Chr_Rom; + PPUBANK[ 2 ] = Map185_Dummy_Chr_Rom; + PPUBANK[ 3 ] = Map185_Dummy_Chr_Rom; + PPUBANK[ 4 ] = Map185_Dummy_Chr_Rom; + PPUBANK[ 5 ] = Map185_Dummy_Chr_Rom; + PPUBANK[ 6 ] = Map185_Dummy_Chr_Rom; + PPUBANK[ 7 ] = Map185_Dummy_Chr_Rom; + InfoNES_SetupChr(); + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_187.c b/apps/plugins/infones/mapper/InfoNES_Mapper_187.c new file mode 100644 index 0000000..f460d29 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_187.c @@ -0,0 +1,293 @@ +/*===================================================================*/ +/* */ +/* Mapper 187 : Street Fighter Zero 2 97 */ +/* */ +/*===================================================================*/ + +BYTE Map187_Prg[4]; +int Map187_Chr[8]; +BYTE Map187_Bank[8]; + +BYTE Map187_ExtMode; +BYTE Map187_ChrMode; +BYTE Map187_ExtEnable; + +BYTE Map187_IRQ_Enable; +BYTE Map187_IRQ_Counter; +BYTE Map187_IRQ_Latch; +BYTE Map187_IRQ_Occur; +BYTE Map187_LastWrite; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 187 */ +/*-------------------------------------------------------------------*/ +void Map187_Init() +{ + /* Initialize Mapper */ + MapperInit = Map187_Init; + + /* Write to Mapper */ + MapperWrite = Map187_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map187_Apu; + + /* Read from APU */ + MapperReadApu = Map187_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map187_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set Registers */ + for( int i = 0; i < 8; i++ ) { + Map187_Chr[i] = 0x00; + Map187_Bank[i] = 0x00; + } + + /* Set ROM Banks */ + Map187_Prg[0] = (NesHeader.byRomSize<<1)-4; + Map187_Prg[1] = (NesHeader.byRomSize<<1)-3; + Map187_Prg[2] = (NesHeader.byRomSize<<1)-2; + Map187_Prg[3] = (NesHeader.byRomSize<<1)-1; + Map187_Set_CPU_Banks(); + + Map187_ExtMode = 0; + Map187_ChrMode = 0; + Map187_ExtEnable = 0; + + Map187_IRQ_Enable = 0; + Map187_IRQ_Counter = 0; + Map187_IRQ_Latch = 0; + + Map187_LastWrite = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 187 Write Function */ +/*-------------------------------------------------------------------*/ +void Map187_Write( WORD wAddr, BYTE byData ) +{ + Map187_LastWrite = byData; + switch( wAddr ) { + case 0x8003: + Map187_ExtEnable = 0xFF; + Map187_ChrMode = byData; + if( (byData&0xF0) == 0 ) { + Map187_Prg[2] = (NesHeader.byRomSize<<1)-2; + Map187_Set_CPU_Banks(); + } + break; + + case 0x8000: + Map187_ExtEnable = 0; + Map187_ChrMode = byData; + break; + + case 0x8001: + if( !Map187_ExtEnable ) { + switch( Map187_ChrMode & 7 ) { + case 0: + byData &= 0xFE; + Map187_Chr[4] = (int)byData+0x100; + Map187_Chr[5] = (int)byData+0x100+1; + Map187_Set_PPU_Banks(); + break; + case 1: + byData &= 0xFE; + Map187_Chr[6] = (int)byData+0x100; + Map187_Chr[7] = (int)byData+0x100+1; + Map187_Set_PPU_Banks(); + break; + case 2: + Map187_Chr[0] = byData; + Map187_Set_PPU_Banks(); + break; + case 3: + Map187_Chr[1] = byData; + Map187_Set_PPU_Banks(); + break; + case 4: + Map187_Chr[2] = byData; + Map187_Set_PPU_Banks(); + break; + case 5: + Map187_Chr[3] = byData; + Map187_Set_PPU_Banks(); + break; + case 6: + if( (Map187_ExtMode&0xA0)!=0xA0 ) { + Map187_Prg[0] = byData; + Map187_Set_CPU_Banks(); + } + break; + case 7: + if( (Map187_ExtMode&0xA0)!=0xA0 ) { + Map187_Prg[1] = byData; + Map187_Set_CPU_Banks(); + } + break; + default: + break; + } + } else { + switch( Map187_ChrMode ) { + case 0x2A: + Map187_Prg[1] = 0x0F; + break; + case 0x28: + Map187_Prg[2] = 0x17; + break; + case 0x26: + break; + default: + break; + } + Map187_Set_CPU_Banks(); + } + Map187_Bank[Map187_ChrMode&7] = byData; + break; + + case 0xA000: + if( byData & 0x01 ) { + InfoNES_Mirroring( 0 ); + } else { + InfoNES_Mirroring( 1 ); + } + break; + case 0xA001: + break; + + case 0xC000: + Map187_IRQ_Counter = byData; + Map187_IRQ_Occur = 0; + break; + case 0xC001: + Map187_IRQ_Latch = byData; + Map187_IRQ_Occur = 0; + break; + case 0xE000: + case 0xE002: + Map187_IRQ_Enable = 0; + Map187_IRQ_Occur = 0; + break; + case 0xE001: + case 0xE003: + Map187_IRQ_Enable = 1; + Map187_IRQ_Occur = 0; + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 187 Write to APU Function */ +/*-------------------------------------------------------------------*/ +void Map187_Apu( WORD wAddr, BYTE byData ) +{ + Map187_LastWrite = byData; + if( wAddr == 0x5000 ) { + Map187_ExtMode = byData; + if( byData & 0x80 ) { + if( byData & 0x20 ) { + Map187_Prg[0] = ((byData&0x1E)<<1)+0; + Map187_Prg[1] = ((byData&0x1E)<<1)+1; + Map187_Prg[2] = ((byData&0x1E)<<1)+2; + Map187_Prg[3] = ((byData&0x1E)<<1)+3; + } else { + Map187_Prg[2] = ((byData&0x1F)<<1)+0; + Map187_Prg[3] = ((byData&0x1F)<<1)+1; + } + } else { + Map187_Prg[0] = Map187_Bank[6]; + Map187_Prg[1] = Map187_Bank[7]; + Map187_Prg[2] = (NesHeader.byRomSize<<1)-2; + Map187_Prg[3] = (NesHeader.byRomSize<<1)-1; + } + Map187_Set_CPU_Banks(); + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 187 Read from APU Function */ +/*-------------------------------------------------------------------*/ +BYTE Map187_ReadApu( WORD wAddr ) +{ + switch( Map187_LastWrite&0x03 ) { + case 0: + return 0x83; + case 1: + return 0x83; + case 2: + return 0x42; + case 3: + return 0x00; + } + return 0; +} + +/*-------------------------------------------------------------------*/ +/* Mapper 187 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map187_HSync() +{ + if( ( /* PPU_Scanline >= 0 && */ PPU_Scanline <= 239) ) { + if( PPU_R1 & R1_SHOW_SCR || PPU_R1 & R1_SHOW_SP ) { + if( Map187_IRQ_Enable ) { + if( !Map187_IRQ_Counter ) { + Map187_IRQ_Counter--; + Map187_IRQ_Enable = 0; + Map187_IRQ_Occur = 0xFF; + } else { + Map187_IRQ_Counter--; + } + } + } + } + if ( Map187_IRQ_Occur ) { + IRQ_REQ; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 187 Set CPU Banks Function */ +/*-------------------------------------------------------------------*/ +void Map187_Set_CPU_Banks() +{ + ROMBANK0 = ROMPAGE(((Map187_Prg[0]<<2)+0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE(((Map187_Prg[1]<<2)+1) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE(((Map187_Prg[2]<<2)+2) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE(((Map187_Prg[3]<<2)+3) % (NesHeader.byRomSize<<1)); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 187 Set PPU Banks Function */ +/*-------------------------------------------------------------------*/ +void Map187_Set_PPU_Banks() +{ + PPUBANK[ 0 ] = VROMPAGE(((Map187_Chr[0]<<3)+0) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 1 ] = VROMPAGE(((Map187_Chr[1]<<3)+1) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 2 ] = VROMPAGE(((Map187_Chr[2]<<3)+2) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 3 ] = VROMPAGE(((Map187_Chr[3]<<3)+3) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 4 ] = VROMPAGE(((Map187_Chr[4]<<3)+4) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 5 ] = VROMPAGE(((Map187_Chr[5]<<3)+5) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 6 ] = VROMPAGE(((Map187_Chr[6]<<3)+6) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 7 ] = VROMPAGE(((Map187_Chr[7]<<3)+7) % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_188.c b/apps/plugins/infones/mapper/InfoNES_Mapper_188.c new file mode 100644 index 0000000..0202a82 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_188.c @@ -0,0 +1,95 @@ +/*===================================================================*/ +/* */ +/* Mapper 188 (Bandai) */ +/* */ +/*===================================================================*/ + +BYTE Map188_Dummy[ 0x2000 ]; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 188 */ +/*-------------------------------------------------------------------*/ +void Map188_Init() +{ + /* Initialize Mapper */ + MapperInit = Map188_Init; + + /* Write to Mapper */ + MapperWrite = Map188_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = Map188_Dummy; + + /* Set ROM Banks */ + if ( ( NesHeader.byRomSize << 1 ) > 16 ) + { + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 14 ); + ROMBANK3 = ROMPAGE( 15 ); + } else { + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + } + + /* Magic Code */ + Map188_Dummy[ 0 ] = 0x03; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 188 Write Function */ +/*-------------------------------------------------------------------*/ +void Map188_Write( WORD wAddr, BYTE byData ) +{ + /* Set ROM Banks */ + if ( byData ) + { + if ( byData & 0x10 ) + { + byData = ( byData & 0x07 ) << 1; + ROMBANK0 = ROMPAGE( ( byData + 0 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE( ( byData + 1 ) % ( NesHeader.byRomSize << 1 ) ); + } else { + byData <<= 1; + ROMBANK0 = ROMPAGE( ( byData + 16 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE( ( byData + 17 ) % ( NesHeader.byRomSize << 1 ) ); + } + } + else + { + if ( ( NesHeader.byRomSize << 1 ) == 0x10 ) + { + ROMBANK0 = ROMPAGE( 14 ); + ROMBANK1 = ROMPAGE( 15 ); + } else { + ROMBANK0 = ROMPAGE( 16 ); + ROMBANK1 = ROMPAGE( 17 ); + } + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_189.c b/apps/plugins/infones/mapper/InfoNES_Mapper_189.c new file mode 100644 index 0000000..e7f4666 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_189.c @@ -0,0 +1,185 @@ +/*===================================================================*/ +/* */ +/* Mapper 189 (Pirates) */ +/* */ +/*===================================================================*/ + +BYTE Map189_Regs[ 1 ]; +BYTE Map189_IRQ_Cnt; +BYTE Map189_IRQ_Latch; +BYTE Map189_IRQ_Enable; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 189 */ +/*-------------------------------------------------------------------*/ +void Map189_Init() +{ + /* Initialize Mapper */ + MapperInit = Map189_Init; + + /* Write to Mapper */ + MapperWrite = Map189_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map189_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map189_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( int nPage = 0; nPage < 8; ++nPage ) + { + PPUBANK[ nPage ] = VROMPAGE( nPage ); + } + InfoNES_SetupChr(); + } + + /* Initialize IRQ registers */ + Map189_IRQ_Cnt = 0; + Map189_IRQ_Latch = 0; + Map189_IRQ_Enable = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 189 Write to Apu Function */ +/*-------------------------------------------------------------------*/ +void Map189_Apu( WORD wAddr, BYTE byData ) +{ + if ( wAddr >= 0x4100 && wAddr <= 0x41FF ) + { + byData = ( byData & 0x30 ) >> 4; + ROMBANK0 = ROMPAGE( ( byData * 4 + 0 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE( ( byData * 4 + 1 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMPAGE( ( byData * 4 + 2 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK3 = ROMPAGE( ( byData * 4 + 3 ) % ( NesHeader.byRomSize << 1 ) ); + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 189 Write Function */ +/*-------------------------------------------------------------------*/ +void Map189_Write( WORD wAddr, BYTE byData ) +{ + /* Set ROM Banks */ + switch( wAddr ) + { + case 0x8000: + Map189_Regs[0] = byData; + break; + + case 0x8001: + switch( Map189_Regs[0] ) + { + case 0x40: + PPUBANK[ 0 ] = VROMPAGE( ( byData + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( ( byData + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0x41: + PPUBANK[ 2 ] = VROMPAGE( ( byData + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( ( byData + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0x42: + PPUBANK[ 4 ] = VROMPAGE( byData % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0x43: + PPUBANK[ 5 ] = VROMPAGE( byData % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0x44: + PPUBANK[ 6 ] = VROMPAGE( byData % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0x45: + PPUBANK[ 7 ] = VROMPAGE( byData % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + + case 0x46: + ROMBANK2 = ROMPAGE( byData % ( NesHeader.byRomSize << 1 ) ); + break; + + case 0x47: + ROMBANK1 = ROMPAGE( byData % ( NesHeader.byRomSize << 1 ) ); + break; + } + break; + + case 0xC000: + Map189_IRQ_Cnt = byData; + break; + + case 0xC001: + Map189_IRQ_Latch = byData; + break; + + case 0xE000: + Map189_IRQ_Enable = 0; + break; + + case 0xE001: + Map189_IRQ_Enable = 1; + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 189 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map189_HSync() +{ +/* + * Callback at HSync + * + */ + if ( Map189_IRQ_Enable ) + { + if ( /* 0 <= PPU_Scanline && */ PPU_Scanline <= 239 ) + { + if ( PPU_R1 & R1_SHOW_SCR || PPU_R1 & R1_SHOW_SP ) + { + if ( !( --Map189_IRQ_Cnt ) ) + { + Map189_IRQ_Cnt = Map189_IRQ_Latch; + IRQ_REQ; + } + } + } + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_191.c b/apps/plugins/infones/mapper/InfoNES_Mapper_191.c new file mode 100644 index 0000000..72f27b1 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_191.c @@ -0,0 +1,141 @@ +/*===================================================================*/ +/* */ +/* Mapper 191 : SACHEN Super Cartridge Xin1 (Ver.1-9), Q-BOY Support */ +/* */ +/*===================================================================*/ + +BYTE Map191_Reg[8]; +BYTE Map191_Prg0, Map191_Prg1; +BYTE Map191_Chr0, Map191_Chr1, Map191_Chr2, Map191_Chr3; +BYTE Map191_Highbank; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 191 */ +/*-------------------------------------------------------------------*/ +void Map191_Init() +{ + /* Initialize Mapper */ + MapperInit = Map191_Init; + + /* Write to Mapper */ + MapperWrite = Map0_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map191_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Initialize Registers */ + for( int i = 0; i < 8; i++ ) { + Map191_Reg[i] = 0x00; + } + + /* Set ROM Banks */ + Map191_Prg0 = 0; + // Map191_Prg1 = 1; + Map191_Set_CPU_Banks(); + + /* Set PPU Banks */ + Map191_Chr0 = 0; + Map191_Chr1 = 0; + Map191_Chr2 = 0; + Map191_Chr3 = 0; + Map191_Highbank = 0; + Map191_Set_PPU_Banks(); + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 191 Write to APU Function */ +/*-------------------------------------------------------------------*/ +void Map191_Apu( WORD wAddr, BYTE byData ) +{ + switch( wAddr ) { + case 0x4100: + Map191_Reg[0]=byData; + break; + case 0x4101: + Map191_Reg[1]=byData; + switch( Map191_Reg[0] ) { + case 0: + Map191_Chr0=byData&7; + Map191_Set_PPU_Banks(); + break; + case 1: + Map191_Chr1=byData&7; + Map191_Set_PPU_Banks(); + break; + case 2: + Map191_Chr2=byData&7; + Map191_Set_PPU_Banks(); + break; + case 3: + Map191_Chr3=byData&7; + Map191_Set_PPU_Banks(); + break; + case 4: + Map191_Highbank=byData&7; + Map191_Set_PPU_Banks(); + break; + case 5: + Map191_Prg0=byData&7; + Map191_Set_CPU_Banks(); + break; + case 7: + if( byData & 0x02 ) InfoNES_Mirroring( 0 ); + else InfoNES_Mirroring( 1 ); + break; + } + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 191 Set CPU Banks Function */ +/*-------------------------------------------------------------------*/ +void Map191_Set_CPU_Banks() +{ + ROMBANK0 = ROMPAGE( ((Map191_Prg0<<2) + 0 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE( ((Map191_Prg0<<2) + 1 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMPAGE( ((Map191_Prg0<<2) + 2 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK3 = ROMPAGE( ((Map191_Prg0<<2) + 3 ) % ( NesHeader.byRomSize << 1 ) ); +}; + +/*-------------------------------------------------------------------*/ +/* Mapper 191 Set PPU Banks Function */ +/*-------------------------------------------------------------------*/ +void Map191_Set_PPU_Banks() +{ + if ( NesHeader.byVRomSize > 0 ) { + PPUBANK[ 0 ] = VROMPAGE( ((((Map191_Highbank<<3)+Map191_Chr0)<<2)+0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( ((((Map191_Highbank<<3)+Map191_Chr0)<<2)+1 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( ((((Map191_Highbank<<3)+Map191_Chr1)<<2)+2 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( ((((Map191_Highbank<<3)+Map191_Chr1)<<2)+3 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 4 ] = VROMPAGE( ((((Map191_Highbank<<3)+Map191_Chr2)<<2)+0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( ((((Map191_Highbank<<3)+Map191_Chr2)<<2)+1 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE( ((((Map191_Highbank<<3)+Map191_Chr3)<<2)+2 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( ((((Map191_Highbank<<3)+Map191_Chr3)<<2)+3 ) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_193.c b/apps/plugins/infones/mapper/InfoNES_Mapper_193.c new file mode 100644 index 0000000..094ce7f --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_193.c @@ -0,0 +1,89 @@ +/*===================================================================*/ +/* */ +/* Mapper 193 : MEGA SOFT (NTDEC) : Fighting Hero */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 193 */ +/*-------------------------------------------------------------------*/ +void Map193_Init() +{ + /* Initialize Mapper */ + MapperInit = Map193_Init; + + /* Write to Mapper */ + MapperWrite = Map0_Write; + + /* Write to SRAM */ + MapperSram = Map193_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( (NesHeader.byRomSize<<1) - 4 ); + ROMBANK1 = ROMPAGE( (NesHeader.byRomSize<<1) - 3 ); + ROMBANK2 = ROMPAGE( (NesHeader.byRomSize<<1) - 2 ); + ROMBANK3 = ROMPAGE( (NesHeader.byRomSize<<1) - 1 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 193 Write to SRAM Function */ +/*-------------------------------------------------------------------*/ +void Map193_Sram( WORD wAddr, BYTE byData ) +{ + switch( wAddr ) { + case 0x6000: + PPUBANK[ 0 ] = VROMPAGE( ((byData&0xfc) + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( ((byData&0xfc) + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( ((byData&0xfc) + 2 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( ((byData&0xfc) + 3 ) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + case 0x6001: + PPUBANK[ 4 ] = VROMPAGE( ( byData + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( ( byData + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + case 0x6002: + PPUBANK[ 6 ] = VROMPAGE( ( byData + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( ( byData + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + case 0x6003: + ROMBANK0 = ROMPAGE( ((byData<<2) + 0 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE( ((byData<<2) + 1 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMPAGE( ((byData<<2) + 2 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK3 = ROMPAGE( ((byData<<2) + 3 ) % ( NesHeader.byRomSize << 1 ) ); + break; + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_194.c b/apps/plugins/infones/mapper/InfoNES_Mapper_194.c new file mode 100644 index 0000000..4bffdc7 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_194.c @@ -0,0 +1,58 @@ +/*===================================================================*/ +/* */ +/* Mapper 194 : Meikyuu Jiin Dababa */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 194 */ +/*-------------------------------------------------------------------*/ +void Map194_Init() +{ + /* Initialize Mapper */ + MapperInit = Map194_Init; + + /* Write to Mapper */ + MapperWrite = Map194_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( (NesHeader.byRomSize<<1) - 4 ); + ROMBANK1 = ROMPAGE( (NesHeader.byRomSize<<1) - 3 ); + ROMBANK2 = ROMPAGE( (NesHeader.byRomSize<<1) - 2 ); + ROMBANK3 = ROMPAGE( (NesHeader.byRomSize<<1) - 1 ); + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 194 Write Function */ +/*-------------------------------------------------------------------*/ +void Map194_Write( WORD wAddr, BYTE byData ) +{ + SRAMBANK = ROMPAGE( byData % ( NesHeader.byRomSize << 1 ) ); +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_200.c b/apps/plugins/infones/mapper/InfoNES_Mapper_200.c new file mode 100644 index 0000000..651cc35 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_200.c @@ -0,0 +1,86 @@ +/*===================================================================*/ +/* */ +/* Mapper 200 (1200-in-1) */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 200 */ +/*-------------------------------------------------------------------*/ +void Map200_Init() +{ + /* Initialize Mapper */ + MapperInit = Map200_Init; + + /* Write to Mapper */ + MapperWrite = Map200_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 0 ); + ROMBANK3 = ROMPAGE( 1 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 200 Write Function */ +/*-------------------------------------------------------------------*/ +void Map200_Write( WORD wAddr, BYTE byData ) +{ + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE((((wAddr&0x07)<<1)+0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE((((wAddr&0x07)<<1)+1) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE((((wAddr&0x07)<<1)+0) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE((((wAddr&0x07)<<1)+1) % (NesHeader.byRomSize<<1)); + + /* Set PPU Banks */ + PPUBANK[0] = VROMPAGE((((wAddr&0x07)<<3)+0) % (NesHeader.byVRomSize<<3)); + PPUBANK[1] = VROMPAGE((((wAddr&0x07)<<3)+1) % (NesHeader.byVRomSize<<3)); + PPUBANK[2] = VROMPAGE((((wAddr&0x07)<<3)+2) % (NesHeader.byVRomSize<<3)); + PPUBANK[3] = VROMPAGE((((wAddr&0x07)<<3)+3) % (NesHeader.byVRomSize<<3)); + PPUBANK[4] = VROMPAGE((((wAddr&0x07)<<3)+4) % (NesHeader.byVRomSize<<3)); + PPUBANK[5] = VROMPAGE((((wAddr&0x07)<<3)+5) % (NesHeader.byVRomSize<<3)); + PPUBANK[6] = VROMPAGE((((wAddr&0x07)<<3)+6) % (NesHeader.byVRomSize<<3)); + PPUBANK[7] = VROMPAGE((((wAddr&0x07)<<3)+7) % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + + if ( wAddr & 0x01 ) { + InfoNES_Mirroring( 1 ); + } else { + InfoNES_Mirroring( 0 ); + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_201.c b/apps/plugins/infones/mapper/InfoNES_Mapper_201.c new file mode 100644 index 0000000..10cdafa --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_201.c @@ -0,0 +1,85 @@ +/*===================================================================*/ +/* */ +/* Mapper 201 (21-in-1) */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 201 */ +/*-------------------------------------------------------------------*/ +void Map201_Init() +{ + /* Initialize Mapper */ + MapperInit = Map201_Init; + + /* Write to Mapper */ + MapperWrite = Map201_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 0 ); + ROMBANK3 = ROMPAGE( 1 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 201 Write Function */ +/*-------------------------------------------------------------------*/ +void Map201_Write( WORD wAddr, BYTE byData ) +{ + BYTE byBank = (BYTE)wAddr & 0x03; + if (!(wAddr&0x08) ) + byBank = 0; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE(((byBank<<2)+0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE(((byBank<<2)+1) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE(((byBank<<2)+2) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE(((byBank<<2)+3) % (NesHeader.byRomSize<<1)); + + /* Set PPU Banks */ + PPUBANK[0] = VROMPAGE(((byBank<<3)+0) % (NesHeader.byVRomSize<<3)); + PPUBANK[1] = VROMPAGE(((byBank<<3)+1) % (NesHeader.byVRomSize<<3)); + PPUBANK[2] = VROMPAGE(((byBank<<3)+2) % (NesHeader.byVRomSize<<3)); + PPUBANK[3] = VROMPAGE(((byBank<<3)+3) % (NesHeader.byVRomSize<<3)); + PPUBANK[4] = VROMPAGE(((byBank<<3)+4) % (NesHeader.byVRomSize<<3)); + PPUBANK[5] = VROMPAGE(((byBank<<3)+5) % (NesHeader.byVRomSize<<3)); + PPUBANK[6] = VROMPAGE(((byBank<<3)+6) % (NesHeader.byVRomSize<<3)); + PPUBANK[7] = VROMPAGE(((byBank<<3)+7) % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); +} + diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_202.c b/apps/plugins/infones/mapper/InfoNES_Mapper_202.c new file mode 100644 index 0000000..cb33811 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_202.c @@ -0,0 +1,111 @@ +/*===================================================================*/ +/* */ +/* Mapper 202 (150-in-1) */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 202 */ +/*-------------------------------------------------------------------*/ +void Map202_Init() +{ + /* Initialize Mapper */ + MapperInit = Map202_Init; + + /* Write to Mapper */ + MapperWrite = Map202_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map202_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 12 ); + ROMBANK1 = ROMPAGE( 13 ); + ROMBANK2 = ROMPAGE( 14 ); + ROMBANK3 = ROMPAGE( 15 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 202 Write to APU Function */ +/*-------------------------------------------------------------------*/ +void Map202_Apu( WORD wAddr, BYTE byData ) +{ + Map202_WriteSub( wAddr, byData ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 202 Write Function */ +/*-------------------------------------------------------------------*/ +void Map202_Write( WORD wAddr, BYTE byData ) +{ + Map202_WriteSub( wAddr, byData ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 202 Write Sub Function */ +/*-------------------------------------------------------------------*/ +void Map202_WriteSub( WORD wAddr, BYTE byData ) +{ + int bank = (wAddr>>1) & 0x07; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE(((bank<<1)+0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE(((bank<<1)+1) % (NesHeader.byRomSize<<1)); + + if ((wAddr&0x0c) == 0x0c) { + ROMBANK2 = ROMPAGE((((bank+1)<<1)+0) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE((((bank+1)<<1)+1) % (NesHeader.byRomSize<<1)); + } else { + ROMBANK2 = ROMPAGE((((bank+0)<<1)+0) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE((((bank+0)<<1)+1) % (NesHeader.byRomSize<<1)); + } + + /* Set PPU Banks */ + PPUBANK[0] = VROMPAGE(((bank<<3)+0) % (NesHeader.byVRomSize<<3)); + PPUBANK[1] = VROMPAGE(((bank<<3)+1) % (NesHeader.byVRomSize<<3)); + PPUBANK[2] = VROMPAGE(((bank<<3)+2) % (NesHeader.byVRomSize<<3)); + PPUBANK[3] = VROMPAGE(((bank<<3)+3) % (NesHeader.byVRomSize<<3)); + PPUBANK[4] = VROMPAGE(((bank<<3)+4) % (NesHeader.byVRomSize<<3)); + PPUBANK[5] = VROMPAGE(((bank<<3)+5) % (NesHeader.byVRomSize<<3)); + PPUBANK[6] = VROMPAGE(((bank<<3)+6) % (NesHeader.byVRomSize<<3)); + PPUBANK[7] = VROMPAGE(((bank<<3)+7) % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + + if ( wAddr & 0x01 ) { + InfoNES_Mirroring( 0 ); + } else { + InfoNES_Mirroring( 1 ); + } +} + diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_222.c b/apps/plugins/infones/mapper/InfoNES_Mapper_222.c new file mode 100644 index 0000000..4ddf619 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_222.c @@ -0,0 +1,107 @@ +/*===================================================================*/ +/* */ +/* Mapper 222 */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 222 */ +/*-------------------------------------------------------------------*/ +void Map222_Init() +{ + /* Initialize Mapper */ + MapperInit = Map222_Init; + + /* Write to Mapper */ + MapperWrite = Map222_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set Mirroring */ + InfoNES_Mirroring( 1 ); + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 222 Write Function */ +/*-------------------------------------------------------------------*/ +void Map222_Write( WORD wAddr, BYTE byData ) +{ + switch( wAddr & 0xF003 ) { + case 0x8000: + ROMBANK0 = ROMPAGE( byData % ( NesHeader.byRomSize << 1 ) ); + break; + case 0xA000: + ROMBANK1 = ROMPAGE( byData % ( NesHeader.byRomSize << 1 ) ); + break; + case 0xB000: + PPUBANK[ 0 ] = VROMPAGE( byData % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + case 0xB002: + PPUBANK[ 1 ] = VROMPAGE( byData % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + case 0xC000: + PPUBANK[ 2 ] = VROMPAGE( byData % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + case 0xC002: + PPUBANK[ 3 ] = VROMPAGE( byData % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + case 0xD000: + PPUBANK[ 4 ] = VROMPAGE( byData % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + case 0xD002: + PPUBANK[ 5 ] = VROMPAGE( byData % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + case 0xE000: + PPUBANK[ 6 ] = VROMPAGE( byData % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + case 0xE002: + PPUBANK[ 7 ] = VROMPAGE( byData % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + break; + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_225.c b/apps/plugins/infones/mapper/InfoNES_Mapper_225.c new file mode 100644 index 0000000..2eea5d5 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_225.c @@ -0,0 +1,102 @@ +/*===================================================================*/ +/* */ +/* Mapper 225 : 72-in-1 */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 225 */ +/*-------------------------------------------------------------------*/ +void Map225_Init() +{ + /* Initialize Mapper */ + MapperInit = Map225_Init; + + /* Write to Mapper */ + MapperWrite = Map225_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 225 Write Function */ +/*-------------------------------------------------------------------*/ +void Map225_Write( WORD wAddr, BYTE byData ) +{ + BYTE byPrgBank = (wAddr & 0x0F80) >> 7; + BYTE byChrBank = wAddr & 0x003F; + + PPUBANK[ 0 ] = VROMPAGE(((byChrBank<<3)+0) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE(((byChrBank<<3)+1) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE(((byChrBank<<3)+2) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE(((byChrBank<<3)+3) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 4 ] = VROMPAGE(((byChrBank<<3)+4) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE(((byChrBank<<3)+5) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE(((byChrBank<<3)+6) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE(((byChrBank<<3)+7) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + + if( wAddr & 0x2000 ) { + InfoNES_Mirroring( 0 ); + } else { + InfoNES_Mirroring( 1 ); + } + + if( wAddr & 0x1000 ) { + // 16KBbank + if( wAddr & 0x0040 ) { + ROMBANK0 = ROMPAGE(((byPrgBank<<2)+2) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE(((byPrgBank<<2)+3) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMPAGE(((byPrgBank<<2)+2) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK3 = ROMPAGE(((byPrgBank<<2)+3) % ( NesHeader.byRomSize << 1 ) ); + } else { + ROMBANK0 = ROMPAGE(((byPrgBank<<2)+0) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE(((byPrgBank<<2)+1) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMPAGE(((byPrgBank<<2)+0) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK3 = ROMPAGE(((byPrgBank<<2)+1) % ( NesHeader.byRomSize << 1 ) ); + } + } else { + ROMBANK0 = ROMPAGE(((byPrgBank<<2)+0) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE(((byPrgBank<<2)+1) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMPAGE(((byPrgBank<<2)+2) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK3 = ROMPAGE(((byPrgBank<<2)+3) % ( NesHeader.byRomSize << 1 ) ); + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_226.c b/apps/plugins/infones/mapper/InfoNES_Mapper_226.c new file mode 100644 index 0000000..06dba38 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_226.c @@ -0,0 +1,95 @@ +/*===================================================================*/ +/* */ +/* Mapper 226 : 76-in-1 */ +/* */ +/*===================================================================*/ + +BYTE Map226_Reg[2]; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 226 */ +/*-------------------------------------------------------------------*/ +void Map226_Init() +{ + /* Initialize Mapper */ + MapperInit = Map226_Init; + + /* Write to Mapper */ + MapperWrite = Map226_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + + /* Initialize Registers */ + Map226_Reg[0] = 0; + Map226_Reg[1] = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 226 Write Function */ +/*-------------------------------------------------------------------*/ +void Map226_Write( WORD wAddr, BYTE byData ) +{ + if( wAddr & 0x0001 ) { + Map226_Reg[1] = byData; + } else { + Map226_Reg[0] = byData; + } + + if( Map226_Reg[0] & 0x40 ) { + InfoNES_Mirroring( 1 ); + } else { + InfoNES_Mirroring( 0 ); + } + + BYTE byBank = ((Map226_Reg[0]&0x1E)>>1)|((Map226_Reg[0]&0x80)>>3)|((Map226_Reg[1]&0x01)<<5); + + if( Map226_Reg[0] & 0x20 ) { + if( Map226_Reg[0] & 0x01 ) { + ROMBANK0 = ROMPAGE(((byBank<<2)+2) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE(((byBank<<2)+3) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE(((byBank<<2)+2) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE(((byBank<<2)+3) % (NesHeader.byRomSize<<1)); + } else { + ROMBANK0 = ROMPAGE(((byBank<<2)+0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE(((byBank<<2)+1) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE(((byBank<<2)+0) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE(((byBank<<2)+1) % (NesHeader.byRomSize<<1)); + } + } else { + ROMBANK0 = ROMPAGE(((byBank<<2)+0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE(((byBank<<2)+1) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE(((byBank<<2)+2) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE(((byBank<<2)+3) % (NesHeader.byRomSize<<1)); + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_227.c b/apps/plugins/infones/mapper/InfoNES_Mapper_227.c new file mode 100644 index 0000000..37305f9 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_227.c @@ -0,0 +1,92 @@ +/*===================================================================*/ +/* */ +/* Mapper 227 : 1200-in-1 */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 227 */ +/*-------------------------------------------------------------------*/ +void Map227_Init() +{ + /* Initialize Mapper */ + MapperInit = Map227_Init; + + /* Write to Mapper */ + MapperWrite = Map227_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 0 ); + ROMBANK3 = ROMPAGE( 1 ); + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 227 Write Function */ +/*-------------------------------------------------------------------*/ +void Map227_Write( WORD wAddr, BYTE byData ) +{ + BYTE byBank = ((wAddr&0x0100)>>4)|((wAddr&0x0078)>>3); + + if( wAddr & 0x0001 ) { + ROMBANK0 = ROMPAGE(((byBank<<2)+0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE(((byBank<<2)+1) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE(((byBank<<2)+2) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE(((byBank<<2)+3) % (NesHeader.byRomSize<<1)); + } else { + if( wAddr & 0x0004 ) { + ROMBANK0 = ROMPAGE(((byBank<<2)+2) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE(((byBank<<2)+3) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE(((byBank<<2)+2) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE(((byBank<<2)+3) % (NesHeader.byRomSize<<1)); + } else { + ROMBANK0 = ROMPAGE(((byBank<<2)+0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE(((byBank<<2)+1) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE(((byBank<<2)+0) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE(((byBank<<2)+1) % (NesHeader.byRomSize<<1)); + } + } + + if( !(wAddr & 0x0080) ) { + if( wAddr & 0x0200 ) { + ROMBANK2 = ROMPAGE((((byBank&0x1C)<<2)+14) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE((((byBank&0x1C)<<2)+15) % (NesHeader.byRomSize<<1)); + } else { + ROMBANK2 = ROMPAGE((((byBank&0x1C)<<2)+0) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE((((byBank&0x1C)<<2)+1) % (NesHeader.byRomSize<<1)); + } + } + if( wAddr & 0x0002 ) { + InfoNES_Mirroring( 0 ); + } else { + InfoNES_Mirroring( 1 ); + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_228.c b/apps/plugins/infones/mapper/InfoNES_Mapper_228.c new file mode 100644 index 0000000..80854b5 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_228.c @@ -0,0 +1,108 @@ +/*===================================================================*/ +/* */ +/* Mapper 228 : Action 52 */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 228 */ +/*-------------------------------------------------------------------*/ +void Map228_Init() +{ + /* Initialize Mapper */ + MapperInit = Map228_Init; + + /* Write to Mapper */ + MapperWrite = Map228_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 228 Write Function */ +/*-------------------------------------------------------------------*/ +void Map228_Write( WORD wAddr, BYTE byData ) +{ + BYTE byPrg = (wAddr&0x0780)>>7; + + switch( (wAddr&0x1800)>>11 ) { + case 1: + byPrg |= 0x10; + break; + case 3: + byPrg |= 0x20; + break; + } + + if( wAddr & 0x0020 ) { + byPrg <<= 1; + if( wAddr & 0x0040 ) { + byPrg++; + } + ROMBANK0 = ROMPAGE(((byPrg<<2)+0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE(((byPrg<<2)+1) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE(((byPrg<<2)+0) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE(((byPrg<<2)+1) % (NesHeader.byRomSize<<1)); + } else { + ROMBANK0 = ROMPAGE(((byPrg<<2)+0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE(((byPrg<<2)+1) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE(((byPrg<<2)+2) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE(((byPrg<<2)+3) % (NesHeader.byRomSize<<1)); + } + + BYTE byChr = ((wAddr&0x000F)<<2)|(byData&0x03); + + PPUBANK[ 0 ] = VROMPAGE(((byChr<<3)+0) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 1 ] = VROMPAGE(((byChr<<3)+1) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 2 ] = VROMPAGE(((byChr<<3)+2) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 3 ] = VROMPAGE(((byChr<<3)+3) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 4 ] = VROMPAGE(((byChr<<3)+4) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 5 ] = VROMPAGE(((byChr<<3)+5) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 6 ] = VROMPAGE(((byChr<<3)+6) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 7 ] = VROMPAGE(((byChr<<3)+7) % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + + if( wAddr & 0x2000 ) { + InfoNES_Mirroring( 0 ); + } else { + InfoNES_Mirroring( 1 ); + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_229.c b/apps/plugins/infones/mapper/InfoNES_Mapper_229.c new file mode 100644 index 0000000..bfe1ec0 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_229.c @@ -0,0 +1,105 @@ +/*===================================================================*/ +/* */ +/* Mapper 229 : 31-in-1 */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 229 */ +/*-------------------------------------------------------------------*/ +void Map229_Init() +{ + /* Initialize Mapper */ + MapperInit = Map229_Init; + + /* Write to Mapper */ + MapperWrite = Map229_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 229 Write Function */ +/*-------------------------------------------------------------------*/ +void Map229_Write( WORD wAddr, BYTE byData ) +{ + if( wAddr & 0x001E ) { + BYTE byPrg = wAddr&0x001F; + + ROMBANK0 = ROMPAGE(((byPrg<<1)+0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE(((byPrg<<1)+1) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE(((byPrg<<1)+0) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE(((byPrg<<1)+1) % (NesHeader.byRomSize<<1)); + + BYTE byChr = wAddr & 0x0FFF; + + PPUBANK[ 0 ] = VROMPAGE(((byChr<<3) + 0) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 1 ] = VROMPAGE(((byChr<<3) + 1) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 2 ] = VROMPAGE(((byChr<<3) + 2) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 3 ] = VROMPAGE(((byChr<<3) + 3) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 4 ] = VROMPAGE(((byChr<<3) + 4) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 5 ] = VROMPAGE(((byChr<<3) + 5) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 6 ] = VROMPAGE(((byChr<<3) + 6) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 7 ] = VROMPAGE(((byChr<<3) + 7) % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + } else { + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + + PPUBANK[ 0 ] = VROMPAGE( 0 ); + PPUBANK[ 1 ] = VROMPAGE( 1 ); + PPUBANK[ 2 ] = VROMPAGE( 2 ); + PPUBANK[ 3 ] = VROMPAGE( 3 ); + PPUBANK[ 4 ] = VROMPAGE( 4 ); + PPUBANK[ 5 ] = VROMPAGE( 5 ); + PPUBANK[ 6 ] = VROMPAGE( 6 ); + PPUBANK[ 7 ] = VROMPAGE( 7 ); + InfoNES_SetupChr(); + } + + if( wAddr & 0x0020 ) { + InfoNES_Mirroring( 0 ); + } else { + InfoNES_Mirroring( 1 ); + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_230.c b/apps/plugins/infones/mapper/InfoNES_Mapper_230.c new file mode 100644 index 0000000..6a242c2 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_230.c @@ -0,0 +1,94 @@ +/*===================================================================*/ +/* */ +/* Mapper 230 : 22-in-1 */ +/* */ +/*===================================================================*/ + +BYTE Map230_RomSw; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 230 */ +/*-------------------------------------------------------------------*/ +void Map230_Init() +{ + /* Initialize Mapper */ + MapperInit = Map230_Init; + + /* Write to Mapper */ + MapperWrite = Map230_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Initialize Registers */ + if( Map230_RomSw ) { + Map230_RomSw = 0; + } else { + Map230_RomSw = 1; + } + + /* Set ROM Banks */ + if( Map230_RomSw ) { + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 14 ); + ROMBANK3 = ROMPAGE( 15 ); + } else { + ROMBANK0 = ROMPAGE( 16 ); + ROMBANK1 = ROMPAGE( 17 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 230 Write Function */ +/*-------------------------------------------------------------------*/ +void Map230_Write( WORD wAddr, BYTE byData ) +{ + if( Map230_RomSw ) { + ROMBANK0 = ROMPAGE((((byData&0x07)<<1)+0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE((((byData&0x07)<<1)+1) % (NesHeader.byRomSize<<1)); + } else { + if( byData & 0x20 ) { + ROMBANK0 = ROMPAGE((((byData&0x1F)<<1)+16) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE((((byData&0x1F)<<1)+17) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE((((byData&0x1F)<<1)+16) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE((((byData&0x1F)<<1)+17) % (NesHeader.byRomSize<<1)); + } else { + ROMBANK0 = ROMPAGE((((byData&0x1E)<<1)+16) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE((((byData&0x1E)<<1)+17) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE((((byData&0x1E)<<1)+18) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE((((byData&0x1E)<<1)+19) % (NesHeader.byRomSize<<1)); + } + if( byData & 0x40 ) { + InfoNES_Mirroring( 1 ); + } else { + InfoNES_Mirroring( 0 ); + } + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_231.c b/apps/plugins/infones/mapper/InfoNES_Mapper_231.c new file mode 100644 index 0000000..33cd591 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_231.c @@ -0,0 +1,83 @@ +/*===================================================================*/ +/* */ +/* Mapper 231 : 20-in-1 */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 231 */ +/*-------------------------------------------------------------------*/ +void Map231_Init() +{ + /* Initialize Mapper */ + MapperInit = Map231_Init; + + /* Write to Mapper */ + MapperWrite = Map231_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 231 Write Function */ +/*-------------------------------------------------------------------*/ +void Map231_Write( WORD wAddr, BYTE byData ) +{ + BYTE byBank = wAddr & 0x1E; + + if( wAddr & 0x0020 ) { + ROMBANK0 = ROMPAGE(((byBank<<1)+0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE(((byBank<<1)+1) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE(((byBank<<1)+2) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE(((byBank<<1)+3) % (NesHeader.byRomSize<<1)); + } else { + ROMBANK0 = ROMPAGE(((byBank<<1)+0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE(((byBank<<1)+1) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE(((byBank<<1)+0) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE(((byBank<<1)+1) % (NesHeader.byRomSize<<1)); + } + + if( wAddr & 0x0080 ) { + InfoNES_Mirroring( 0 ); + } else { + InfoNES_Mirroring( 1 ); + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_232.c b/apps/plugins/infones/mapper/InfoNES_Mapper_232.c new file mode 100644 index 0000000..bb73359 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_232.c @@ -0,0 +1,73 @@ +/*===================================================================*/ +/* */ +/* Mapper 232 : Quattro Games */ +/* */ +/*===================================================================*/ + +BYTE Map232_Regs[2]; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 232 */ +/*-------------------------------------------------------------------*/ +void Map232_Init() +{ + /* Initialize Mapper */ + MapperInit = Map232_Init; + + /* Write to Mapper */ + MapperWrite = Map232_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Initialize Registers */ + Map232_Regs[0] = 0x0C; + Map232_Regs[1] = 0x00; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 232 Write Function */ +/*-------------------------------------------------------------------*/ +void Map232_Write( WORD wAddr, BYTE byData ) +{ + if ( wAddr == 0x9000 ) { + Map232_Regs[0] = (byData & 0x18)>>1; + } else if ( 0xA000 <= wAddr /* && wAddr <= 0xFFFF */ ) { + Map232_Regs[1] = byData & 0x03; + } + + ROMBANK0= ROMPAGE((((Map232_Regs[0]|Map232_Regs[1])<<1)+0) % (NesHeader.byRomSize<<1)); + ROMBANK1= ROMPAGE((((Map232_Regs[0]|Map232_Regs[1])<<1)+1) % (NesHeader.byRomSize<<1)); + ROMBANK2= ROMPAGE((((Map232_Regs[0]|0x03)<<1)+0) % (NesHeader.byRomSize<<1)); + ROMBANK3= ROMPAGE((((Map232_Regs[0]|0x03)<<1)+1) % (NesHeader.byRomSize<<1)); +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_233.c b/apps/plugins/infones/mapper/InfoNES_Mapper_233.c new file mode 100644 index 0000000..b67beda --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_233.c @@ -0,0 +1,78 @@ +/*===================================================================*/ +/* */ +/* Mapper 233 : 42-in-1 */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 233 */ +/*-------------------------------------------------------------------*/ +void Map233_Init() +{ + /* Initialize Mapper */ + MapperInit = Map233_Init; + + /* Write to Mapper */ + MapperWrite = Map233_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 233 Write Function */ +/*-------------------------------------------------------------------*/ +void Map233_Write( WORD wAddr, BYTE byData ) +{ + if( byData & 0x20 ) { + ROMBANK0 = ROMPAGE((((byData&0x1F)<<1)+0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE((((byData&0x1F)<<1)+1) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE((((byData&0x1F)<<1)+0) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE((((byData&0x1F)<<1)+1) % (NesHeader.byRomSize<<1)); + } else { + ROMBANK0 = ROMPAGE((((byData&0x1E)<<1)+0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE((((byData&0x1E)<<1)+1) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE((((byData&0x1E)<<1)+2) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE((((byData&0x1E)<<1)+3) % (NesHeader.byRomSize<<1)); + } + + if( (byData&0xC0) == 0x00 ) { + InfoNES_Mirroring( 5 ); + } else if( (byData&0xC0) == 0x40 ) { + InfoNES_Mirroring( 1 ); + } else if( (byData&0xC0) == 0x80 ) { + InfoNES_Mirroring( 0 ); + } else { + InfoNES_Mirroring( 2 ); + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_234.c b/apps/plugins/infones/mapper/InfoNES_Mapper_234.c new file mode 100644 index 0000000..490851c --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_234.c @@ -0,0 +1,114 @@ +/*===================================================================*/ +/* */ +/* Mapper 234 : Maxi-15 */ +/* */ +/*===================================================================*/ + +BYTE Map234_Reg[2]; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 234 */ +/*-------------------------------------------------------------------*/ +void Map234_Init() +{ + /* Initialize Mapper */ + MapperInit = Map234_Init; + + /* Write to Mapper */ + MapperWrite = Map234_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + + /* Set Registers */ + Map234_Reg[0] = 0; + Map234_Reg[1] = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 234 Write Function */ +/*-------------------------------------------------------------------*/ +void Map234_Write( WORD wAddr, BYTE byData ) +{ + if( wAddr >= 0xFF80 && wAddr <= 0xFF9F ) { + if( !Map234_Reg[0] ) { + Map234_Reg[0] = byData; + Map234_Set_Banks(); + } + } + + if( wAddr >= 0xFFE8 && wAddr <= 0xFFF7 ) { + Map234_Reg[1] = byData; + Map234_Set_Banks(); + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 234 Set Banks Function */ +/*-------------------------------------------------------------------*/ +void Map234_Set_Banks() +{ + BYTE byPrg, byChr; + + if( Map234_Reg[0] & 0x80 ) { + InfoNES_Mirroring( 0 ); + } else { + InfoNES_Mirroring( 1 ); + } + if( Map234_Reg[0] & 0x40 ) { + byPrg = (Map234_Reg[0]&0x0E)|(Map234_Reg[1]&0x01); + byChr = ((Map234_Reg[0]&0x0E)<<2)|((Map234_Reg[1]>>4)&0x07); + } else { + byPrg = Map234_Reg[0]&0x0F; + byChr = ((Map234_Reg[0]&0x0F)<<2)|((Map234_Reg[1]>>4)&0x03); + } + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE(((byPrg<<2)+0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE(((byPrg<<2)+1) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE(((byPrg<<2)+2) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE(((byPrg<<2)+3) % (NesHeader.byRomSize<<1)); + + /* Set PPU Banks */ + PPUBANK[ 0 ] = VROMPAGE(((byChr<<3)+0) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 1 ] = VROMPAGE(((byChr<<3)+1) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 2 ] = VROMPAGE(((byChr<<3)+2) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 3 ] = VROMPAGE(((byChr<<3)+3) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 4 ] = VROMPAGE(((byChr<<3)+4) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 5 ] = VROMPAGE(((byChr<<3)+5) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 6 ] = VROMPAGE(((byChr<<3)+6) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 7 ] = VROMPAGE(((byChr<<3)+7) % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); +} + + diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_235.c b/apps/plugins/infones/mapper/InfoNES_Mapper_235.c new file mode 100644 index 0000000..1654c29 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_235.c @@ -0,0 +1,126 @@ +/*===================================================================*/ +/* */ +/* Mapper 235 : 150-in-1 */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 235 */ +/*-------------------------------------------------------------------*/ +void Map235_Init() +{ + /* Initialize Mapper */ + MapperInit = Map235_Init; + + /* Write to Mapper */ + MapperWrite = Map235_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set Registers */ + for( int i = 0; i < 0x2000; i++ ) { + DRAM[i] = 0xFF; + } + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 235 Write Function */ +/*-------------------------------------------------------------------*/ +void Map235_Write( WORD wAddr, BYTE byData ) +{ + BYTE byPrg = ((wAddr&0x0300)>>3)|(wAddr&0x001F); + BYTE byBus = 0; + + if( (NesHeader.byRomSize<<1) == 64*2 ) { + // 100-in-1 + switch( wAddr & 0x0300 ) { + case 0x0000: break; + case 0x0100: byBus = 1; break; + case 0x0200: byBus = 1; break; + case 0x0300: byBus = 1; break; + } + } else if( (NesHeader.byRomSize<<1) == 128*2 ) { + // 150-in-1 + switch( wAddr & 0x0300 ) { + case 0x0000: break; + case 0x0100: byBus = 1; break; + case 0x0200: byPrg = (byPrg&0x1F)|0x20; break; + case 0x0300: byBus = 1; break; + } + } else if( (NesHeader.byRomSize<<1) == 192*2 ) { + // 150-in-1 + switch( wAddr & 0x0300 ) { + case 0x0000: break; + case 0x0100: byBus = 1; break; + case 0x0200: byPrg = (byPrg&0x1F)|0x20; break; + case 0x0300: byPrg = (byPrg&0x1F)|0x40; break; + } + } else if( (NesHeader.byRomSize<<1) == 256*2 ) { + } + + if( wAddr & 0x0800 ) { + if( wAddr & 0x1000 ) { + ROMBANK0 = ROMPAGE(((byPrg<<2)+2) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE(((byPrg<<2)+3) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE(((byPrg<<2)+2) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE(((byPrg<<2)+3) % (NesHeader.byRomSize<<1)); + } else { + ROMBANK0 = ROMPAGE(((byPrg<<2)+0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE(((byPrg<<2)+1) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE(((byPrg<<2)+0) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE(((byPrg<<2)+1) % (NesHeader.byRomSize<<1)); + } + } else { + ROMBANK0 = ROMPAGE(((byPrg<<2)+0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE(((byPrg<<2)+1) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE(((byPrg<<2)+2) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE(((byPrg<<2)+3) % (NesHeader.byRomSize<<1)); + } + + if( byBus ) { + ROMBANK0 = DRAM; + ROMBANK1 = DRAM; + ROMBANK2 = DRAM; + ROMBANK3 = DRAM; + } + + if( wAddr & 0x0400 ) { + InfoNES_Mirroring( 3 ); + } else if( wAddr & 0x2000 ) { + InfoNES_Mirroring( 0 ); + } else { + InfoNES_Mirroring( 1 ); + } +} + diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_236.c b/apps/plugins/infones/mapper/InfoNES_Mapper_236.c new file mode 100644 index 0000000..ef20bc0 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_236.c @@ -0,0 +1,105 @@ +/*===================================================================*/ +/* */ +/* Mapper 236 : 800-in-1 */ +/* */ +/*===================================================================*/ + +BYTE Map236_Bank, Map236_Mode; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 236 */ +/*-------------------------------------------------------------------*/ +void Map236_Init() +{ + /* Initialize Mapper */ + MapperInit = Map236_Init; + + /* Write to Mapper */ + MapperWrite = Map236_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set Registers */ + Map236_Bank = Map236_Mode = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 236 Write Function */ +/*-------------------------------------------------------------------*/ +void Map236_Write( WORD wAddr, BYTE byData ) +{ + if( wAddr >= 0x8000 && wAddr <= 0xBFFF ) { + Map236_Bank = ((wAddr&0x03)<<4)|(Map236_Bank&0x07); + } else { + Map236_Bank = (wAddr&0x07)|(Map236_Bank&0x30); + Map236_Mode = wAddr&0x30; + } + + if( wAddr & 0x20 ) { + InfoNES_Mirroring( 0 ); + } else { + InfoNES_Mirroring( 1 ); + } + + switch( Map236_Mode ) { + case 0x00: + Map236_Bank |= 0x08; + ROMBANK0 = ROMPAGE(((Map236_Bank<<1)+0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE(((Map236_Bank<<1)+1) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE((((Map236_Bank|0x07)<<1)+0) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE((((Map236_Bank|0x07)<<1)+1) % (NesHeader.byRomSize<<1)); + break; + case 0x10: + Map236_Bank |= 0x37; + ROMBANK0 = ROMPAGE(((Map236_Bank<<1)+0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE(((Map236_Bank<<1)+1) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE((((Map236_Bank|0x07)<<1)+0) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE((((Map236_Bank|0x07)<<1)+1) % (NesHeader.byRomSize<<1)); + break; + case 0x20: + Map236_Bank |= 0x08; + ROMBANK0 = ROMPAGE((((Map236_Bank&0xFE)<<1)+0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE((((Map236_Bank&0xFE)<<1)+1) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE((((Map236_Bank&0xFE)<<1)+2) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE((((Map236_Bank&0xFE)<<1)+3) % (NesHeader.byRomSize<<1)); + break; + case 0x30: + Map236_Bank |= 0x08; + ROMBANK0 = ROMPAGE(((Map236_Bank<<1)+0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE(((Map236_Bank<<1)+1) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE(((Map236_Bank<<1)+0) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE(((Map236_Bank<<1)+1) % (NesHeader.byRomSize<<1)); + break; + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_240.c b/apps/plugins/infones/mapper/InfoNES_Mapper_240.c new file mode 100644 index 0000000..5c34238 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_240.c @@ -0,0 +1,82 @@ +/*===================================================================*/ +/* */ +/* Mapper 240 : Gen Ke Le Zhuan */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 240 */ +/*-------------------------------------------------------------------*/ +void Map240_Init() +{ + /* Initialize Mapper */ + MapperInit = Map240_Init; + + /* Write to Mapper */ + MapperWrite = Map0_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map240_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 240 Write to APU Function */ +/*-------------------------------------------------------------------*/ +void Map240_Apu( WORD wAddr, BYTE byData ) +{ + if( wAddr>=0x4020 && wAddr<0x6000 ) { + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE((((byData&0xF0)>>2)+0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE((((byData&0xF0)>>2)+1) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE((((byData&0xF0)>>2)+2) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE((((byData&0xF0)>>2)+3) % (NesHeader.byRomSize<<1)); + + /* Set PPU Banks */ + PPUBANK[ 0 ] = VROMPAGE((((byData&0x0F)<<3)+0) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 1 ] = VROMPAGE((((byData&0x0F)<<3)+1) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 2 ] = VROMPAGE((((byData&0x0F)<<3)+2) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 3 ] = VROMPAGE((((byData&0x0F)<<3)+3) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 4 ] = VROMPAGE((((byData&0x0F)<<3)+4) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 5 ] = VROMPAGE((((byData&0x0F)<<3)+5) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 6 ] = VROMPAGE((((byData&0x0F)<<3)+6) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 7 ] = VROMPAGE((((byData&0x0F)<<3)+7) % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_241.c b/apps/plugins/infones/mapper/InfoNES_Mapper_241.c new file mode 100644 index 0000000..3ec3485 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_241.c @@ -0,0 +1,71 @@ +/*===================================================================*/ +/* */ +/* Mapper 241 : Fon Serm Bon */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 241 */ +/*-------------------------------------------------------------------*/ +void Map241_Init() +{ + /* Initialize Mapper */ + MapperInit = Map241_Init; + + /* Write to Mapper */ + MapperWrite = Map241_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 241 Write Function */ +/*-------------------------------------------------------------------*/ +void Map241_Write( WORD wAddr, BYTE byData ) +{ + if( wAddr == 0x8000 ) { + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE(((byData<<2)+0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE(((byData<<2)+1) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE(((byData<<2)+2) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE(((byData<<2)+3) % (NesHeader.byRomSize<<1)); + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_242.c b/apps/plugins/infones/mapper/InfoNES_Mapper_242.c new file mode 100644 index 0000000..f5194fc --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_242.c @@ -0,0 +1,64 @@ +/*===================================================================*/ +/* */ +/* Mapper 242 : Wai Xing Zhan Shi */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 242 */ +/*-------------------------------------------------------------------*/ +void Map242_Init() +{ + /* Initialize Mapper */ + MapperInit = Map242_Init; + + /* Write to Mapper */ + MapperWrite = Map242_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 242 Write Function */ +/*-------------------------------------------------------------------*/ +void Map242_Write( WORD wAddr, BYTE byData ) +{ + if( wAddr & 0x01 ) { + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE((((wAddr&0xF8)>>1)+0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE((((wAddr&0xF8)>>1)+1) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE((((wAddr&0xF8)>>1)+2) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE((((wAddr&0xF8)>>1)+3) % (NesHeader.byRomSize<<1)); + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_243.c b/apps/plugins/infones/mapper/InfoNES_Mapper_243.c new file mode 100644 index 0000000..c45a751 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_243.c @@ -0,0 +1,133 @@ +/*===================================================================*/ +/* */ +/* Mapper 243 (Pirates) */ +/* */ +/*===================================================================*/ + +BYTE Map243_Regs[4]; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 243 */ +/*-------------------------------------------------------------------*/ +void Map243_Init() +{ + /* Initialize Mapper */ + MapperInit = Map243_Init; + + /* Write to Mapper */ + MapperWrite = Map0_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map243_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) + { + for ( int nPage = 0; nPage < 8; ++nPage ) + { + PPUBANK[ nPage ] = VROMPAGE( nPage ); + } + InfoNES_SetupChr(); + } + + /* Initialize state registers */ + Map243_Regs[0] = Map243_Regs[1] = Map243_Regs[2] = Map243_Regs[3] = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 243 Write to Apu Function */ +/*-------------------------------------------------------------------*/ +void Map243_Apu( WORD wAddr, BYTE byData ) +{ + if ( wAddr == 0x4100 ) + { + Map243_Regs[0] = byData; + } + else if ( wAddr == 0x4101 ) + { + switch ( Map243_Regs[0] & 0x07 ) + { + case 0x02: + Map243_Regs[1] = byData & 0x01; + break; + + case 0x00: + case 0x04: + case 0x07: + Map243_Regs[2] = ( byData & 0x01 ) << 1; + break; + + /* Set ROM Banks */ + case 0x05: + ROMBANK0 = ROMPAGE( ( byData * 4 + 0 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE( ( byData * 4 + 1 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMPAGE( ( byData * 4 + 2 ) % ( NesHeader.byRomSize << 1 ) ); + ROMBANK3 = ROMPAGE( ( byData * 4 + 3 ) % ( NesHeader.byRomSize << 1 ) ); + break; + + case 0x06: + Map243_Regs[3] = ( byData & 0x03 ) << 2; + break; + } + + /* Set PPU Banks */ + if ( ( NesHeader.byVRomSize << 3 ) <= 64 ) + { + BYTE chr_bank = ( Map243_Regs[2] + Map243_Regs[3] ) >> 1; + + PPUBANK[ 0 ] = VROMPAGE( ( chr_bank * 8 + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( ( chr_bank * 8 + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( ( chr_bank * 8 + 2 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( ( chr_bank * 8 + 3 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 4 ] = VROMPAGE( ( chr_bank * 8 + 4 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( ( chr_bank * 8 + 5 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE( ( chr_bank * 8 + 6 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( ( chr_bank * 8 + 7 ) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + } + else + { + BYTE chr_bank = Map243_Regs[1] + Map243_Regs[2] + Map243_Regs[3]; + + PPUBANK[ 0 ] = VROMPAGE( ( chr_bank * 8 + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( ( chr_bank * 8 + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( ( chr_bank * 8 + 2 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( ( chr_bank * 8 + 3 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 4 ] = VROMPAGE( ( chr_bank * 8 + 4 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( ( chr_bank * 8 + 5 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE( ( chr_bank * 8 + 6 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( ( chr_bank * 8 + 7 ) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + } + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_244.c b/apps/plugins/infones/mapper/InfoNES_Mapper_244.c new file mode 100644 index 0000000..b0240a7 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_244.c @@ -0,0 +1,72 @@ +/*===================================================================*/ +/* */ +/* Mapper 244 */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 244 */ +/*-------------------------------------------------------------------*/ +void Map244_Init() +{ + /* Initialize Mapper */ + MapperInit = Map244_Init; + + /* Write to Mapper */ + MapperWrite = Map244_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 244 Write Function */ +/*-------------------------------------------------------------------*/ +void Map244_Write( WORD wAddr, BYTE byData ) +{ + if( wAddr>=0x8065 && wAddr<=0x80A4 ) { + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE(((((wAddr-0x8065)&0x3)<<2)+0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE(((((wAddr-0x8065)&0x3)<<2)+1) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE(((((wAddr-0x8065)&0x3)<<2)+2) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE(((((wAddr-0x8065)&0x3)<<2)+3) % (NesHeader.byRomSize<<1)); + } + + if( wAddr>=0x80A5 && wAddr<=0x80E4 ) { + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE(((((wAddr-0x80A5)&0x7)<<2)+0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE(((((wAddr-0x80A5)&0x7)<<2)+1) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE(((((wAddr-0x80A5)&0x7)<<2)+2) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE(((((wAddr-0x80A5)&0x7)<<2)+3) % (NesHeader.byRomSize<<1)); + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_245.c b/apps/plugins/infones/mapper/InfoNES_Mapper_245.c new file mode 100644 index 0000000..b70625c --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_245.c @@ -0,0 +1,231 @@ +/*===================================================================*/ +/* */ +/* Mapper 245 : Yong Zhe Dou E Long */ +/* */ +/*===================================================================*/ + +BYTE Map245_Reg[8]; +BYTE Map245_Prg0, Map245_Prg1; +BYTE Map245_Chr01, Map245_Chr23, Map245_Chr4, Map245_Chr5, Map245_Chr6, Map245_Chr7; +BYTE Map245_WeSram; + +BYTE Map245_IRQ_Enable; +BYTE Map245_IRQ_Counter; +BYTE Map245_IRQ_Latch; +BYTE Map245_IRQ_Request; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 245 */ +/*-------------------------------------------------------------------*/ +void Map245_Init() +{ + /* Initialize Mapper */ + MapperInit = Map245_Init; + + /* Write to Mapper */ + MapperWrite = Map245_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map245_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set Registers */ + for( int i = 0; i < 8; i++ ) { + Map245_Reg[i] = 0x00; + } + + Map245_Prg0 = 0; + Map245_Prg1 = 1; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + Map245_WeSram = 0; // Disable + Map245_IRQ_Enable = 0; // Disable + Map245_IRQ_Counter = 0; + Map245_IRQ_Latch = 0; + Map245_IRQ_Request = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 245 Write Function */ +/*-------------------------------------------------------------------*/ +void Map245_Write( WORD wAddr, BYTE byData ) +{ + switch( wAddr&0xF7FF ) { + case 0x8000: + Map245_Reg[0] = byData; + break; + case 0x8001: + Map245_Reg[1] = byData; + switch( Map245_Reg[0] ) { + case 0x00: + Map245_Reg[3]=(byData & 2 )<<5; + ROMBANK2 = ROMPAGE((0x3E|Map245_Reg[3]) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE((0x3F|Map245_Reg[3]) % (NesHeader.byRomSize<<1)); + break; + case 0x06: + Map245_Prg0=byData; + break; + case 0x07: + Map245_Prg1=byData; + break; + } + ROMBANK0 = ROMPAGE((Map245_Prg0|Map245_Reg[3]) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE((Map245_Prg1|Map245_Reg[3]) % (NesHeader.byRomSize<<1)); + break; + case 0xA000: + Map245_Reg[2] = byData; + if( !ROM_FourScr ) { + if( byData & 0x01 ) InfoNES_Mirroring( 0 ); + else InfoNES_Mirroring( 1 ); + } + break; + case 0xA001: + + break; + case 0xC000: + Map245_Reg[4] = byData; + Map245_IRQ_Counter = byData; + Map245_IRQ_Request = 0; + break; + case 0xC001: + Map245_Reg[5] = byData; + Map245_IRQ_Latch = byData; + Map245_IRQ_Request = 0; + break; + case 0xE000: + Map245_Reg[6] = byData; + Map245_IRQ_Enable = 0; + Map245_IRQ_Request = 0; + break; + case 0xE001: + Map245_Reg[7] = byData; + Map245_IRQ_Enable = 1; + Map245_IRQ_Request = 0; + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 245 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map245_HSync() +{ + if( ( /* PPU_Scanline >= 0 && */ PPU_Scanline <= 239) ) { + if( PPU_R1 & R1_SHOW_SCR || PPU_R1 & R1_SHOW_SP ) { + if( Map245_IRQ_Enable && !Map245_IRQ_Request ) { + if( PPU_Scanline == 0 ) { + if( Map245_IRQ_Counter ) { + Map245_IRQ_Counter--; + } + } + if( !(Map245_IRQ_Counter--) ) { + Map245_IRQ_Request = 0xFF; + Map245_IRQ_Counter = Map245_IRQ_Latch; + } + } + } + } + if( Map245_IRQ_Request ) { + IRQ_REQ; + } +} + +#if 0 +/*-------------------------------------------------------------------*/ +/* Mapper 245 Set CPU Banks Function */ +/*-------------------------------------------------------------------*/ +void SetBank_CPU() +{ + ROMBANK0 = ROMPAGE( Map245_Prg0 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK1 = ROMPAGE( Map245_Prg1 % ( NesHeader.byRomSize << 1 ) ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 245 Set PPU Banks Function */ +/*-------------------------------------------------------------------*/ +void SetBank_PPU() +{ + if( NesHeader.byVRomSize > 0 ) { + if( Map245_Reg[0] & 0x80 ) { + PPUBANK[ 0 ] = VROMPAGE( Map245_Chr4 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( Map245_Chr5 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( Map245_Chr6 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( Map245_Chr7 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 4 ] = VROMPAGE( ( Map245_Chr01 + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( ( Map245_Chr01 + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE( ( Map245_Chr23 + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( ( Map245_Chr23 + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + } else { + PPUBANK[ 0 ] = VROMPAGE( ( Map245_Chr01 + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 1 ] = VROMPAGE( ( Map245_Chr01 + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 2 ] = VROMPAGE( ( Map245_Chr23 + 0 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 3 ] = VROMPAGE( ( Map245_Chr23 + 1 ) % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 4 ] = VROMPAGE( Map245_Chr4 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 5 ] = VROMPAGE( Map245_Chr5 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 6 ] = VROMPAGE( Map245_Chr6 % ( NesHeader.byVRomSize << 3 ) ); + PPUBANK[ 7 ] = VROMPAGE( Map245_Chr7 % ( NesHeader.byVRomSize << 3 ) ); + InfoNES_SetupChr(); + } + } else { + if( Map245_Reg[0] & 0x80 ) { + PPUBANK[ 4 ] = CRAMPAGE( (Map245_Chr01+0)&0x07 ); + PPUBANK[ 5 ] = CRAMPAGE( (Map245_Chr01+1)&0x07 ); + PPUBANK[ 6 ] = CRAMPAGE( (Map245_Chr23+0)&0x07 ); + PPUBANK[ 7 ] = CRAMPAGE( (Map245_Chr23+1)&0x07 ); + PPUBANK[ 0 ] = CRAMPAGE( Map245_Chr4&0x07 ); + PPUBANK[ 1 ] = CRAMPAGE( Map245_Chr5&0x07 ); + PPUBANK[ 2 ] = CRAMPAGE( Map245_Chr6&0x07 ); + PPUBANK[ 3 ] = CRAMPAGE( Map245_Chr7&0x07 ); + InfoNES_SetupChr(); + } else { + PPUBANK[ 0 ] = CRAMPAGE( (Map245_Chr01+0)&0x07 ); + PPUBANK[ 1 ] = CRAMPAGE( (Map245_Chr01+1)&0x07 ); + PPUBANK[ 2 ] = CRAMPAGE( (Map245_Chr23+0)&0x07 ); + PPUBANK[ 3 ] = CRAMPAGE( (Map245_Chr23+1)&0x07 ); + PPUBANK[ 4 ] = CRAMPAGE( Map245_Chr4&0x07 ); + PPUBANK[ 5 ] = CRAMPAGE( Map245_Chr5&0x07 ); + PPUBANK[ 6 ] = CRAMPAGE( Map245_Chr6&0x07 ); + PPUBANK[ 7 ] = CRAMPAGE( Map245_Chr7&0x07 ); + InfoNES_SetupChr(); + } + } +} +#endif diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_246.c b/apps/plugins/infones/mapper/InfoNES_Mapper_246.c new file mode 100644 index 0000000..526f044 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_246.c @@ -0,0 +1,96 @@ +/*===================================================================*/ +/* */ +/* Mapper 246 : Phone Serm Berm */ +/* */ +/*===================================================================*/ + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 246 */ +/*-------------------------------------------------------------------*/ +void Map246_Init() +{ + /* Initialize Mapper */ + MapperInit = Map246_Init; + + /* Write to Mapper */ + MapperWrite = Map0_Write; + + /* Write to SRAM */ + MapperSram = Map246_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 246 Write to SRAM Function */ +/*-------------------------------------------------------------------*/ +void Map246_Sram( WORD wAddr, BYTE byData ) +{ + if( wAddr>=0x6000 && wAddr<0x8000 ) { + switch( wAddr ) { + case 0x6000: + ROMBANK0 = ROMPAGE(((byData<<2)+0) % (NesHeader.byRomSize<<1)); + break; + case 0x6001: + ROMBANK1 = ROMPAGE(((byData<<2)+1) % (NesHeader.byRomSize<<1)); + break; + case 0x6002: + ROMBANK2 = ROMPAGE(((byData<<2)+2) % (NesHeader.byRomSize<<1)); + break; + case 0x6003: + ROMBANK3 = ROMPAGE(((byData<<2)+3) % (NesHeader.byRomSize<<1)); + break; + case 0x6004: + PPUBANK[ 0 ] = VROMPAGE(((byData<<1)+0) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 1 ] = VROMPAGE(((byData<<1)+1) % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + break; + case 0x6005: + PPUBANK[ 2 ] = VROMPAGE(((byData<<1)+0) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 3 ] = VROMPAGE(((byData<<1)+1) % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + break; + case 0x6006: + PPUBANK[ 4 ] = VROMPAGE(((byData<<1)+0) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 5 ] = VROMPAGE(((byData<<1)+1) % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + break; + case 0x6007: + PPUBANK[ 6 ] = VROMPAGE(((byData<<1)+0) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 7 ] = VROMPAGE(((byData<<1)+1) % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + break; + default: + SRAMBANK[wAddr&0x1FFF] = byData; + break; + } + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_248.c b/apps/plugins/infones/mapper/InfoNES_Mapper_248.c new file mode 100644 index 0000000..e7cd797 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_248.c @@ -0,0 +1,235 @@ +/*===================================================================*/ +/* */ +/* Mapper 248 : Bao Qing Tian */ +/* */ +/*===================================================================*/ + +BYTE Map248_Reg[8]; +BYTE Map248_Prg0, Map248_Prg1; +BYTE Map248_Chr01, Map248_Chr23, Map248_Chr4, Map248_Chr5, Map248_Chr6, Map248_Chr7; +BYTE Map248_WeSram; + +BYTE Map248_IRQ_Enable; +BYTE Map248_IRQ_Counter; +BYTE Map248_IRQ_Latch; +BYTE Map248_IRQ_Request; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 248 */ +/*-------------------------------------------------------------------*/ +void Map248_Init() +{ + /* Initialize Mapper */ + MapperInit = Map248_Init; + + /* Write to Mapper */ + MapperWrite = Map248_Write; + + /* Write to SRAM */ + MapperSram = Map248_Sram; + + /* Write to APU */ + MapperApu = Map248_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map248_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set Registers */ + for( int i = 0; i < 8; i++ ) { + Map248_Reg[i] = 0x00; + } + + /* Set ROM Banks */ + Map248_Prg0 = 0; + Map248_Prg1 = 1; + Map248_Set_CPU_Banks(); + + /* Set PPU Banks */ + Map248_Chr01 = 0; + Map248_Chr23 = 2; + Map248_Chr4 = 4; + Map248_Chr5 = 5; + Map248_Chr6 = 6; + Map248_Chr7 = 7; + Map248_Set_PPU_Banks(); + + Map248_WeSram = 0; // Disable + Map248_IRQ_Enable = 0; // Disable + Map248_IRQ_Counter = 0; + Map248_IRQ_Latch = 0; + Map248_IRQ_Request = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 248 Write Function */ +/*-------------------------------------------------------------------*/ +void Map248_Write( WORD wAddr, BYTE byData ) +{ + switch( wAddr & 0xE001 ) { + case 0x8000: + Map248_Reg[0] = byData; + Map248_Set_CPU_Banks(); + Map248_Set_PPU_Banks(); + break; + case 0x8001: + Map248_Reg[1] = byData; + + switch( Map248_Reg[0] & 0x07 ) { + case 0x00: + Map248_Chr01 = byData & 0xFE; + Map248_Set_PPU_Banks(); + break; + case 0x01: + Map248_Chr23 = byData & 0xFE; + Map248_Set_PPU_Banks(); + break; + case 0x02: + Map248_Chr4 = byData; + Map248_Set_PPU_Banks(); + break; + case 0x03: + Map248_Chr5 = byData; + Map248_Set_PPU_Banks(); + break; + case 0x04: + Map248_Chr6 = byData; + Map248_Set_PPU_Banks(); + break; + case 0x05: + Map248_Chr7 = byData; + Map248_Set_PPU_Banks(); + break; + case 0x06: + Map248_Prg0 = byData; + Map248_Set_CPU_Banks(); + break; + case 0x07: + Map248_Prg1 = byData; + Map248_Set_CPU_Banks(); + break; + } + break; + case 0xA000: + Map248_Reg[2] = byData; + if( !ROM_FourScr ) { + if( byData & 0x01 ) { + InfoNES_Mirroring( 0 ); + } else { + InfoNES_Mirroring( 1 ); + } + } + break; + case 0xC000: + Map248_IRQ_Enable=0; + Map248_IRQ_Latch=0xBE; + Map248_IRQ_Counter =0xBE; + break; + case 0xC001: + Map248_IRQ_Enable=1; + Map248_IRQ_Latch=0xBE; + Map248_IRQ_Counter=0xBE; + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 248 Write to SRAM Function */ +/*-------------------------------------------------------------------*/ +void Map248_Sram( WORD wAddr, BYTE byData ) +{ + ROMBANK0 = ROMPAGE(((byData<<1)+0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE(((byData<<1)+1) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 248 Write to APU Function */ +/*-------------------------------------------------------------------*/ +void Map248_Apu( WORD wAddr, BYTE byData ) +{ + Map248_Sram( wAddr, byData ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 248 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map248_HSync() +{ + if( ( /* PPU_Scanline >= 0 && */ PPU_Scanline <= 239) ) { + if( PPU_R1 & R1_SHOW_SCR || PPU_R1 & R1_SHOW_SP ) { + if( Map248_IRQ_Enable ) { + if( !(Map248_IRQ_Counter--) ) { + Map248_IRQ_Counter = Map248_IRQ_Latch; + IRQ_REQ; + } + } + } + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 248 Set CPU Banks Function */ +/*-------------------------------------------------------------------*/ +void Map248_Set_CPU_Banks() +{ + if( Map248_Reg[0] & 0x40 ) { + ROMBANK0 = ROMLASTPAGE( 1 ); + ROMBANK1 = ROMPAGE(Map248_Prg1 % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE(Map248_Prg0 % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMLASTPAGE( 0 ); + } else { + ROMBANK0 = ROMPAGE(Map248_Prg0 % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE(Map248_Prg1 % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 248 Set PPU Banks Function */ +/*-------------------------------------------------------------------*/ +void Map248_Set_PPU_Banks() +{ + if( NesHeader.byRomSize > 0 ) { + if( Map248_Reg[0] & 0x80 ) { + PPUBANK[ 0 ] = VROMPAGE(Map248_Chr4 % (NesHeader.byVRomSize<<3)); + PPUBANK[ 1 ] = VROMPAGE(Map248_Chr5 % (NesHeader.byVRomSize<<3)); + PPUBANK[ 2 ] = VROMPAGE(Map248_Chr6 % (NesHeader.byVRomSize<<3)); + PPUBANK[ 3 ] = VROMPAGE(Map248_Chr7 % (NesHeader.byVRomSize<<3)); + PPUBANK[ 4 ] = VROMPAGE((Map248_Chr01+0) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 5 ] = VROMPAGE((Map248_Chr01+1) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 6 ] = VROMPAGE((Map248_Chr23+0) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 7 ] = VROMPAGE((Map248_Chr23+1) % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + } else { + PPUBANK[ 0 ] = VROMPAGE((Map248_Chr01+0) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 1 ] = VROMPAGE((Map248_Chr01+1) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 2 ] = VROMPAGE((Map248_Chr23+0) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 3 ] = VROMPAGE((Map248_Chr23+1) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 4 ] = VROMPAGE(Map248_Chr4 % (NesHeader.byVRomSize<<3)); + PPUBANK[ 5 ] = VROMPAGE(Map248_Chr5 % (NesHeader.byVRomSize<<3)); + PPUBANK[ 6 ] = VROMPAGE(Map248_Chr6 % (NesHeader.byVRomSize<<3)); + PPUBANK[ 7 ] = VROMPAGE(Map248_Chr7 % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + } + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_249.c b/apps/plugins/infones/mapper/InfoNES_Mapper_249.c new file mode 100644 index 0000000..c16cfb2 --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_249.c @@ -0,0 +1,325 @@ +/*===================================================================*/ +/* */ +/* Mapper 249 : MMC3 */ +/* */ +/*===================================================================*/ + +BYTE Map249_Spdata; +BYTE Map249_Reg[8]; + +BYTE Map249_IRQ_Enable; +BYTE Map249_IRQ_Counter; +BYTE Map249_IRQ_Latch; +BYTE Map249_IRQ_Request; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 249 */ +/*-------------------------------------------------------------------*/ +void Map249_Init() +{ + /* Initialize Mapper */ + MapperInit = Map249_Init; + + /* Write to Mapper */ + MapperWrite = Map249_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map249_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map249_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set Registers */ + for( int i = 0; i < 8; i++ ) { + Map249_Reg[i] = 0x00; + } + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set Registers */ + Map249_IRQ_Enable = 0; // Disable + Map249_IRQ_Counter = 0; + Map249_IRQ_Latch = 0; + Map249_IRQ_Request = 0; + + Map249_Spdata = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 249 Write Function */ +/*-------------------------------------------------------------------*/ +void Map249_Write( WORD wAddr, BYTE byData ) +{ + BYTE byM0,byM1,byM2,byM3,byM4,byM5,byM6,byM7; + + switch( wAddr&0xFF01 ) { + case 0x8000: + case 0x8800: + Map249_Reg[0] = byData; + break; + case 0x8001: + case 0x8801: + switch( Map249_Reg[0] & 0x07 ) { + case 0x00: + if( Map249_Spdata == 1 ) { + byM0=byData&0x1; + byM1=(byData&0x02)>>1; + byM2=(byData&0x04)>>2; + byM3=(byData&0x08)>>3; + byM4=(byData&0x10)>>4; + byM5=(byData&0x20)>>5; + byM6=(byData&0x40)>>6; + byM7=(byData&0x80)>>7; + byData=(byM5<<7)|(byM4<<6)|(byM2<<5)|(byM6<<4)|(byM7<<3)|(byM3<<2)|(byM1<<1)|byM0; + } + PPUBANK[ 0 ] = VROMPAGE((byData&0xFE) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 1 ] = VROMPAGE((byData|0x01) % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + break; + case 0x01: + if( Map249_Spdata == 1 ) { + byM0=byData&0x1; + byM1=(byData&0x02)>>1; + byM2=(byData&0x04)>>2; + byM3=(byData&0x08)>>3; + byM4=(byData&0x10)>>4; + byM5=(byData&0x20)>>5; + byM6=(byData&0x40)>>6; + byM7=(byData&0x80)>>7; + byData=(byM5<<7)|(byM4<<6)|(byM2<<5)|(byM6<<4)|(byM7<<3)|(byM3<<2)|(byM1<<1)|byM0; + } + PPUBANK[ 2 ] = VROMPAGE((byData&0xFE) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 3 ] = VROMPAGE((byData|0x01) % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + break; + case 0x02: + if( Map249_Spdata == 1 ) { + byM0=byData&0x1; + byM1=(byData&0x02)>>1; + byM2=(byData&0x04)>>2; + byM3=(byData&0x08)>>3; + byM4=(byData&0x10)>>4; + byM5=(byData&0x20)>>5; + byM6=(byData&0x40)>>6; + byM7=(byData&0x80)>>7; + byData=(byM5<<7)|(byM4<<6)|(byM2<<5)|(byM6<<4)|(byM7<<3)|(byM3<<2)|(byM1<<1)|byM0; + } + PPUBANK[ 4 ] = VROMPAGE(byData % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + break; + case 0x03: + if( Map249_Spdata == 1 ) { + byM0=byData&0x1; + byM1=(byData&0x02)>>1; + byM2=(byData&0x04)>>2; + byM3=(byData&0x08)>>3; + byM4=(byData&0x10)>>4; + byM5=(byData&0x20)>>5; + byM6=(byData&0x40)>>6; + byM7=(byData&0x80)>>7; + byData=(byM5<<7)|(byM4<<6)|(byM2<<5)|(byM6<<4)|(byM7<<3)|(byM3<<2)|(byM1<<1)|byM0; + } + PPUBANK[ 5 ] = VROMPAGE(byData % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + break; + case 0x04: + if( Map249_Spdata == 1 ) { + byM0=byData&0x1; + byM1=(byData&0x02)>>1; + byM2=(byData&0x04)>>2; + byM3=(byData&0x08)>>3; + byM4=(byData&0x10)>>4; + byM5=(byData&0x20)>>5; + byM6=(byData&0x40)>>6; + byM7=(byData&0x80)>>7; + byData=(byM5<<7)|(byM4<<6)|(byM2<<5)|(byM6<<4)|(byM7<<3)|(byM3<<2)|(byM1<<1)|byM0; + } + PPUBANK[ 6 ] = VROMPAGE(byData % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + break; + case 0x05: + if( Map249_Spdata == 1 ) { + byM0=byData&0x1; + byM1=(byData&0x02)>>1; + byM2=(byData&0x04)>>2; + byM3=(byData&0x08)>>3; + byM4=(byData&0x10)>>4; + byM5=(byData&0x20)>>5; + byM6=(byData&0x40)>>6; + byM7=(byData&0x80)>>7; + byData=(byM5<<7)|(byM4<<6)|(byM2<<5)|(byM6<<4)|(byM7<<3)|(byM3<<2)|(byM1<<1)|byM0; + } + PPUBANK[ 7 ] = VROMPAGE(byData % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + break; + case 0x06: + if( Map249_Spdata == 1 ) { + if( byData < 0x20 ) { + byM0=byData&0x1; + byM1=(byData&0x02)>>1; + byM2=(byData&0x04)>>2; + byM3=(byData&0x08)>>3; + byM4=(byData&0x10)>>4; + byM5=0; + byM6=0; + byM7=0; + byData=(byM7<<7)|(byM6<<6)|(byM5<<5)|(byM2<<4)|(byM1<<3)|(byM3<<2)|(byM4<<1)|byM0; + } else { + byData=byData-0x20; + byM0=byData&0x1; + byM1=(byData&0x02)>>1; + byM2=(byData&0x04)>>2; + byM3=(byData&0x08)>>3; + byM4=(byData&0x10)>>4; + byM5=(byData&0x20)>>5; + byM6=(byData&0x40)>>6; + byM7=(byData&0x80)>>7; + byData=(byM5<<7)|(byM4<<6)|(byM2<<5)|(byM6<<4)|(byM7<<3)|(byM3<<2)|(byM1<<1)|byM0; + } + } + ROMBANK0 = ROMPAGE(byData % (NesHeader.byRomSize<<1)); + break; + case 0x07: + if( Map249_Spdata == 1 ) { + if( byData < 0x20 ) { + byM0=byData&0x1; + byM1=(byData&0x02)>>1; + byM2=(byData&0x04)>>2; + byM3=(byData&0x08)>>3; + byM4=(byData&0x10)>>4; + byM5=0; + byM6=0; + byM7=0; + byData=(byM7<<7)|(byM6<<6)|(byM5<<5)|(byM2<<4)|(byM1<<3)|(byM3<<2)|(byM4<<1)|byM0; + } else { + byData=byData-0x20; + byM0=byData&0x1; + byM1=(byData&0x02)>>1; + byM2=(byData&0x04)>>2; + byM3=(byData&0x08)>>3; + byM4=(byData&0x10)>>4; + byM5=(byData&0x20)>>5; + byM6=(byData&0x40)>>6; + byM7=(byData&0x80)>>7; + byData=(byM5<<7)|(byM4<<6)|(byM2<<5)|(byM6<<4)|(byM7<<3)|(byM3<<2)|(byM1<<1)|byM0; + } + } + ROMBANK1 = ROMPAGE(byData % (NesHeader.byRomSize<<1)); + break; + } + break; + case 0xA000: + case 0xA800: + Map249_Reg[2] = byData; + if( !ROM_FourScr ) { + if( byData & 0x01 ) InfoNES_Mirroring( 0 ); + else InfoNES_Mirroring( 1 ); + } + break; + case 0xA001: + case 0xA801: + Map249_Reg[3] = byData; + break; + case 0xC000: + case 0xC800: + Map249_Reg[4] = byData; + Map249_IRQ_Counter = byData; + Map249_IRQ_Request = 0; + break; + case 0xC001: + case 0xC801: + Map249_Reg[5] = byData; + Map249_IRQ_Latch = byData; + Map249_IRQ_Request = 0; + break; + case 0xE000: + case 0xE800: + Map249_Reg[6] = byData; + Map249_IRQ_Enable = 0; + Map249_IRQ_Request = 0; + break; + case 0xE001: + case 0xE801: + Map249_Reg[7] = byData; + Map249_IRQ_Enable = 1; + Map249_IRQ_Request = 0; + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 249 Write to APU Function */ +/*-------------------------------------------------------------------*/ +void Map249_Apu( WORD wAddr, BYTE byData ) +{ + if( wAddr == 0x5000 ) { + switch( byData ) { + case 0x00: + Map249_Spdata = 0; + break; + case 0x02: + Map249_Spdata = 1; + break; + } + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 249 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map249_HSync() +{ + if( ( /* PPU_Scanline >= 0 && */ PPU_Scanline <= 239) ) { + if( PPU_R1 & R1_SHOW_SCR || PPU_R1 & R1_SHOW_SP ) { + if( Map249_IRQ_Enable && !Map249_IRQ_Request ) { + if( PPU_Scanline == 0 ) { + if( Map249_IRQ_Counter ) { + Map249_IRQ_Counter--; + } + } + if( !(Map249_IRQ_Counter--) ) { + Map249_IRQ_Request = 0xFF; + Map249_IRQ_Counter = Map249_IRQ_Latch; + } + } + } + } + if( Map249_IRQ_Request ) { + IRQ_REQ; + } +} + diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_251.c b/apps/plugins/infones/mapper/InfoNES_Mapper_251.c new file mode 100644 index 0000000..599249d --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_251.c @@ -0,0 +1,155 @@ +/*===================================================================*/ +/* */ +/* Mapper 251 */ +/* */ +/*===================================================================*/ + +BYTE Map251_Reg[11]; +BYTE Map251_Breg[4]; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 251 */ +/*-------------------------------------------------------------------*/ +void Map251_Init() +{ + /* Initialize Mapper */ + MapperInit = Map251_Init; + + /* Write to Mapper */ + MapperWrite = Map251_Write; + + /* Write to SRAM */ + MapperSram = Map251_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set Registers */ + InfoNES_Mirroring( 1 ); + + int i; + for( i = 0; i < 11; i++ ) + Map251_Reg[i] = 0; + for( i = 0; i < 4; i++ ) + Map251_Breg[i] = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 251 Write Function */ +/*-------------------------------------------------------------------*/ +void Map251_Write( WORD wAddr, BYTE byData ) +{ + switch( wAddr & 0xE001 ) { + case 0x8000: + Map251_Reg[8] = byData; + Map251_Set_Banks(); + break; + case 0x8001: + Map251_Reg[Map251_Reg[8]&0x07] = byData; + Map251_Set_Banks(); + break; + case 0xA001: + if( byData & 0x80 ) { + Map251_Reg[ 9] = 1; + Map251_Reg[10] = 0; + } else { + Map251_Reg[ 9] = 0; + } + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 251 Write to SRAM Function */ +/*-------------------------------------------------------------------*/ +void Map251_Sram( WORD wAddr, BYTE byData ) +{ + if( (wAddr & 0xE001) == 0x6000 ) { + if( Map251_Reg[9] ) { + Map251_Breg[Map251_Reg[10]++] = byData; + if( Map251_Reg[10] == 4 ) { + Map251_Reg[10] = 0; + Map251_Set_Banks(); + } + } + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 251 Set Banks Function */ +/*-------------------------------------------------------------------*/ +void Map251_Set_Banks() +{ + int nChr[6]; + int nPrg[4]; + + for( int i = 0; i < 6; i++ ) { + nChr[i] = (Map251_Reg[i]|(Map251_Breg[1]<<4)) & ((Map251_Breg[2]<<4)|0x0F); + } + + if( Map251_Reg[8] & 0x80 ) { + PPUBANK[ 0 ] = VROMPAGE(nChr[2] % (NesHeader.byVRomSize<<3)); + PPUBANK[ 1 ] = VROMPAGE(nChr[3] % (NesHeader.byVRomSize<<3)); + PPUBANK[ 2 ] = VROMPAGE(nChr[4] % (NesHeader.byVRomSize<<3)); + PPUBANK[ 3 ] = VROMPAGE(nChr[5] % (NesHeader.byVRomSize<<3)); + PPUBANK[ 4 ] = VROMPAGE(nChr[0] % (NesHeader.byVRomSize<<3)); + PPUBANK[ 5 ] = VROMPAGE((nChr[0]+1) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 6 ] = VROMPAGE(nChr[1] % (NesHeader.byVRomSize<<3)); + PPUBANK[ 7 ] = VROMPAGE((nChr[1]+1) % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + } else { + PPUBANK[ 0 ] = VROMPAGE(nChr[0] % (NesHeader.byVRomSize<<3)); + PPUBANK[ 1 ] = VROMPAGE((nChr[0]+1) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 2 ] = VROMPAGE(nChr[1] % (NesHeader.byVRomSize<<3)); + PPUBANK[ 3 ] = VROMPAGE((nChr[1]+1) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 4 ] = VROMPAGE(nChr[2] % (NesHeader.byVRomSize<<3)); + PPUBANK[ 5 ] = VROMPAGE(nChr[3] % (NesHeader.byVRomSize<<3)); + PPUBANK[ 6 ] = VROMPAGE(nChr[4] % (NesHeader.byVRomSize<<3)); + PPUBANK[ 7 ] = VROMPAGE(nChr[5] % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + } + + nPrg[0] = (Map251_Reg[6]&((Map251_Breg[3]&0x3F)^0x3F))|(Map251_Breg[1]); + nPrg[1] = (Map251_Reg[7]&((Map251_Breg[3]&0x3F)^0x3F))|(Map251_Breg[1]); + nPrg[2] = nPrg[3] =((Map251_Breg[3]&0x3F)^0x3F)|(Map251_Breg[1]); + nPrg[2] &= (NesHeader.byRomSize<<1)-1; + + if( Map251_Reg[8] & 0x40 ) { + ROMBANK0 = ROMPAGE(nPrg[2] % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE(nPrg[1] % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE(nPrg[0] % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE(nPrg[3] % (NesHeader.byRomSize<<1)); + } else { + ROMBANK0 = ROMPAGE(nPrg[0] % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE(nPrg[1] % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE(nPrg[2] % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE(nPrg[3] % (NesHeader.byRomSize<<1)); + } +} diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_252.c b/apps/plugins/infones/mapper/InfoNES_Mapper_252.c new file mode 100644 index 0000000..a8ad85f --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_252.c @@ -0,0 +1,218 @@ +/*===================================================================*/ +/* */ +/* Mapper 252 : Sangokushi - Chuugen no hasha */ +/* */ +/*===================================================================*/ + +BYTE Map252_Reg[9]; +BYTE Map252_IRQ_Enable; +BYTE Map252_IRQ_Counter; +BYTE Map252_IRQ_Latch; +BYTE Map252_IRQ_Occur; +int Map252_IRQ_Clock; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 252 */ +/*-------------------------------------------------------------------*/ +void Map252_Init() +{ + /* Initialize Mapper */ + MapperInit = Map252_Init; + + /* Write to Mapper */ + MapperWrite = Map252_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map0_Apu; + + /* Read from APU */ + MapperReadApu = Map0_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map252_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set Registers */ + for( int i = 0; i < 9; i++ ) { + Map252_Reg[i] = i; + } + + Map252_IRQ_Enable = 0; + Map252_IRQ_Counter = 0; + Map252_IRQ_Latch = 0; + Map252_IRQ_Clock = 0; + Map252_IRQ_Occur = 0; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMLASTPAGE( 1 ); + ROMBANK3 = ROMLASTPAGE( 0 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 252 Write Function */ +/*-------------------------------------------------------------------*/ +void Map252_Write( WORD wAddr, BYTE byData ) +{ + if( (wAddr & 0xF000) == 0x8000 ) { + ROMBANK0 = ROMPAGE( byData % (NesHeader.byRomSize<<1)); + return; + } + if( (wAddr & 0xF000) == 0xA000 ) { + ROMBANK1 = ROMPAGE( byData % (NesHeader.byRomSize<<1)); + return; + } + switch( wAddr & 0xF00C ) { + case 0xB000: + Map252_Reg[0] = (Map252_Reg[0] & 0xF0) | (byData & 0x0F); + PPUBANK[ 0 ] = VROMPAGE(Map252_Reg[0] % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + break; + case 0xB004: + Map252_Reg[0] = (Map252_Reg[0] & 0x0F) | ((byData & 0x0F) << 4); + PPUBANK[ 0 ] = VROMPAGE(Map252_Reg[0] % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + break; + case 0xB008: + Map252_Reg[1] = (Map252_Reg[1] & 0xF0) | (byData & 0x0F); + PPUBANK[ 1 ] = VROMPAGE(Map252_Reg[1] % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + break; + case 0xB00C: + Map252_Reg[1] = (Map252_Reg[1] & 0x0F) | ((byData & 0x0F) << 4); + PPUBANK[ 1 ] = VROMPAGE(Map252_Reg[1] % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + break; + + case 0xC000: + Map252_Reg[2] = (Map252_Reg[2] & 0xF0) | (byData & 0x0F); + PPUBANK[ 2 ] = VROMPAGE(Map252_Reg[2] % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + break; + case 0xC004: + Map252_Reg[2] = (Map252_Reg[2] & 0x0F) | ((byData & 0x0F) << 4); + PPUBANK[ 2 ] = VROMPAGE(Map252_Reg[2] % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + break; + case 0xC008: + Map252_Reg[3] = (Map252_Reg[3] & 0xF0) | (byData & 0x0F); + PPUBANK[ 3 ] = VROMPAGE(Map252_Reg[3] % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + break; + case 0xC00C: + Map252_Reg[3] = (Map252_Reg[3] & 0x0F) | ((byData & 0x0F) << 4); + PPUBANK[ 3 ] = VROMPAGE(Map252_Reg[3] % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + break; + + case 0xD000: + Map252_Reg[4] = (Map252_Reg[4] & 0xF0) | (byData & 0x0F); + PPUBANK[ 4 ] = VROMPAGE(Map252_Reg[4] % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + break; + case 0xD004: + Map252_Reg[4] = (Map252_Reg[4] & 0x0F) | ((byData & 0x0F) << 4); + PPUBANK[ 4 ] = VROMPAGE(Map252_Reg[4] % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + break; + case 0xD008: + Map252_Reg[5] = (Map252_Reg[5] & 0xF0) | (byData & 0x0F); + PPUBANK[ 5 ] = VROMPAGE(Map252_Reg[5] % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + break; + case 0xD00C: + Map252_Reg[5] = (Map252_Reg[5] & 0x0F) | ((byData & 0x0F) << 4); + PPUBANK[ 5 ] = VROMPAGE(Map252_Reg[5] % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + break; + + case 0xE000: + Map252_Reg[6] = (Map252_Reg[6] & 0xF0) | (byData & 0x0F); + PPUBANK[ 6 ] = VROMPAGE(Map252_Reg[6] % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + break; + case 0xE004: + Map252_Reg[6] = (Map252_Reg[6] & 0x0F) | ((byData & 0x0F) << 4); + PPUBANK[ 6 ] = VROMPAGE(Map252_Reg[6] % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + break; + case 0xE008: + Map252_Reg[7] = (Map252_Reg[7] & 0xF0) | (byData & 0x0F); + PPUBANK[ 7 ] = VROMPAGE(Map252_Reg[7] % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + break; + case 0xE00C: + Map252_Reg[7] = (Map252_Reg[7] & 0x0F) | ((byData & 0x0F) << 4); + PPUBANK[ 7 ] = VROMPAGE(Map252_Reg[7] % (NesHeader.byVRomSize<<3)); + InfoNES_SetupChr(); + break; + + case 0xF000: + Map252_IRQ_Latch = (Map252_IRQ_Latch & 0xF0) | (byData & 0x0F); + Map252_IRQ_Occur = 0; + break; + case 0xF004: + Map252_IRQ_Latch = (Map252_IRQ_Latch & 0x0F) | ((byData & 0x0F) << 4); + Map252_IRQ_Occur = 0; + break; + + case 0xF008: + Map252_IRQ_Enable = byData & 0x03; + if( Map252_IRQ_Enable & 0x02 ) { + Map252_IRQ_Counter = Map252_IRQ_Latch; + Map252_IRQ_Clock = 0; + } + Map252_IRQ_Occur = 0; + break; + + case 0xF00C: + Map252_IRQ_Enable = (Map252_IRQ_Enable & 0x01) * 3; + Map252_IRQ_Occur = 0; + break; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 252 H-Sync Function */ +/*-------------------------------------------------------------------*/ +void Map252_HSync() +{ + if( Map252_IRQ_Enable & 0x02 ) { + if( Map252_IRQ_Counter == 0xFF ) { + Map252_IRQ_Occur = 0xFF; + Map252_IRQ_Counter = Map252_IRQ_Latch; + Map252_IRQ_Enable = (Map252_IRQ_Enable & 0x01) * 3; + } else { + Map252_IRQ_Counter++; + } + } + if( Map252_IRQ_Occur ) { + IRQ_REQ; + } +} + diff --git a/apps/plugins/infones/mapper/InfoNES_Mapper_255.c b/apps/plugins/infones/mapper/InfoNES_Mapper_255.c new file mode 100644 index 0000000..1dacdfd --- /dev/null +++ b/apps/plugins/infones/mapper/InfoNES_Mapper_255.c @@ -0,0 +1,133 @@ +/*===================================================================*/ +/* */ +/* Mapper 255 : 110-in-1 */ +/* */ +/*===================================================================*/ + +BYTE Map255_Reg[4]; + +/*-------------------------------------------------------------------*/ +/* Initialize Mapper 255 */ +/*-------------------------------------------------------------------*/ +void Map255_Init() +{ + /* Initialize Mapper */ + MapperInit = Map255_Init; + + /* Write to Mapper */ + MapperWrite = Map255_Write; + + /* Write to SRAM */ + MapperSram = Map0_Sram; + + /* Write to APU */ + MapperApu = Map255_Apu; + + /* Read from APU */ + MapperReadApu = Map255_ReadApu; + + /* Callback at VSync */ + MapperVSync = Map0_VSync; + + /* Callback at HSync */ + MapperHSync = Map0_HSync; + + /* Callback at PPU */ + MapperPPU = Map0_PPU; + + /* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */ + MapperRenderScreen = Map0_RenderScreen; + + /* Set SRAM Banks */ + SRAMBANK = SRAM; + + /* Set ROM Banks */ + ROMBANK0 = ROMPAGE( 0 ); + ROMBANK1 = ROMPAGE( 1 ); + ROMBANK2 = ROMPAGE( 2 ); + ROMBANK3 = ROMPAGE( 3 ); + + /* Set PPU Banks */ + if ( NesHeader.byVRomSize > 0 ) { + for ( int nPage = 0; nPage < 8; ++nPage ) + PPUBANK[ nPage ] = VROMPAGE( nPage ); + InfoNES_SetupChr(); + } + + /* Set Registers */ + InfoNES_Mirroring( 1 ); + + Map255_Reg[0] = 0; + Map255_Reg[1] = 0; + Map255_Reg[2] = 0; + Map255_Reg[3] = 0; + + /* Set up wiring of the interrupt pin */ + K6502_Set_Int_Wiring( 1, 1 ); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 255 Write Function */ +/*-------------------------------------------------------------------*/ +void Map255_Write( WORD wAddr, BYTE byData ) +{ + BYTE byPrg = (wAddr & 0x0F80)>>7; + int nChr = (wAddr & 0x003F); + int nBank = (wAddr & 0x4000)>>14; + + if( wAddr & 0x2000 ) { + InfoNES_Mirroring( 0 ); + } else { + InfoNES_Mirroring( 1 ); + } + + if( wAddr & 0x1000 ) { + if( wAddr & 0x0040 ) { + ROMBANK0 = ROMPAGE((0x80*nBank+byPrg*4+2) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE((0x80*nBank+byPrg*4+3) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE((0x80*nBank+byPrg*4+2) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE((0x80*nBank+byPrg*4+3) % (NesHeader.byRomSize<<1)); + } else { + ROMBANK0 = ROMPAGE((0x80*nBank+byPrg*4+0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE((0x80*nBank+byPrg*4+1) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE((0x80*nBank+byPrg*4+0) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE((0x80*nBank+byPrg*4+1) % (NesHeader.byRomSize<<1)); + } + } else { + ROMBANK0 = ROMPAGE((0x80*nBank+byPrg*4+0) % (NesHeader.byRomSize<<1)); + ROMBANK1 = ROMPAGE((0x80*nBank+byPrg*4+1) % (NesHeader.byRomSize<<1)); + ROMBANK2 = ROMPAGE((0x80*nBank+byPrg*4+2) % (NesHeader.byRomSize<<1)); + ROMBANK3 = ROMPAGE((0x80*nBank+byPrg*4+3) % (NesHeader.byRomSize<<1)); + } + + PPUBANK[ 0 ] = VROMPAGE((0x200*nBank+nChr*8+0) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 1 ] = VROMPAGE((0x200*nBank+nChr*8+1) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 2 ] = VROMPAGE((0x200*nBank+nChr*8+2) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 3 ] = VROMPAGE((0x200*nBank+nChr*8+3) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 4 ] = VROMPAGE((0x200*nBank+nChr*8+4) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 5 ] = VROMPAGE((0x200*nBank+nChr*8+5) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 6 ] = VROMPAGE((0x200*nBank+nChr*8+6) % (NesHeader.byVRomSize<<3)); + PPUBANK[ 7 ] = VROMPAGE((0x200*nBank+nChr*8+7) % (NesHeader.byVRomSize<<3)); +} + +/*-------------------------------------------------------------------*/ +/* Mapper 255 Write to APU Function */ +/*-------------------------------------------------------------------*/ +void Map255_Apu( WORD wAddr, BYTE byData ) +{ + if( wAddr >= 0x5800 ) { + Map255_Reg[wAddr&0x0003] = byData & 0x0F; + } +} + +/*-------------------------------------------------------------------*/ +/* Mapper 255 Read from APU Function */ +/*-------------------------------------------------------------------*/ +BYTE Map255_ReadApu( WORD wAddr ) +{ + if( wAddr >= 0x5800 ) { + return Map255_Reg[wAddr&0x0003] & 0x0F; + } else { + return wAddr>>8; + } +} diff --git a/apps/plugins/viewers.config b/apps/plugins/viewers.config index 1f3daee..1fe8ee5 100644 --- a/apps/plugins/viewers.config +++ b/apps/plugins/viewers.config @@ -1,3 +1,4 @@ +nes,games/infones,0 ch8,viewers/chip8,0 txt,viewers/text_viewer,1 txt,apps/text_editor,2 |