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authorMichael Sevakis <jethead71@rockbox.org>2013-05-22 18:50:28 -0400
committerMichael Sevakis <jethead71@rockbox.org>2013-05-23 03:15:12 -0400
commit33f3af2b8dbda1e67f07c9c63a07fb3e9af6fa59 (patch)
tree7ae40e143a1009f736195a7463d65d36ff4c7f0e /lib/rbcodec/codecs/libspc/spc_dsp.c
parent7738660effc7fcb4eb70a8b408b28af7c682e547 (diff)
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SPC Codec: Add ARMv5 optimized code. Easy peasy.
Why? Why not? Cuts a few MHz. Change-Id: Ied5c70b1aedd255cbe5d42b7d3028bbe47aad01d
Diffstat (limited to 'lib/rbcodec/codecs/libspc/spc_dsp.c')
-rw-r--r--lib/rbcodec/codecs/libspc/spc_dsp.c13
1 files changed, 12 insertions, 1 deletions
diff --git a/lib/rbcodec/codecs/libspc/spc_dsp.c b/lib/rbcodec/codecs/libspc/spc_dsp.c
index 6ad194a..28385c6 100644
--- a/lib/rbcodec/codecs/libspc/spc_dsp.c
+++ b/lib/rbcodec/codecs/libspc/spc_dsp.c
@@ -32,6 +32,8 @@
#if defined(CPU_ARM)
#if ARM_ARCH >= 6
#include "cpu/spc_dsp_armv6.c"
+#elif ARM_ARCH >= 5
+#include "cpu/spc_dsp_armv5.c"
#else
#include "cpu/spc_dsp_armv4.c"
#endif
@@ -55,7 +57,7 @@ static unsigned short const env_rates [0x20] ICONST_ATTR_SPC =
#if !SPC_NOINTERP
/* Interleved gauss table (to improve cache coherency). */
/* gauss [i * 2 + j] = normal_gauss [(1 - j) * 256 + i] */
-static int16_t const gauss_table [512] ICONST_ATTR_SPC MEM_ALIGN_ATTR =
+static int16_t gauss_table [512] IDATA_ATTR_SPC MEM_ALIGN_ATTR =
{
370,1305, 366,1305, 362,1304, 358,1304,
354,1304, 351,1304, 347,1304, 343,1303,
@@ -956,6 +958,15 @@ void DSP_reset( struct Spc_Dsp* this )
this->wave_entry [i].start_addr = 0xffff;
#endif /* SPC_BRRCACHE */
+#if !SPC_NOINTERP && GAUSS_TABLE_SCALE
+ if (gauss_table[0] == 370)
+ {
+ /* Not yet scaled */
+ for ( int i = 0; i < 512; i++)
+ gauss_table[i] <<= GAUSS_TABLE_SCALE;
+ }
+#endif /* !SPC_NOINTERP && GAUSS_TABLE_SCALE */
+
#if !SPC_NOECHO
this->echo_pos = 0;
echo_init(this);