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* Fix typo in comment.Andree Buschmann2010-11-22
| | | | git-svn-id: svn://svn.rockbox.org/rockbox/trunk@28641 a1c6a512-1295-4272-9138-f99709370657
* Change alignment macros to allow further performance optimization. Define ↵Andree Buschmann2010-11-21
| | | | | | the CACHEALIGN macros for all ARM CPUs, the used alignment size is derived from CACHEALIGN_BITS which has been defined for each supported ARM CPU with r28619. The default alignment size for ARM is set to 32 bytes as new -- not yet supported -- ARM CPUs will most probably need this alignment. To be able to differ between ARM and other CPUs a new macro called MEM_ALIGN_ATTR is introduced. This equals CACHEALIGN_ATTR for ARM, 16 byte alignment for Coldfire and is kept empty for other CPUs. MEM_ALIGN_ATTR is available system wide. From measurements it is expected that the usage of MEM_ALIGN_ATTR can give significant performance gain on ARM11 CPUs. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@28625 a1c6a512-1295-4272-9138-f99709370657
* Rename cache coherency functions.Thomas Martitz2010-09-08
| | | | | | | | | | | | | | The old cache coherency function names where wrong and misleading. The new names are (purposely different from vendor manuals) * commit_* (write-back only) * discard_* (removing lines from cache only) * commit_discard_* (write-back and removing lines from cache) It's suspected the old names have led to wrong uses. The old names still exist (as aliases) so every call via the old names need to be double checked and changed to the new name. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@28045 a1c6a512-1295-4272-9138-f99709370657
* Move some gcc extensions to new gcc_extensions.h headerRafaël Carré2010-07-25
| | | | | | | | | | | | - Move ATTRIBUTE_PRINTF/ATTRIBUTE_SCANF from _ansi.h They are not related at all to this file, and this broke compilation with Code Sourcery GCC which ships its own _ansi.h - Move LIKELY/UNLIKELY from system.h There is likely a lot more GCC extensions used everywhere in the source, conditionally on __GNUC__ or unconditionally git-svn-id: svn://svn.rockbox.org/rockbox/trunk@27548 a1c6a512-1295-4272-9138-f99709370657
* Don't duplicate byteswap code. Invent system where NEED_GENERIC_BYTESWAPS is ↵Nils Wallménius2010-07-15
| | | | | | set if the generic functions from system.h are needed. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@27440 a1c6a512-1295-4272-9138-f99709370657
* Remove atomic register bit manipulation functions from i.MX and s3c target ↵Michael Sevakis2010-06-30
| | | | | | code and introduce generic functions for ARM (bitmod32, bitset32, and bitclr32). Multiprocessor support is possible but just not implemented at the moment, only interrupt lockout. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@27188 a1c6a512-1295-4272-9138-f99709370657
* playback.c: don't assume cacheline size is 16 bytesRafaël Carré2010-06-23
| | | | | | | | | | ideally all targets should define CACHEALIGN_BITS, for now we default it to 16 bytes if it's not specified Since the buffer is already aligned in playback.c no need to align it again in buffering.c git-svn-id: svn://svn.rockbox.org/rockbox/trunk@27073 a1c6a512-1295-4272-9138-f99709370657
* Rockbox as an application: Replace many occurences of #ifdef SIMULATOR with ↵Thomas Martitz2010-06-21
| | | | | | | | | | | #if (CONFIG_PLATFORM & PLATFORM_HOSTED) (or equivalently). The simulator defines PLATFORM_HOSTED, as RaaA will do (RaaA will not define SIMULATOR). The new define is to (de-)select code to compile on hosted platforms generally. Should be no functional change to targets or the simulator. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@27019 a1c6a512-1295-4272-9138-f99709370657
* Also define STORAGE_ALIGN_ATTR if STORAGE_WANTS_ALIGN isn't definedMichael Sparmann2010-06-20
| | | | git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26984 a1c6a512-1295-4272-9138-f99709370657
* Add a STORAGE_ALIGN_ATTR macro, similar to CACHEALIGN_ATTR, for consistencyMichael Sparmann2010-06-20
| | | | git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26982 a1c6a512-1295-4272-9138-f99709370657
* Get checkwps going again, don't mess with sdl in it.Thomas Martitz2010-05-15
| | | | git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26066 a1c6a512-1295-4272-9138-f99709370657
* - Move uisimulator/sdl/*.[ch] into the target tree, under ↵Thomas Martitz2010-05-15
| | | | | | | | | | firmware/target/hosted/sdl, uisdl.c is split up across button-sdl.c and system-sdl.c. - Refactor the program startup. main() is now in main.c like on target, and the implicit application thread will now act as our main thread (previously a separate one was created for this in thread initialization). This is part of Rockbox as an application and is the first step to make an application port from the uisimulator. In a further step the sim bits from the sdl build will be separated out. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26065 a1c6a512-1295-4272-9138-f99709370657
* Cache align the pitch detector audiobuffer where needed. Some other misc. ↵Michael Sevakis2010-05-14
| | | | | | changes to try to make sure everything builds. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26011 a1c6a512-1295-4272-9138-f99709370657
* i.MX31/Gigabeat S: Implement frequency and voltage scaling-- 1.6V for ↵Michael Sevakis2010-04-23
| | | | | | 528MHz, and 1.35V for 264MHz and 132MHz. Keep DPTC overdrive ( > 400MHz) voltage scaling off for now because of uncertainties. Simplify the (working) mess later. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25699 a1c6a512-1295-4272-9138-f99709370657
* Use STORAGE_WANTS_ALIGN to make clear it's not a strict necessityRafaël Carré2010-03-26
| | | | | | Define PROC_NEEDS_CACHEALIGN only for PP git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25339 a1c6a512-1295-4272-9138-f99709370657
* Accept expressions in CACHE_OVERLAP() macroRafaël Carré2010-03-25
| | | | git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25337 a1c6a512-1295-4272-9138-f99709370657
* Make storage alignement use cache alignement macrosRafaël Carré2010-03-25
| | | | | | | | | | Introduce STORAGE_ALIGN_DOWN, STORAGE_PAD (using new CACHE_PAD) and STORAGE_OVERLAP (using new CACHE_OVERLAP), make them useful only when PROC_NEEDS_CACHEALIGN and STORAGE_NEEDS_ALIGN are defined Modify PP and nano2g system-target.h accordingly git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25336 a1c6a512-1295-4272-9138-f99709370657
* Remove unneeded instruction from the coldfire ffs function and fix a wrong ↵Nils Wallménius2009-12-16
| | | | | | comment git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24030 a1c6a512-1295-4272-9138-f99709370657
* fix checkwps breakage caused by r229900Nils Wallménius2009-10-06
| | | | git-svn-id: svn://svn.rockbox.org/rockbox/trunk@22993 a1c6a512-1295-4272-9138-f99709370657
* Once again fix building of the database tool that gets broke over and overNils Wallménius2009-10-06
| | | | git-svn-id: svn://svn.rockbox.org/rockbox/trunk@22990 a1c6a512-1295-4272-9138-f99709370657
* Fixed checkwps build warnings. Updated checkwps makefile to be closer to main.Björn Stenberg2009-09-01
| | | | git-svn-id: svn://svn.rockbox.org/rockbox/trunk@22593 a1c6a512-1295-4272-9138-f99709370657
* Replace 1UL in BIT_N with 1U to avoid turning it into a 64-bit operation on ↵Andrew Mahone2009-06-06
| | | | | | 64-bit sim targets. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21197 a1c6a512-1295-4272-9138-f99709370657
* Fix undefined BIT_N on non-SH targets.Andrew Mahone2009-06-06
| | | | git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21196 a1c6a512-1295-4272-9138-f99709370657
* Add a system-wide BIT_N macro, implemented via an LUT on SH, and use it in ↵Andrew Mahone2009-06-06
| | | | | | the TAGCACHE_IS_* macros in place of per-set LUTs, removing duplication of data between those LUTs and the mask values used on other targets. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21195 a1c6a512-1295-4272-9138-f99709370657
* Make basic cache functions into calls, and get rid of ↵Michael Sevakis2009-02-11
| | | | | | CACHE_FUNCTION_WRAPPERS and CACHE_FUNCTIONS_AS_CALL macros. Rename flush/invalidate_icache to cpucache_flush/invalidate. They're inlined only if an implementation isn't provided by defining HAVE_CPUCACHE_FLUSH/INVALIDATE. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19971 a1c6a512-1295-4272-9138-f99709370657
* Accept FS#9717 by Akio Idehara with a small change suggested by Rafaël ↵Nils Wallménius2009-01-24
| | | | | | Carré avoiding simulator warnings about redefining endianness switching macros git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19843 a1c6a512-1295-4272-9138-f99709370657
* remove align_buffer from firmare/general.c, replacing with ALIGN_BUFFER ↵Andrew Mahone2009-01-13
| | | | | | | | | macro, and replace all uses of it (only resize.c in core, and pictureflow and mpegplayer plugins), remove it from plugin_api, and remove wrapper for it from plugin.h git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19758 a1c6a512-1295-4272-9138-f99709370657
* Clean up panicf and introduce system_exception_wait to do further target ↵Michael Sevakis2009-01-08
| | | | | | tasks and wait for a button when an unrecoverable error has occurred (panic, UIE, etc.). Returning from that function should reboot or don't return from it. Move UIE and __div0 for ARM to its own file. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19716 a1c6a512-1295-4272-9138-f99709370657
* Macros should be ALL CAPS, so rename (un)likely() to (UN)LIKELY()Nils Wallménius2008-11-22
| | | | git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19181 a1c6a512-1295-4272-9138-f99709370657
* Introduce likely() and unlikely() macros, use to give gcc hints about which ↵Nils Wallménius2008-11-20
| | | | | | branch is likely to be taken in a conditional, use them in the midi player for a small speedup, use instead of similar EXPECT macros in tremor and use in mpegplayer git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19162 a1c6a512-1295-4272-9138-f99709370657
* Updated our source code header to explicitly mention that we are GPL v2 orDaniel Stenberg2008-06-28
| | | | | | | | | later. We still need to hunt down snippets used that are not. 1324 modified files... http://www.rockbox.org/mail/archive/rockbox-dev-archive-2008-06/0060.shtml git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17847 a1c6a512-1295-4272-9138-f99709370657
* remove leftover debug stuffMarcoen Hirschberg2008-06-27
| | | | git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17820 a1c6a512-1295-4272-9138-f99709370657
* initial Meizu M6SL port (take 2)Marcoen Hirschberg2008-06-27
| | | | git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17819 a1c6a512-1295-4272-9138-f99709370657
* Add a complete priority inheritance implementation to the scheduler (all ↵Michael Sevakis2008-03-25
| | | | | | mutex ownership and queue_send calls are inheritable). Priorities are differential so that dispatch depends on the runnable range of priorities. Codec priority can therefore be raised in small steps (pcmbuf updated to enable). Simplify the kernel functions to ease implementation and use the same kernel.c for both sim and target (I'm tired of maintaining two ;_). 1) Not sure if a minor audio break at first buffering issue will exist on large-sector disks (the main mutex speed issue was genuinely resolved earlier). At this point it's best dealt with at the buffering level. It seems a larger filechunk could be used again. 2) Perhaps 64-bit sims will have some minor issues (finicky) but a backroll of the code of concern there is a 5-minute job. All kernel objects become incompatible so a full rebuild and update is needed. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@16791 a1c6a512-1295-4272-9138-f99709370657
* mpegplayer: Make playback engine fully seekable and frame-accurate and split ↵Michael Sevakis2007-12-29
| | | | | | into logical parts. Be sure to have all current features work. Actual UI for seeking will be added soon. Recommended GOP size is about 15-30 frames depending on target or seeking can be slow with really long GOPs (nature of MPEG video). More refined encoding recommendations for a particular player should be posted soon. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@15977 a1c6a512-1295-4272-9138-f99709370657
* Add some CACHEALIGN_* macros and a helper function to assist in aligning ↵Michael Sevakis2007-11-08
| | | | | | data and buffers on PortalPlayer processors to cache line boundaries. They're noops when PROC_NEED_CACHEALIGN isn't defined. Go safe and increase the value to 32 since I'm not sure yet if 16 is sufficient - changing that is a one-liner. Add helper to plugin API which will be needed shortly. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@15523 a1c6a512-1295-4272-9138-f99709370657
* Finally full multicore support for PortalPlayer 502x targets with an eye ↵Michael Sevakis2007-10-16
| | | | | | towards the possibility of other types. All SVN targets the low-lag code to speed up blocking operations. Most files are modified here simple due to a name change to actually support a real event object and a param change to create_thread. Add some use of new features but just sit on things for a bit and leave full integration for later. Work will continue on to address size on sensitive targets and simplify things if possible. Any PP target having problems with SWP can easily be changed to sw corelocks with one #define change in config.h though only PP5020 has shown an issue and seems to work without any difficulties. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@15134 a1c6a512-1295-4272-9138-f99709370657
* Messages queues must be guarded on both ends or else it's a race between ↵Michael Sevakis2007-05-12
| | | | | | detecting a message present and missing a wakeup on thread about to wait. Keeping IRQs from interacting with the scheduler would be preferable but this should do at the moment. Add more detailed panic info regarding blocking violations so we know who. Make panicf function well enough on Gigabeat and PortalPlayer targets. Move the core sleep instructions into a CPU-specific inline to keep thing organized. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13374 a1c6a512-1295-4272-9138-f99709370657
* Portal Player: Add invalidate_icache and flush_icache. Flush the cache on ↵Michael Sevakis2007-04-13
| | | | | | the core for newborn threads. In doing so, move more ARM stuff to the target tree and organize it to make a clean job of it. If anything isn't appropriate for some particular device give a hollar or even just fix it by some added #ifdefing. I was informed that the PP targets are register compatible so I'm going off that advice. The Sansa likes it though. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13144 a1c6a512-1295-4272-9138-f99709370657
* Moved SH1 system code to target tree. * First shot at hwcompat cleanup.Jens Arnold2007-04-11
| | | | git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13114 a1c6a512-1295-4272-9138-f99709370657
* Fix the rest of them I hope.Michael Sevakis2007-03-29
| | | | git-svn-id: svn://svn.rockbox.org/rockbox/trunk@12958 a1c6a512-1295-4272-9138-f99709370657
* Add an asm swap_odd_even32 to SH and ARM. Have the byteswapping functions ↵Michael Sevakis2007-03-29
| | | | | | take and return intxx_t data types. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@12956 a1c6a512-1295-4272-9138-f99709370657
* Make scheduler functions thread safe core wise. A big step towards playback ↵Miika Pekkarinen2007-03-26
| | | | | | running on COP (not yet possible because more protection on file system level is necessary). git-svn-id: svn://svn.rockbox.org/rockbox/trunk@12926 a1c6a512-1295-4272-9138-f99709370657
* PNX0101 changes:Tomasz Malesinski2007-03-24
| | | | | | | | | | Make PNX0101-specific system.c and crt0.S. Add new register names from LPC2880 user manual. Add support for timer. Enable CPU frequency changing. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@12904 a1c6a512-1295-4272-9138-f99709370657
* Fix red builds and make udelay actually work as it should again.Barry Wardell2007-03-10
| | | | git-svn-id: svn://svn.rockbox.org/rockbox/trunk@12703 a1c6a512-1295-4272-9138-f99709370657
* Make udelay() wrap-safe.Barry Wardell2007-03-10
| | | | git-svn-id: svn://svn.rockbox.org/rockbox/trunk@12702 a1c6a512-1295-4272-9138-f99709370657
* Fix broken buildsJonathan Gordon2007-01-22
| | | | git-svn-id: svn://svn.rockbox.org/rockbox/trunk@12088 a1c6a512-1295-4272-9138-f99709370657
* Simple cpu boost tracker for LOGF builds. Shows the last 64 cpu_boost() ↵Jonathan Gordon2007-01-22
| | | | | | calls from the debug menu git-svn-id: svn://svn.rockbox.org/rockbox/trunk@12087 a1c6a512-1295-4272-9138-f99709370657
* add cpu frequency scaling to the gigabeat. default/normal: 100MHz, boosted: ↵Marcoen Hirschberg2007-01-16
| | | | | | 300MHz git-svn-id: svn://svn.rockbox.org/rockbox/trunk@12023 a1c6a512-1295-4272-9138-f99709370657
* Prepare core support for the iriver bootloader supporting ROM imagesMiika Pekkarinen2007-01-12
| | | | git-svn-id: svn://svn.rockbox.org/rockbox/trunk@11991 a1c6a512-1295-4272-9138-f99709370657
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