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* iPod Classic: use the new USB DesignWare driverCástor Muñoz2016-08-02
| | | | Change-Id: I36aabb5cb9cfe2d8c4f8fbcea944efec58ef9671
* Introduce new USB driver for Synopsys DesignWare USB OTG core.Cástor Muñoz2016-08-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on g#844 and g#949, it is intended as a replacement for the current s3c6400x USB driver. The DesignWare USB OTG core is integrated into many SoC's, however HW core version and capabilities (mainly DMA mode, Tx FIFO mode, FIFO size and number of available IN/OUT endpoins) may differ: CPU targets HW ver DMA NPTX FIFO FIFO sz #IN/OUT -------- ------------- ------ --- --------- ------- ------- as3525v2 sansaclipplus 2.60a Yes Dedicated 0x535 4/4 sansaclipv2 sansaclipzip sansafuzev2 s5l8701 ipodnano2g 2.20a Yes Shared 0x500 4/5 s5l8702 ipod6g 2.60a Yes Dedicated 0x820 7/7 ipodnano3g s5l8720 ipodnano4g ? ? ? ? ? Functionality supported by this driver: - Device mode, compatible with USB 1.1/2.0 hosts. - Shared FIFO (USB_DW_SHARED_FIFO) or dedicated FIFOs. - No DMA (USB_DW_ARCH_SLAVE) or internal DMA mode. - Concurrent transfers: control, bulk (usb_storage, usb_serial) and interrupt (usb_hid). Actually this driver is not used by any CPU, it will be enabled for each individual CPU/target in next patches. Change-Id: I74a1e836d18927a31f6977d71115fb442477dd5f
* zenxfi3: recalibrate battery curveAmaury Pouly2016-06-12
| | | | | | | Apparently I simply forgot to calibrate it when the port was done and the current values are just plain wrong, especially for the charging curve. Change-Id: Ied3cafa52f31f182f953714e28edc4c5e891255f
* iPod Nano2G: clear external interrupts at startupCástor Muñoz2016-06-10
| | | | | | | Fixes some ROLO issues after commit 9a4cd2e. Note that other ROLO issues still persist. Change-Id: I8e0c60519902013694c5a473dcb9fc62a6ff079c
* imx233: fix power off codeAmaury Pouly2016-06-08
| | | | | | | | | | There are two very suspicious things in the power off code: - it does not properly unlock the power register, so it should fail (!) - it does not disable sw/hw watchdog so if register fails, the device will most probably crash horribly because of the watchdog I don't even understand how it worked before. Change-Id: I9f3f94bd012e52c3b50cd5b658d68b5eb907f79b
* fix yellowAmaury Pouly2016-06-01
| | | | Change-Id: Ie18d7f83ba3e7293d4cd110429e1578930d35d99
* imx233: fix stupid typo in debug screenAmaury Pouly2016-06-01
| | | | Change-Id: Ife43543d6eee6522f4016f37479a20a0db39240d
* zenxfi3: rewrite mpr121 driverAmaury Pouly2016-06-01
| | | | | | The new driver uses an asynchronous architecture for touch status reading. Change-Id: Ic75a8b91bc47ee16c3af873afde178cd70186376
* fuze+: rewrite touchpad driverAmaury Pouly2016-06-01
| | | | | | | | | | | | | | | The old driver was bad in many respect, it had some race conditions, it was using a thread to serialize transfers because of the legacy i2c interface. It also had huge latency (typically 50ms but delays up to 300ms can happen), thus some presses were missed. The new driver takes advantage of the new i2c driver to do everything asynchronously. It also does not need a thread anymore because queueing ensures proper serialization. It provides much better and reliable latency (typically ~2ms). Also fix the debug screen which was horribly broken. The new screen also displays the deadzones. Change-Id: I69b7f99b75053e6b1d3d56beb4453c004fd2076e
* imx233: rewrite i2c driverAmaury Pouly2016-06-01
| | | | | | | | | | The new driver provides several new features: - asynchronous transfer - transactions (several transfers executed at once) - queueing The style still provides the legacy interface. Change-Id: I6d8ecc89d1f7057847c9b2dc69b76cd45c9c8407
* Fix red, forgotten fileAmaury Pouly2016-05-29
| | | | Change-Id: Ia9c1e924c84772205472289494c62a63a3433727
* imx233: two minor fixes for sd/mmcAmaury Pouly2016-05-29
| | | | | | | | | Always enable support for SET_BLOCK_COUNT on mmc: it is mandatory. For some reason (probably a mistake) it was disabled unconditionaly on mmc. Also deselect sd card after init. Although it is unlikely to make a difference, it is already done for mmc so stay consistent. Change-Id: I276f0d95f5bb6a0bf431c2fff4589d3dfb15f8c7
* imx233: add sd/mmc debug screenAmaury Pouly2016-05-29
| | | | | | | The screen currently displays for each device the bus width, set_block_count support, HS capability and whether it is enabled for not. Change-Id: I6b1c3b1019e55ef1097a23c1f54fb07f5c7aa3b0
* imx233: fix button debug screen on landscape mode screenAmaury Pouly2016-05-29
| | | | | | | Some players like the ZEN X-Fi have a wide but not tall screen, it is thus better to display everything on one line for each button Change-Id: Ided3d4ff689cc5d3bcc2bdba4c7e046cf7dc0954
* imx233: fix redAmaury Pouly2016-05-28
| | | | | | stop pretending that stmp3600 and stmp3700 have a 4.2V power rail Change-Id: If2506ed3e7c5db96dedc668f0931d59a5197dd88
* imx233: add new power debug screenAmaury Pouly2016-05-28
| | | | | | | | | | This screen allows to put the device in a special mode where: - charging is disabled - device only draws power from 5V (thus battery is untouched) This is useful to measure the device consumption by measuring directly the usb power consumption. Change-Id: I2716ced0a5bb33c3c9a2607f2d17a0ce02f5689c
* imx233: fix debug screen button handlingAmaury Pouly2016-05-28
| | | | | | The code was very primitive and did not handle release events properly. Change-Id: I1c56005282a9fb6608f79ff3b483ba614d635fdb
* imx233: speedup charging trickle phaseAmaury Pouly2016-05-28
| | | | | | | | | Per Freescale recommandation, we need to ramp up the 4.2V rail before enabling charging. Ramping should be done at 1 step/10ms, but the old code did 1 step/1s because the powermgmt_step() function is called once every second. Use a tick task to ramp up much faster. Change-Id: I9a52bdd0c2ba5426d83ed42db8db7ecce2fea1f7
* imx233: fix system_exception_wait()Amaury Pouly2016-05-28
| | | | | | | | | The old code used button_get() to read the button status and wait for a key to leave the panic screen. This is broken since when IRQ are disable, the button mask is not updated anymore for touchpad and adc buttons. For now, only use pswitch: this should be good enough for all targets. Change-Id: I0ae179e24555ac20c3d2bf2d267c1bb0e2ceded0
* imx233: fix frequency reportingAmaury Pouly2016-05-28
| | | | | | | The code reported the frequency in kHz instead of Hz, thus breaking a debug screen. Change-Id: Id46de970cfb55bcdc09b63f59b244ee3ad6264b8
* imx233: simplify timrot APIAmaury Pouly2016-05-28
| | | | | | | | The old timrot setup API was very low-level and unfriendly. The new one makes in easier to select the frequency source. Use to simplify timer and kernel timer code. Change-Id: Iffcdf11c00e925be9ec8d9a4efc74b197b6bd2aa
* zenxfi3: fix headphone detectionAmaury Pouly2016-05-28
| | | | | | | | The adc channel monitored for jack detection does not really have a fixed value when plugged. Instead use the same logic as the OF and simply use a threshold. Change-Id: I1d5270d83eb14decce29a39d8201ea1d1fb4436c
* nwz-370/380: increase adc button error marginAmaury Pouly2016-05-28
| | | | | | | | For some reason those targets have quite imprecise button voltages and the old margin was too small. This should fix the button-not-working issue, especially when the player is very hot and cold. Change-Id: I9fcddd7f079cd1c4ee121567fb21a4a0cbc0562b
* imx233: enhance button driver adc handlingAmaury Pouly2016-05-28
| | | | | | | | | | | The current driver is limited to checking if the adc value equals another one with a hardcoded margin. This commit changes two aspects of that: - the margin can be changed globally using IMX233_BUTTON_LRADC_MARGIN and can also be overriden per button using the new LRADC_EX macro - the lradc logic gained two comparison modes to check if the source value is greater (or lower) than a threshold. Change-Id: If1614451dafeae818a96e6f23a84e6731331ba03
* imx233: cosmeticsAmaury Pouly2016-05-28
| | | | | | | | Shorten some text to make the text readable in the debug screen of targets with small LCD (like NWZ-380). In some screens, the only option is to display less information. Change-Id: I78f8f35f7c507de19e5d27a918157504155f2ba6
* imx233: make sure not to discharge battery when charge is completeAmaury Pouly2016-05-28
| | | | | | | | | | The power management code was erroneously shuting down the 4.2V rail when charging is complete. This resulted in the DCDC draining the battery and thus the battery discharging with USB plugged... The new code keeps the 4.2V rail active so that battery remains untouched once charge is complete. Change-Id: I36e8d31e8115c12ce813c939c5d7bbf2c3490157
* imx233: generate register headers using headergen_v2 and update code for itAmaury Pouly2016-05-28
| | | | | | | | | | | | | | | | | | | | | | | | | NOTE: this commit does not introduce any change, ideally even the binary should be almost the same. I checked the disassembly by hand and there are only a few differences here and there, mostly the compiler decides to compile very close expressions slightly differently. I tried to run the new code on several targets to make sure and saw no difference. The major syntax changes of the new headers are as follows: - BF_{WR,SET,CLR} are now superpowerful and allows to set several fileds at once: BF_WR(reg, field1(value1), field2(value2), ...) - BF_CS (use like BF_WR) does a write to reg_CLR and then reg_SET instead of RMW - there is no more need for macros like BF_{WR_,SET,CLR}_V, since one can simply BF_WR with field_V(name) - the old BF_SETV macro has no trivial equivalent and is replaced with its its equivalent for BF_WR(reg_SET, ...) I also rename the register headers: "regs/regs-x.h" -> "regs/x.h" to avoid the redundant "regs". Final note: the registers were generated using the following command: ./headergen_v2 -g imx -o ../../firmware/target/arm/imx233/regs/ desc/regs-stmp3{600,700,780}.xml Change-Id: I7485e8b4315a0929a8edb63e7fa1edcaa54b1edc
* iPod Classic: fix typos / cosmeticCástor Muñoz2016-05-28
| | | | Change-Id: Ic6552dea4b300032875097ef0b885a4ae059f4bc
* iPod Classic: i2c updatesCástor Muñoz2016-05-26
| | | | Change-Id: Ib516f3f52cf619fb44dc1bb6982b635c49f53a8f
* iPod Classic: define USB_STATUS_BY_EVENT and USB_DETECT_BY_REQUESTCástor Muñoz2016-05-26
| | | | Change-Id: I333fe779d8977bf58a579561466ef8872aa4e228
* iPod Classic: use PMU interrupts to detect USB and FWCástor Muñoz2016-05-26
| | | | Change-Id: I9be733e1a943ddeb99335d362f81f74879eeb94b
* iPod Classic: use PMU interrupts to detect accessoriesCástor Muñoz2016-05-26
| | | | | | | | | | | | - Speed auto detection is launched when an accessory is inserted, so the user doesn't need to modify settings to use accessories that operates at different speeds (or when the same accessory is unplugged and plugged again). - UART controller is disabled when no accessory is inserted, not much powersave but everything counts. Change-Id: If20c3617c2a87b6277fd7e0270031030c44fa953
* iPod Classic: use PMU interrupts to detect hold switchCástor Muñoz2016-05-26
| | | | | | | Finally the hold switch workaround is removed and it is detected in the same way as OF does. Change-Id: Iceac6ca48ffd131b8ee9f62ffdc2b3e30eb02042
* Sansa Connect: change bootloader linker fileTomasz Moń2016-05-25
| | | | | | | | | | | | | | This change ensures that Sansa Connect bootloader.bin will fit in its flash partition. Fix _flash_sizem calculation, division was not working properly because FLASHSIZE included subtraction and defined value was not in parenthesis. Prior to this change _flash_sizem was 0x00800000, now it is correctly set to 4 in case of Sansa Connect and 8 in case of other TMS320DM320 players. This significantly improves boot time as cache is now enabled only for real flash memory region. Change-Id: If3e50a3075c840dcb69dfafe5bba608a0acd2bf8
* iPod Classic: introduce PMU interruptsCástor Muñoz2016-05-25
| | | | | | | | | | PMU interrupts are used to detect USB Vbus, wall adaptor, accessories and holdswitch. A thread is needed to poll the PMU throught I2C, ATM it does nothing but showing the state of the inputs on the HW debug menu, funcionallity for each individual input will be added in next patches. Change-Id: If93bf2044d1052729237a7fd1431c8493e09f1c7
* iPod Classic: rework on external interruptsCástor Muñoz2016-05-25
| | | | Change-Id: I5be450adeb12b16070d9bfa31503e2ef350b2981
* iPod Classic: HW initialization for RBCástor Muñoz2016-05-25
| | | | | | | Do not rely on a bootloader initializing the HW, RB initializes and configures GPIO, I2C, and PMU at startup. Change-Id: If7f856b1f345f63de584aa4e4fc22d130cd66c80
* iPod Classic: piezo support for bootloaderCástor Muñoz2016-05-25
| | | | | | | | Low level functions that do not depend on Rockbox kernel, intended to be used by the bootloader, dualboot-installer, RB drivers or other .dfu tools. Change-Id: If80214d26e505265ace19d9704f1e1300f98b2f4
* iPod Classic: LCD init sequences for bootloaderCástor Muñoz2016-05-25
| | | | Change-Id: I27b7d5fea3164df8d85f7d431dc5301e8cee123d
* iPod Classic: HW preliminary initialization for bootloaderCástor Muñoz2016-05-25
| | | | | | | | | | | When the bootloader starts, most of HW never has been initialized. This patch includes all code needed to perform the preliminary initialization on SYSCON, GPIO, i2c, and MIU. The code is based on emCORE and OF reverse engineering, ported to C for readability. Change-Id: I9ecf2c3e8b1b636241a211dbba8735137accd05c
* iPod Classic: modify USB storage read/write buffers sizeCástor Muñoz2016-05-15
| | | | | | | | | The write buffer size is undefined to use the default 24Kb. size defined (and recomended) in usb_storage.c, the read buffer size is also decremented to 24 Kb. USB sequential read and write benchmarks using diskdump are now 8-9% faster. Change-Id: Ia7c9f77b57c8ca5b566b508efffbd713d1587acf
* iPod Classic: wait for ATA power down on device shutdownCástor Muñoz2016-05-15
| | | | Change-Id: I5d3d19d6d0c937e11e28b99f34d729631051ab93
* iPod Classic: optimize UDMA timming for ATA drivesCástor Muñoz2016-05-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch optimizes UDMA timings to increase write transfer rate on ATA bus, these transfers are clocked by HCLK, tDVS+tDVH is modified to decrease Tcyctyp (typical write cycle period). This is not overclocking, we meet the ATA standar, the settings used by OF are not well optimized for each UDMA mode, we will never know but probably this was due some documentation issue. ATA_UDMA_TIME register is documented on s3c6400 datasheet, information included in s5l8700 datasheet is wrong or not valid for s5l8702. From ATA specs, (Minimum, Maximum) values in nanoseconds: UDMA 0 UDMA 1 UDMA 2 UDMA 3 UDMA 4 tACKENV (20, 70) (20, 70) (20, 70) (20, 55) (20, 55) tRP (160, --) (125, --) (100, --) (100, --) (100, --) tSS (50, --) (50, --) (50, --) (50, --) (50, --) tDVS (70, --) (48, --) (31, --) (20, --) (6.7, --) tDVH (6.2, --) (6.2, --) (6.2, --) (6.2, --) (6.2, --) tDVS+tDVH (120, --) (80, --) (60, --) (45, --) (30, --) Tcyc = tDVS+tDVH WR[bytes/s] = 1/Tcyc[s] * 2[bytes] On Classic (boosted): HClk = 108 MHz. -> T = ~9.26 ns. Old values (used by OF): UDMA ATA_UDMA_TIME tACK tRP tSS tDVS tDVH Tcyc WR(MB/s) 0 0x5071152 27.8 166.7 55.6 74.1 55.6 129.7 15.4 1 0x3050a52 27.8 101.8 55.6 55.6 37 92.6 21.6 2 0x3030a52 27.8 101.8 55.6 37 37 74 27 3 0x2020a52 27.8 101.8 55.6 27.8 27.8 55.6 36 4 0x2010a52 27.8 101.8 55.6 18.5 27.8 46.3 43.2 New values: UDMA ATA_UDMA_TIME tACK tRP tSS tDVS tDVH Tcyc WR(MB/s) 0 0x4071152 27.8 166.7 55.6 74.1 46.3 120.4 16.6 1 0x2050d52 27.8 129.6 55.6 55.6 27.8 83.4 24 2 0x2030a52 27.8 101.8 55.6 37 27.8 64.8 30.9 3 0x1020a52 27.8 101.8 55.6 27.8 18.5 46.3 43.2 4 0x1010a52 27.8 101.8 55.6 18.5 18.5 37 54 To verify that the settings are correct, a write-to-cache test was performed using emCORE, the measured transfer rate (WRm) is compared against the theoric transfer rate (WR) at 108 Mhz for the old and the new UDMA4 settings (iPod 160, HDD Toshiba MK1634GAL): UDMA ATA_UDMA_TIME Tcyc(ns) WR(MB/s) WRm(MB/s) RDm(MB/s) 4 0x2010a52 46.3 43.2 42.9 59.8 4 0x1010a52 37 54 53.5 59.8 Notes: - The new UDMA4 settings increases ~25% the ATA transfer rate for cached-writes. The real HDD write speed is limited by the internal transfer rate (depends on cilinder, for the MK1634GAL it is 276 to 573 Mbits/s). Sequential write benchmark using diskdump on USB are ~8% faster. - Read transfers are clocked by the device, it depends on UDMA mode selected and are not affected by HClk or ATA_UDMA_TIME settings. Read-from-cache tests results (RDm) using HClk=108 and HClk=54 for UDMA4 are 59.8 MB/s on MK1634GAL. - Minimum HClk is limited by tACKENV specs, using current settings it is 54 MHz for UDMA4,UDMA3 and 43 MHz for UDMA2,UDMA1,UDMA0. Change-Id: I61d67060410752518a59e1ff08072b21747ca997
* iPod Classic: remove ATA_HAVE_BBTCástor Muñoz2016-05-15
| | | | Change-Id: I45e26a413c13e401164a01996b0b4c6788096a7f
* iPod Classic: remove emCORE HDD endianess warningCástor Muñoz2016-05-15
| | | | Change-Id: I91aa2dca7e748fe043c16014661985c42ab84b1a
* iPod Classic: prepare i2c and PMU for bootloaderCástor Muñoz2016-05-15
| | | | | | | | | | | | | When the bootloader starts only IRAM is available, the first task is to ask the PMU to verify if the iPod has previously been hibernated by OF. Due to memory limitations, the kernel cannot be used on this stage. This patch modifies I2C and PMU low level functions to not to depend on kernel (removes mutexes, and uses HW timer instead of current_tick), actual kernel functions are modified to be 'mutexed' wrappers of the new functions. Change-Id: I7cef9e95dedaf176dc0659315f3dc33166d5b116
* iPOd Classic: skip emCORE HDD endianness warning for bootloaderCástor Muñoz2016-05-15
| | | | Change-Id: I274511cc1061c396a0642e8496d46a3b9c1228d3
* dx90: fix spurious button eventsAmaury Pouly2016-05-14
| | | | | | | | | The kernel on this device reports nonexistent key presses, in particular it reports right presses when pressing the left button... Since when it happens, the right press comes after the left one, the new code simply ignores any right press when the left button in pressed. Change-Id: Ib6ced02682d9cecf4c7f6c58834907a667419cd7
* iPod Nano2G: add IPOD_ACCESSORY_PROTOCOLCástor Muñoz2016-05-14
| | | | Change-Id: I78a19972624504bc802d96b9b8e9cec132164c2c
* iPod Nano2G: add HAVE_SERIALCástor Muñoz2016-05-13
| | | | Change-Id: I46dca69c6708d3e6189f66e70badf0a594bac00b
generated by cgit v1.1 at 2026-05-08 16:09:23 +0000