From 19a5dfea283c89540b61d0103ba0fe8ddee17612 Mon Sep 17 00:00:00 2001 From: Rob Purchase Date: Tue, 1 Sep 2009 21:35:37 +0000 Subject: D2: Enable ARM cache coherency functions (eg. during codec load), which should eliminate data aborts/freezes on track changes. NOTE: The linker script reserves space at the end of DRAM for the TTB, but this is not currently used. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@22595 a1c6a512-1295-4272-9138-f99709370657 --- apps/plugins/plugin.lds | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'apps/plugins') diff --git a/apps/plugins/plugin.lds b/apps/plugins/plugin.lds index 70bc3e0..f93d5d4 100644 --- a/apps/plugins/plugin.lds +++ b/apps/plugins/plugin.lds @@ -61,6 +61,10 @@ OUTPUT_FORMAT(elf32-littlemips) #define TTB_SIZE (0x4000) #define DRAMSIZE (MEMORYSIZE * 0x100000) - STUBOFFSET - PLUGIN_BUFFER_SIZE - CODEC_SIZE - LCD_BUFFER_SIZE - TTB_SIZE +#elif CONFIG_CPU==TCC7801 +#include "cpu.h" +#define DRAMSIZE (MEMORYSIZE * 0x100000) - STUBOFFSET - PLUGIN_BUFFER_SIZE - CODEC_SIZE - TTB_SIZE + #elif CONFIG_CPU==AS3525 #include "cpu.h" #define DRAMORIG DRAM_ORIG -- cgit v1.1