From e02a1a534d40a4acd482a8bc9fca88d3ffaf75fa Mon Sep 17 00:00:00 2001
From: Marcoen Hirschberg <marcoen@gmail.com>
Date: Fri, 1 Jul 2005 07:55:19 +0000
Subject: - enable S/PDIF optical output - set the proper noise shape filter

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@6959 a1c6a512-1295-4272-9138-f99709370657
---
 firmware/pcm_playback.c | 21 ++++++++++++++-------
 1 file changed, 14 insertions(+), 7 deletions(-)

(limited to 'firmware/pcm_playback.c')

diff --git a/firmware/pcm_playback.c b/firmware/pcm_playback.c
index cad835e..9a261db 100644
--- a/firmware/pcm_playback.c
+++ b/firmware/pcm_playback.c
@@ -106,6 +106,7 @@ static void dma_start(const void *addr, long size)
 
     /* Reset the audio FIFO */
     IIS2CONFIG = 0x800;
+    EBU1CONFIG = 0x800;
     
     /* Set up DMA transfer  */
     SAR0 = ((unsigned long)addr); /* Source address */
@@ -113,7 +114,9 @@ static void dma_start(const void *addr, long size)
     BCR0 = size;                  /* Bytes to transfer */
 
     /* Enable the FIFO and force one write to it */
-    IIS2CONFIG = (pcm_freq << 12) | 0x300;
+    IIS2CONFIG = (pcm_freq << 12) | 0x300 | 4 << 2;
+    /* Also send the audio to S/PDIF */
+    EBU1CONFIG = 7 << 12 |  3 << 8 | 5 << 2;
     DCR0 = DMA_INT | DMA_EEXT | DMA_CS | DMA_SINC | DMA_START;
 }
 
@@ -140,6 +143,7 @@ static void dma_stop(void)
     DCR0 = 0;
     /* Reset the FIFO */
     IIS2CONFIG = 0x800;
+    EBU1CONFIG = 0x800;
 }
 
 /* sets frequency of input to DAC */
@@ -148,16 +152,17 @@ void pcm_set_frequency(unsigned int frequency)
     switch(frequency)
     {
     case 11025:
-        pcm_freq = 0x2;
-        break;
-    case 22050:
         pcm_freq = 0x4;
+        uda1380_set_nsorder(3);
         break;
-    case 44100:
+    case 22050:
         pcm_freq = 0x6;
+        uda1380_set_nsorder(3);
         break;
+    case 44100:
     default:
-        pcm_freq = 0x6;
+        pcm_freq = 0xC;
+        uda1380_set_nsorder(5);
         break;
     }
 }
@@ -266,7 +271,8 @@ void pcm_play_pause(bool play)
         SAR0 = (unsigned long)next_start;
         BCR0 = next_size;
         /* Enable the FIFO and force one write to it */
-        IIS2CONFIG = (pcm_freq << 12) | 0x300;
+        IIS2CONFIG = (pcm_freq << 12) | 0x300 | 4 << 2;
+        EBU1CONFIG = 7 << 12 |  3 << 8 | 5 << 2;
         DCR0 |= DMA_EEXT | DMA_START;
     }
     else if(!pcm_paused && !play)
@@ -275,6 +281,7 @@ void pcm_play_pause(bool play)
         /* Disable DMA peripheral request. */
         DCR0 &= ~DMA_EEXT;
         IIS2CONFIG = 0x800;
+        EBU1CONFIG = 0x800;
     }
     pcm_paused = !play;
 }
-- 
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