From c4d0a0ed8f09ba4e985ab86c17e449cc7690aa4c Mon Sep 17 00:00:00 2001 From: Karl Kurbjun Date: Sun, 30 Sep 2007 16:36:25 +0000 Subject: Move some more files git-svn-id: svn://svn.rockbox.org/rockbox/trunk@14920 a1c6a512-1295-4272-9138-f99709370657 --- firmware/SOURCES | 10 +- firmware/target/arm/tms320dm320/kernel-dm320.c | 63 ++++++++ firmware/target/arm/tms320dm320/kernel-mr500.c | 63 -------- firmware/target/arm/tms320dm320/spi-dm320.c | 77 +++++++++ firmware/target/arm/tms320dm320/spi-mr500.c | 77 --------- firmware/target/arm/tms320dm320/system-dm320.c | 210 +++++++++++++++++++++++++ firmware/target/arm/tms320dm320/system-mr500.c | 210 ------------------------- firmware/target/arm/tms320dm320/timer-dm320.c | 106 +++++++++++++ firmware/target/arm/tms320dm320/timer-mr500.c | 106 ------------- firmware/target/arm/tms320dm320/uart-dm320.c | 172 ++++++++++++++++++++ firmware/target/arm/tms320dm320/uart-mr500.c | 172 -------------------- 11 files changed, 633 insertions(+), 633 deletions(-) create mode 100644 firmware/target/arm/tms320dm320/kernel-dm320.c delete mode 100644 firmware/target/arm/tms320dm320/kernel-mr500.c create mode 100644 firmware/target/arm/tms320dm320/spi-dm320.c delete mode 100644 firmware/target/arm/tms320dm320/spi-mr500.c create mode 100644 firmware/target/arm/tms320dm320/system-dm320.c delete mode 100644 firmware/target/arm/tms320dm320/system-mr500.c create mode 100644 firmware/target/arm/tms320dm320/timer-dm320.c delete mode 100644 firmware/target/arm/tms320dm320/timer-mr500.c create mode 100644 firmware/target/arm/tms320dm320/uart-dm320.c delete mode 100644 firmware/target/arm/tms320dm320/uart-mr500.c (limited to 'firmware') diff --git a/firmware/SOURCES b/firmware/SOURCES index bc0c83f..c864b08 100644 --- a/firmware/SOURCES +++ b/firmware/SOURCES @@ -633,11 +633,11 @@ target/arm/tms320dm320/mrobe-500/powermgmt-mr500.c target/arm/tms320dm320/mrobe-500/power-mr500.c target/arm/tms320dm320/mrobe-500/usb-mr500.c target/arm/tms320dm320/i2c-dm320.c -target/arm/tms320dm320/kernel-mr500.c -target/arm/tms320dm320/spi-mr500.c -target/arm/tms320dm320/system-mr500.c -target/arm/tms320dm320/timer-mr500.c -target/arm/tms320dm320/uart-mr500.c +target/arm/tms320dm320/kernel-dm320.c +target/arm/tms320dm320/spi-dm320.c +target/arm/tms320dm320/system-dm320.c +target/arm/tms320dm320/timer-dm320.c +target/arm/tms320dm320/uart-dm320.c #ifndef BOOTLOADER #endif diff --git a/firmware/target/arm/tms320dm320/kernel-dm320.c b/firmware/target/arm/tms320dm320/kernel-dm320.c new file mode 100644 index 0000000..be2b14b --- /dev/null +++ b/firmware/target/arm/tms320dm320/kernel-dm320.c @@ -0,0 +1,63 @@ +/*************************************************************************** + * __________ __ ___. + * Open \______ \ ____ ____ | | _\_ |__ _______ ___ + * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / + * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < + * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ + * \/ \/ \/ \/ \/ + * $Id$ + * + * Copyright (C) 2007 by Karl Kurbjun + * + * All files in this archive are subject to the GNU General Public License. + * See the file COPYING in the source tree root for full license agreement. + * + * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY + * KIND, either express or implied. + * + ****************************************************************************/ + +#include "config.h" +#include "system.h" +#include "kernel.h" +#include "timer.h" +#include "thread.h" + +extern void (*tick_funcs[MAX_NUM_TICK_TASKS])(void); + +void tick_start(unsigned int interval_in_ms) +{ + IO_TIMER1_TMMD = CONFIG_TIMER1_TMMD_STOP; + + /* Setup the Prescalar (Divide by 10) + * Based on linux/include/asm-arm/arch-integrator/timex.h + */ + IO_TIMER1_TMPRSCL = 0x000A; + + /* Setup the Divisor */ + IO_TIMER1_TMDIV = (TIMER_FREQ / (10*1000))*interval_in_ms; + + /* Turn Timer1 to Free Run mode */ + IO_TIMER1_TMMD = CONFIG_TIMER1_TMMD_FREE_RUN; + + /* Enable the interrupt */ + IO_INTC_EINT0 |= 1< ) \___| < | \_\ ( <_> > < < - * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ - * \/ \/ \/ \/ \/ - * $Id$ - * - * Copyright (C) 2007 by Karl Kurbjun - * - * All files in this archive are subject to the GNU General Public License. - * See the file COPYING in the source tree root for full license agreement. - * - * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY - * KIND, either express or implied. - * - ****************************************************************************/ - -#include "config.h" -#include "system.h" -#include "kernel.h" -#include "timer.h" -#include "thread.h" - -extern void (*tick_funcs[MAX_NUM_TICK_TASKS])(void); - -void tick_start(unsigned int interval_in_ms) -{ - IO_TIMER1_TMMD = CONFIG_TIMER1_TMMD_STOP; - - /* Setup the Prescalar (Divide by 10) - * Based on linux/include/asm-arm/arch-integrator/timex.h - */ - IO_TIMER1_TMPRSCL = 0x000A; - - /* Setup the Divisor */ - IO_TIMER1_TMDIV = (TIMER_FREQ / (10*1000))*interval_in_ms; - - /* Turn Timer1 to Free Run mode */ - IO_TIMER1_TMMD = CONFIG_TIMER1_TMMD_FREE_RUN; - - /* Enable the interrupt */ - IO_INTC_EINT0 |= 1< + * Copyright (C) 2007 Catalin Patulea + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include "system.h" + +#define GIO_TS_ENABLE (1<<2) +#define clr_gio_enable() IO_GIO_BITSET1=GIO_TS_ENABLE +#define set_gio_enable() IO_GIO_BITCLR1=GIO_TS_ENABLE + +int spi_block_transfer(const uint8_t *tx_bytes, unsigned int tx_size, + uint8_t *rx_bytes, unsigned int rx_size) +{ + /* Activate the slave select pin */ + set_gio_enable(); + + while (tx_size--) + { + /* Send one byte */ + IO_SERIAL0_TX_DATA = *tx_bytes++; + + /* Wait until transfer finished */ + while (IO_SERIAL0_RX_DATA & 0x100); + } + + while (rx_size--) + { + /* Make the clock tick */ + IO_SERIAL0_TX_DATA = 0; + + /* Wait until transfer finished */ + unsigned short data; + while ((data = IO_SERIAL0_RX_DATA) & 0x100); + + *rx_bytes++ = data & 0xff; + } + + clr_gio_enable(); + + return 0; +} + +void spi_init(void) +{ + /* Set SCLK idle level = 0 */ + IO_SERIAL0_MODE |= (1<<10); + + /* Enable TX */ + IO_SERIAL0_TX_ENABLE = 0x0001; + + /* Set GIO 18 to output for touch screen slave enable */ + IO_GIO_DIR1&=~GIO_TS_ENABLE; + clr_gio_enable(); +} diff --git a/firmware/target/arm/tms320dm320/spi-mr500.c b/firmware/target/arm/tms320dm320/spi-mr500.c deleted file mode 100644 index c47ab8f..0000000 --- a/firmware/target/arm/tms320dm320/spi-mr500.c +++ /dev/null @@ -1,77 +0,0 @@ -/* - * SPI interface driver for the DM320 SoC - * - * Copyright (C) 2007 shirour - * Copyright (C) 2007 Catalin Patulea - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#include "system.h" - -#define GIO_TS_ENABLE (1<<2) -#define clr_gio_enable() IO_GIO_BITSET1=GIO_TS_ENABLE -#define set_gio_enable() IO_GIO_BITCLR1=GIO_TS_ENABLE - -int spi_block_transfer(const uint8_t *tx_bytes, unsigned int tx_size, - uint8_t *rx_bytes, unsigned int rx_size) -{ - /* Activate the slave select pin */ - set_gio_enable(); - - while (tx_size--) - { - /* Send one byte */ - IO_SERIAL0_TX_DATA = *tx_bytes++; - - /* Wait until transfer finished */ - while (IO_SERIAL0_RX_DATA & 0x100); - } - - while (rx_size--) - { - /* Make the clock tick */ - IO_SERIAL0_TX_DATA = 0; - - /* Wait until transfer finished */ - unsigned short data; - while ((data = IO_SERIAL0_RX_DATA) & 0x100); - - *rx_bytes++ = data & 0xff; - } - - clr_gio_enable(); - - return 0; -} - -void spi_init(void) -{ - /* Set SCLK idle level = 0 */ - IO_SERIAL0_MODE |= (1<<10); - - /* Enable TX */ - IO_SERIAL0_TX_ENABLE = 0x0001; - - /* Set GIO 18 to output for touch screen slave enable */ - IO_GIO_DIR1&=~GIO_TS_ENABLE; - clr_gio_enable(); -} diff --git a/firmware/target/arm/tms320dm320/system-dm320.c b/firmware/target/arm/tms320dm320/system-dm320.c new file mode 100644 index 0000000..fad2d43 --- /dev/null +++ b/firmware/target/arm/tms320dm320/system-dm320.c @@ -0,0 +1,210 @@ +/*************************************************************************** + * __________ __ ___. + * Open \______ \ ____ ____ | | _\_ |__ _______ ___ + * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / + * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < + * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ + * \/ \/ \/ \/ \/ + * $Id$ + * + * Copyright (C) 2007 by Karl Kurbjun + * + * All files in this archive are subject to the GNU General Public License. + * See the file COPYING in the source tree root for full license agreement. + * + * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY + * KIND, either express or implied. + * + ****************************************************************************/ + +#include "kernel.h" +#include "system.h" +#include "panic.h" + +#define default_interrupt(name) \ + extern __attribute__((weak,alias("UIRQ"))) void name (void) + +default_interrupt(TIMER0); +default_interrupt(TIMER1); +default_interrupt(TIMER2); +default_interrupt(TIMER3); +default_interrupt(CCD_VD0); +default_interrupt(CCD_VD1); +default_interrupt(CCD_WEN); +default_interrupt(VENC); +default_interrupt(SERIAL0); +default_interrupt(SERIAL1); +default_interrupt(EXT_HOST); +default_interrupt(DSPHINT); +default_interrupt(UART0); +default_interrupt(UART1); +default_interrupt(USB_DMA); +default_interrupt(USB_CORE); +default_interrupt(VLYNQ); +default_interrupt(MTC0); +default_interrupt(MTC1); +default_interrupt(SD_MMC); +default_interrupt(SDIO_MS); +default_interrupt(GIO0); +default_interrupt(GIO1); +default_interrupt(GIO2); +default_interrupt(GIO3); +default_interrupt(GIO4); +default_interrupt(GIO5); +default_interrupt(GIO6); +default_interrupt(GIO7); +default_interrupt(GIO8); +default_interrupt(GIO9); +default_interrupt(GIO10); +default_interrupt(GIO11); +default_interrupt(GIO12); +default_interrupt(GIO13); +default_interrupt(GIO14); +default_interrupt(GIO15); +default_interrupt(PREVIEW0); +default_interrupt(PREVIEW1); +default_interrupt(WATCHDOG); +default_interrupt(I2C); +default_interrupt(CLKC); +default_interrupt(ICE); +default_interrupt(ARMCOM_RX); +default_interrupt(ARMCOM_TX); +default_interrupt(RESERVED); + +static void (* const irqvector[])(void) = +{ + TIMER0,TIMER1,TIMER2,TIMER3,CCD_VD0,CCD_VD1, + CCD_WEN,VENC,SERIAL0,SERIAL1,EXT_HOST,DSPHINT, + UART0,UART1,USB_DMA,USB_CORE,VLYNQ,MTC0,MTC1, + SD_MMC,SDIO_MS,GIO0,GIO1,GIO2,GIO3,GIO4,GIO5, + GIO6,GIO7,GIO8,GIO9,GIO10,GIO11,GIO12,GIO13, + GIO14,GIO15,PREVIEW0,PREVIEW1,WATCHDOG,I2C,CLKC, + ICE,ARMCOM_RX,ARMCOM_TX,RESERVED +}; + +static const char * const irqname[] = +{ + "TIMER0","TIMER1","TIMER2","TIMER3","CCD_VD0","CCD_VD1", + "CCD_WEN","VENC","SERIAL0","SERIAL1","EXT_HOST","DSPHINT", + "UART0","UART1","USB_DMA","USB_CORE","VLYNQ","MTC0","MTC1", + "SD_MMC","SDIO_MS","GIO0","GIO1","GIO2","GIO3","GIO4","GIO5", + "GIO6","GIO7","GIO8","GIO9","GIO10","GIO11","GIO12","GIO13", + "GIO14","GIO15","PREVIEW0","PREVIEW1","WATCHDOG","I2C","CLKC", + "ICE","ARMCOM_RX","ARMCOM_TX","RESERVED" +}; + +static void UIRQ(void) +{ + unsigned int offset = (IO_INTC_IRQENTRY0>>2)-1; + panicf("Unhandled IRQ %02X: %s", offset, irqname[offset]); +} + +void irq_handler(void) __attribute__((interrupt ("IRQ"), naked)); +void irq_handler(void) +{ + /* + * Based on: linux/arch/arm/kernel/entry-armv.S and system-meg-fx.c + */ + + asm volatile( "stmfd sp!, {r0-r7, ip, lr} \n" /* Store context */ + "sub sp, sp, #8 \n"); /* Reserve stack */ + irqvector[(IO_INTC_IRQENTRY0>>2)-1](); + asm volatile( "add sp, sp, #8 \n" /* Cleanup stack */ + "ldmfd sp!, {r0-r7, ip, lr} \n" /* Restore context */ + "subs pc, lr, #4 \n"); /* Return from FIQ */ +} + +void fiq_handler(void) __attribute__((interrupt ("FIQ"), naked)); +void fiq_handler(void) +{ + /* + * Based on: linux/arch/arm/kernel/entry-armv.S and system-meg-fx.c + */ + + asm volatile ( + "sub lr, lr, #4 \r\n" + "stmfd sp!, {r0-r3, ip, lr} \r\n" + "mov r0, #0x00030000 \r\n" + "ldr r0, [r0, #0x518] \r\n" + "ldr r1, =irqvector \r\n" + "ldr r1, [r1, r0, lsl #2] \r\n" + "mov lr, pc \r\n" + "bx r1 \r\n" + "ldmfd sp!, {r0-r3, ip, pc}^ \r\n" + ); +} + +void system_reboot(void) +{ + +} + +void enable_interrupts (void) +{ + asm volatile ("msr cpsr_c, #0x13" ); +} + +void system_init(void) +{ + /* taken from linux/arch/arm/mach-itdm320-20/irq.c */ + + /* Clearing all FIQs and IRQs. */ + IO_INTC_IRQ0 = 0xFFFF; + IO_INTC_IRQ1 = 0xFFFF; + IO_INTC_IRQ2 = 0xFFFF; + + IO_INTC_FIQ0 = 0xFFFF; + IO_INTC_FIQ1 = 0xFFFF; + IO_INTC_FIQ2 = 0xFFFF; + + /* Masking all Interrupts. */ + IO_INTC_EINT0 = 0; + IO_INTC_EINT1 = 0; + IO_INTC_EINT2 = 0; + + /* Setting INTC to all IRQs. */ + IO_INTC_FISEL0 = 0; + IO_INTC_FISEL1 = 0; + IO_INTC_FISEL2 = 0; + + IO_INTC_ENTRY_TBA0 = + IO_INTC_ENTRY_TBA1 = 0; + + /* set GIO26 (reset pin) to output and low */ + IO_GIO_BITCLR1=(1<<10); + IO_GIO_DIR1&=~(1<<10); + + enable_interrupts(); +} + +int system_memory_guard(int newmode) +{ + (void)newmode; + return 0; +} + +#ifdef HAVE_ADJUSTABLE_CPU_FREQ + +void set_cpu_frequency(long frequency) +{ + if (frequency == CPUFREQ_MAX) + { + asm volatile("mov r0, #0\n" + "mrc p15, 0, r0, c1, c0, 0\n" + "orr r0, r0, #3<<30\n" /* set to Asynchronous mode*/ + "mcr p15, 0, r0, c1, c0, 0" : : : "r0"); + + FREQ = CPUFREQ_MAX; + } + else + { + asm volatile("mov r0, #0\n" + "mrc p15, 0, r0, c1, c0, 0\n" + "bic r0, r0, #3<<30\n" /* set to FastBus mode*/ + "mcr p15, 0, r0, c1, c0, 0" : : : "r0"); + + FREQ = CPUFREQ_NORMAL; + } +} + +#endif diff --git a/firmware/target/arm/tms320dm320/system-mr500.c b/firmware/target/arm/tms320dm320/system-mr500.c deleted file mode 100644 index fad2d43..0000000 --- a/firmware/target/arm/tms320dm320/system-mr500.c +++ /dev/null @@ -1,210 +0,0 @@ -/*************************************************************************** - * __________ __ ___. - * Open \______ \ ____ ____ | | _\_ |__ _______ ___ - * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / - * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < - * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ - * \/ \/ \/ \/ \/ - * $Id$ - * - * Copyright (C) 2007 by Karl Kurbjun - * - * All files in this archive are subject to the GNU General Public License. - * See the file COPYING in the source tree root for full license agreement. - * - * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY - * KIND, either express or implied. - * - ****************************************************************************/ - -#include "kernel.h" -#include "system.h" -#include "panic.h" - -#define default_interrupt(name) \ - extern __attribute__((weak,alias("UIRQ"))) void name (void) - -default_interrupt(TIMER0); -default_interrupt(TIMER1); -default_interrupt(TIMER2); -default_interrupt(TIMER3); -default_interrupt(CCD_VD0); -default_interrupt(CCD_VD1); -default_interrupt(CCD_WEN); -default_interrupt(VENC); -default_interrupt(SERIAL0); -default_interrupt(SERIAL1); -default_interrupt(EXT_HOST); -default_interrupt(DSPHINT); -default_interrupt(UART0); -default_interrupt(UART1); -default_interrupt(USB_DMA); -default_interrupt(USB_CORE); -default_interrupt(VLYNQ); -default_interrupt(MTC0); -default_interrupt(MTC1); -default_interrupt(SD_MMC); -default_interrupt(SDIO_MS); -default_interrupt(GIO0); -default_interrupt(GIO1); -default_interrupt(GIO2); -default_interrupt(GIO3); -default_interrupt(GIO4); -default_interrupt(GIO5); -default_interrupt(GIO6); -default_interrupt(GIO7); -default_interrupt(GIO8); -default_interrupt(GIO9); -default_interrupt(GIO10); -default_interrupt(GIO11); -default_interrupt(GIO12); -default_interrupt(GIO13); -default_interrupt(GIO14); -default_interrupt(GIO15); -default_interrupt(PREVIEW0); -default_interrupt(PREVIEW1); -default_interrupt(WATCHDOG); -default_interrupt(I2C); -default_interrupt(CLKC); -default_interrupt(ICE); -default_interrupt(ARMCOM_RX); -default_interrupt(ARMCOM_TX); -default_interrupt(RESERVED); - -static void (* const irqvector[])(void) = -{ - TIMER0,TIMER1,TIMER2,TIMER3,CCD_VD0,CCD_VD1, - CCD_WEN,VENC,SERIAL0,SERIAL1,EXT_HOST,DSPHINT, - UART0,UART1,USB_DMA,USB_CORE,VLYNQ,MTC0,MTC1, - SD_MMC,SDIO_MS,GIO0,GIO1,GIO2,GIO3,GIO4,GIO5, - GIO6,GIO7,GIO8,GIO9,GIO10,GIO11,GIO12,GIO13, - GIO14,GIO15,PREVIEW0,PREVIEW1,WATCHDOG,I2C,CLKC, - ICE,ARMCOM_RX,ARMCOM_TX,RESERVED -}; - -static const char * const irqname[] = -{ - "TIMER0","TIMER1","TIMER2","TIMER3","CCD_VD0","CCD_VD1", - "CCD_WEN","VENC","SERIAL0","SERIAL1","EXT_HOST","DSPHINT", - "UART0","UART1","USB_DMA","USB_CORE","VLYNQ","MTC0","MTC1", - "SD_MMC","SDIO_MS","GIO0","GIO1","GIO2","GIO3","GIO4","GIO5", - "GIO6","GIO7","GIO8","GIO9","GIO10","GIO11","GIO12","GIO13", - "GIO14","GIO15","PREVIEW0","PREVIEW1","WATCHDOG","I2C","CLKC", - "ICE","ARMCOM_RX","ARMCOM_TX","RESERVED" -}; - -static void UIRQ(void) -{ - unsigned int offset = (IO_INTC_IRQENTRY0>>2)-1; - panicf("Unhandled IRQ %02X: %s", offset, irqname[offset]); -} - -void irq_handler(void) __attribute__((interrupt ("IRQ"), naked)); -void irq_handler(void) -{ - /* - * Based on: linux/arch/arm/kernel/entry-armv.S and system-meg-fx.c - */ - - asm volatile( "stmfd sp!, {r0-r7, ip, lr} \n" /* Store context */ - "sub sp, sp, #8 \n"); /* Reserve stack */ - irqvector[(IO_INTC_IRQENTRY0>>2)-1](); - asm volatile( "add sp, sp, #8 \n" /* Cleanup stack */ - "ldmfd sp!, {r0-r7, ip, lr} \n" /* Restore context */ - "subs pc, lr, #4 \n"); /* Return from FIQ */ -} - -void fiq_handler(void) __attribute__((interrupt ("FIQ"), naked)); -void fiq_handler(void) -{ - /* - * Based on: linux/arch/arm/kernel/entry-armv.S and system-meg-fx.c - */ - - asm volatile ( - "sub lr, lr, #4 \r\n" - "stmfd sp!, {r0-r3, ip, lr} \r\n" - "mov r0, #0x00030000 \r\n" - "ldr r0, [r0, #0x518] \r\n" - "ldr r1, =irqvector \r\n" - "ldr r1, [r1, r0, lsl #2] \r\n" - "mov lr, pc \r\n" - "bx r1 \r\n" - "ldmfd sp!, {r0-r3, ip, pc}^ \r\n" - ); -} - -void system_reboot(void) -{ - -} - -void enable_interrupts (void) -{ - asm volatile ("msr cpsr_c, #0x13" ); -} - -void system_init(void) -{ - /* taken from linux/arch/arm/mach-itdm320-20/irq.c */ - - /* Clearing all FIQs and IRQs. */ - IO_INTC_IRQ0 = 0xFFFF; - IO_INTC_IRQ1 = 0xFFFF; - IO_INTC_IRQ2 = 0xFFFF; - - IO_INTC_FIQ0 = 0xFFFF; - IO_INTC_FIQ1 = 0xFFFF; - IO_INTC_FIQ2 = 0xFFFF; - - /* Masking all Interrupts. */ - IO_INTC_EINT0 = 0; - IO_INTC_EINT1 = 0; - IO_INTC_EINT2 = 0; - - /* Setting INTC to all IRQs. */ - IO_INTC_FISEL0 = 0; - IO_INTC_FISEL1 = 0; - IO_INTC_FISEL2 = 0; - - IO_INTC_ENTRY_TBA0 = - IO_INTC_ENTRY_TBA1 = 0; - - /* set GIO26 (reset pin) to output and low */ - IO_GIO_BITCLR1=(1<<10); - IO_GIO_DIR1&=~(1<<10); - - enable_interrupts(); -} - -int system_memory_guard(int newmode) -{ - (void)newmode; - return 0; -} - -#ifdef HAVE_ADJUSTABLE_CPU_FREQ - -void set_cpu_frequency(long frequency) -{ - if (frequency == CPUFREQ_MAX) - { - asm volatile("mov r0, #0\n" - "mrc p15, 0, r0, c1, c0, 0\n" - "orr r0, r0, #3<<30\n" /* set to Asynchronous mode*/ - "mcr p15, 0, r0, c1, c0, 0" : : : "r0"); - - FREQ = CPUFREQ_MAX; - } - else - { - asm volatile("mov r0, #0\n" - "mrc p15, 0, r0, c1, c0, 0\n" - "bic r0, r0, #3<<30\n" /* set to FastBus mode*/ - "mcr p15, 0, r0, c1, c0, 0" : : : "r0"); - - FREQ = CPUFREQ_NORMAL; - } -} - -#endif diff --git a/firmware/target/arm/tms320dm320/timer-dm320.c b/firmware/target/arm/tms320dm320/timer-dm320.c new file mode 100644 index 0000000..21449ed --- /dev/null +++ b/firmware/target/arm/tms320dm320/timer-dm320.c @@ -0,0 +1,106 @@ +/*************************************************************************** +* __________ __ ___. +* Open \______ \ ____ ____ | | _\_ |__ _______ ___ +* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / +* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < +* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ +* \/ \/ \/ \/ \/ +* $Id$ +* +* Copyright (C) 2007 by Karl Kurbjun +* +* All files in this archive are subject to the GNU General Public License. +* See the file COPYING in the source tree root for full license agreement. +* +* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY +* KIND, either express or implied. +* +****************************************************************************/ + +#include "config.h" +#include "cpu.h" +#include "system.h" +#include "timer.h" +#include "logf.h" + +/* GPB0/TOUT0 should already have been configured as output so that pin + should not be a functional pin and TIMER0 output unseen there */ +void TIMER0(void) +{ + if (pfn_timer != NULL) + pfn_timer(); + IO_INTC_IRQ0 |= 1< 1024; prescaler >>= 1, divider++); + + /* Setup the Prescalar */ + IO_TIMER0_TMPRSCL = prescaler; + + /* Setup the Divisor */ + IO_TIMER0_TMDIV = divider; + + set_irq_level(oldlevel); + + return true; +} + +bool __timer_register(void) +{ + bool retval = true; + + int oldstatus = set_interrupt_status(IRQ_FIQ_DISABLED, IRQ_FIQ_STATUS); + + stop_timer(); + + /* Turn Timer0 to Free Run mode */ + IO_TIMER0_TMMD = CONFIG_TIMER0_TMMD_FREE_RUN; + + IO_INTC_EINT0 |= 1< ) \___| < | \_\ ( <_> > < < -* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ -* \/ \/ \/ \/ \/ -* $Id$ -* -* Copyright (C) 2007 by Karl Kurbjun -* -* All files in this archive are subject to the GNU General Public License. -* See the file COPYING in the source tree root for full license agreement. -* -* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY -* KIND, either express or implied. -* -****************************************************************************/ - -#include "config.h" -#include "cpu.h" -#include "system.h" -#include "timer.h" -#include "logf.h" - -/* GPB0/TOUT0 should already have been configured as output so that pin - should not be a functional pin and TIMER0 output unseen there */ -void TIMER0(void) -{ - if (pfn_timer != NULL) - pfn_timer(); - IO_INTC_IRQ0 |= 1< 1024; prescaler >>= 1, divider++); - - /* Setup the Prescalar */ - IO_TIMER0_TMPRSCL = prescaler; - - /* Setup the Divisor */ - IO_TIMER0_TMDIV = divider; - - set_irq_level(oldlevel); - - return true; -} - -bool __timer_register(void) -{ - bool retval = true; - - int oldstatus = set_interrupt_status(IRQ_FIQ_DISABLED, IRQ_FIQ_STATUS); - - stop_timer(); - - /* Turn Timer0 to Free Run mode */ - IO_TIMER0_TMMD = CONFIG_TIMER0_TMMD_FREE_RUN; - - IO_INTC_EINT0 |= 1< + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ +#include "config.h" +#include "cpu.h" +#include "system.h" + +/* UART 0/1 */ + +#define CONFIG_UART_BRSR 87 +#define MAX_UART_BUFFER 32 +static unsigned char uart1buffer[MAX_UART_BUFFER]; +int uart1read = 0, uart1write = 0, uart1count = 0; + +void do_checksums(char *data, int len, char *xor, char *add) +{ + int i; + *xor = data[0]; + *add = data[0]; + for(i=1;i= 0x20); + + // Write character + IO_UART1_DTRR=ch; +} + +// Unsigned integer to ASCII hexadecimal conversion +void uartPutHex(unsigned int n) { + unsigned int i; + + for (i = 8; i != 0; i--) { + unsigned int digit = n >> 28; + uartPutc(digit >= 10 ? digit - 10 + 'A' : digit + '0'); + n <<= 4; + } +} + +void uartPuts(const char *str) { + char ch; + while ((ch = *str++) != '\0') { + uartPutc(ch); + } +} + +void uartGets(char *str, unsigned int size) { + for (;;) { + char ch; + + // Wait for FIFO to contain something + while ((IO_UART1_RFCR & 0x3f) == 0); + + // Read character + ch = (char)IO_UART1_DTRR; + + // Echo character back + IO_UART1_DTRR=ch; + + // If CR, also echo LF, null-terminate, and return + if (ch == '\r') { + IO_UART1_DTRR='\n'; + if (size) { + *str++ = '\0'; + } + return; + } + + // Append to buffer + if (size) { + *str++ = ch; + --size; + } + } +} + +int uartPollch(unsigned int ticks) { + while (ticks--) { + if (IO_UART1_RFCR & 0x3f) { + return IO_UART1_DTRR & 0xff; + } + } + + return -1; +} + +bool uartAvailable(void) +{ + return uart1count > 0; +} + +void uart1_heartbeat(void) +{ + char data[5] = {0x11, 0x30, 0x11^0x30, 0x11+0x30, '\0'}; + uartPuts(data); +} + +void uartSendData(char* data, int len) +{ + int i; + for(i=0;i 0) + { + *c = uart1buffer[uart1read]; + uart1read = (uart1read+1) % MAX_UART_BUFFER; + uart1count--; + return true; + } + return false; +} + +/* UART1 receive intterupt handler */ +void UART1(void) +{ + if (IO_UART1_RFCR & 0x3f) + { + if (uart1count >= MAX_UART_BUFFER) + panicf("UART1 buffer overflow"); + uart1buffer[uart1write] = IO_UART1_DTRR & 0xff; + uart1write = (uart1write+1) % MAX_UART_BUFFER; + uart1count++; + } + + IO_INTC_IRQ0 = (1< - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - */ -#include "config.h" -#include "cpu.h" -#include "system.h" - -/* UART 0/1 */ - -#define CONFIG_UART_BRSR 87 -#define MAX_UART_BUFFER 32 -static unsigned char uart1buffer[MAX_UART_BUFFER]; -int uart1read = 0, uart1write = 0, uart1count = 0; - -void do_checksums(char *data, int len, char *xor, char *add) -{ - int i; - *xor = data[0]; - *add = data[0]; - for(i=1;i= 0x20); - - // Write character - IO_UART1_DTRR=ch; -} - -// Unsigned integer to ASCII hexadecimal conversion -void uartPutHex(unsigned int n) { - unsigned int i; - - for (i = 8; i != 0; i--) { - unsigned int digit = n >> 28; - uartPutc(digit >= 10 ? digit - 10 + 'A' : digit + '0'); - n <<= 4; - } -} - -void uartPuts(const char *str) { - char ch; - while ((ch = *str++) != '\0') { - uartPutc(ch); - } -} - -void uartGets(char *str, unsigned int size) { - for (;;) { - char ch; - - // Wait for FIFO to contain something - while ((IO_UART1_RFCR & 0x3f) == 0); - - // Read character - ch = (char)IO_UART1_DTRR; - - // Echo character back - IO_UART1_DTRR=ch; - - // If CR, also echo LF, null-terminate, and return - if (ch == '\r') { - IO_UART1_DTRR='\n'; - if (size) { - *str++ = '\0'; - } - return; - } - - // Append to buffer - if (size) { - *str++ = ch; - --size; - } - } -} - -int uartPollch(unsigned int ticks) { - while (ticks--) { - if (IO_UART1_RFCR & 0x3f) { - return IO_UART1_DTRR & 0xff; - } - } - - return -1; -} - -bool uartAvailable(void) -{ - return uart1count > 0; -} - -void uart1_heartbeat(void) -{ - char data[5] = {0x11, 0x30, 0x11^0x30, 0x11+0x30, '\0'}; - uartPuts(data); -} - -void uartSendData(char* data, int len) -{ - int i; - for(i=0;i 0) - { - *c = uart1buffer[uart1read]; - uart1read = (uart1read+1) % MAX_UART_BUFFER; - uart1count--; - return true; - } - return false; -} - -/* UART1 receive intterupt handler */ -void UART1(void) -{ - if (IO_UART1_RFCR & 0x3f) - { - if (uart1count >= MAX_UART_BUFFER) - panicf("UART1 buffer overflow"); - uart1buffer[uart1write] = IO_UART1_DTRR & 0xff; - uart1write = (uart1write+1) % MAX_UART_BUFFER; - uart1count++; - } - - IO_INTC_IRQ0 = (1<