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authorMichael Sevakis <jethead71@rockbox.org>2006-09-26 22:24:56 +0000
committerMichael Sevakis <jethead71@rockbox.org>2006-09-26 22:24:56 +0000
commit167c754b4785a175b4c26ecaaacef7d1e1647d1a (patch)
tree967dc55a196cbcdbd0bf683edc3e44e6e5b880fa
parentaf401c2a4ef258146e55f1ace1e4d5e42029a790 (diff)
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Fixed FS#5800 - 'LCD-sleep awake bug' on x5. Contrast setting is now preserved after LCD sleeps.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@11075 a1c6a512-1295-4272-9138-f99709370657
-rwxr-xr-xfirmware/target/coldfire/iaudio/x5/lcd-x5.c30
1 files changed, 20 insertions, 10 deletions
diff --git a/firmware/target/coldfire/iaudio/x5/lcd-x5.c b/firmware/target/coldfire/iaudio/x5/lcd-x5.c
index 9e905d8..ca34192 100755
--- a/firmware/target/coldfire/iaudio/x5/lcd-x5.c
+++ b/firmware/target/coldfire/iaudio/x5/lcd-x5.c
@@ -41,6 +41,8 @@ static int y_offset;
static int roll_offset;
/* Reverse flag. Must be remembered when display is turned off. */
static unsigned short disp_control_rev;
+/* Contrast setting << 8 */
+static int lcd_contrast;
/* Forward declarations */
static void lcd_display_off(void);
@@ -117,7 +119,10 @@ void lcd_set_contrast(int val)
else if (val > 30)
val = 30;
- lcd_write_reg(R_POWER_CONTROL5, 0x2018 + (val << 8));
+ lcd_contrast = val << 8;
+
+ /* VCOMG=1, VDV4-0=xxxxx, VCM4-0=11000 */
+ lcd_write_reg(R_POWER_CONTROL5, 0x2018 | lcd_contrast);
}
void lcd_set_invert_display(bool yesno)
@@ -192,14 +197,14 @@ static void lcd_power_on(void)
lcd_write_reg(R_POWER_CONTROL4, 0x0401);
/* CAD=1 */
lcd_write_reg(R_POWER_CONTROL2, 0x8000);
- /* VCOMG=0, VDV4-0=10011 (19), VCM4-0=11000 */
- lcd_write_reg(R_POWER_CONTROL5, 0x1318);
+ /* VCOMG=0, VDV4-0=xxxxx, VCM4-0=11000 */
+ lcd_write_reg(R_POWER_CONTROL5, 0x0018 | lcd_contrast);
/* Instruction (2) for power setting; BT2-0, DC2-0, AP2-0 */
/* BT2-0=000, DC2-0=001, AP2-0=011, SLP=0, STB=0 */
lcd_write_reg(R_POWER_CONTROL1, 0x002c);
/* Instruction (3) for power setting; VCOMG = "1" */
- /* VCOMG=1, VDV4-0=10011 (19), VCM4-0=11000 */
- lcd_write_reg(R_POWER_CONTROL5, 0x3318);
+ /* VCOMG=1, VDV4-0=xxxxx, VCM4-0=11000 */
+ lcd_write_reg(R_POWER_CONTROL5, 0x2018 | lcd_contrast);
/* 40ms or more; time for step-up circuits 1,2 to stabilize */
sleep(HZ/25);
@@ -276,8 +281,8 @@ static void lcd_power_off(void)
/* Step-up3,4 halt setting bit */
/* VRL3-0=0100, PON=0, VRH3-0=0001 */
lcd_write_reg(R_POWER_CONTROL4, 0x0401);
- /* VCOMG=0, VDV4-0=10011, VCM4-0=11000 */
- lcd_write_reg(R_POWER_CONTROL5, 0x1318);
+ /* VCOMG=0, VDV4-0=xxxxx, VCM4-0=11000 */
+ lcd_write_reg(R_POWER_CONTROL5, 0x0018 | lcd_contrast);
/* Wait 100ms or more */
sleep(HZ/10);
@@ -341,13 +346,15 @@ static void lcd_display_off(void)
void lcd_init_device(void)
{
/* Reset settings */
- y_offset = 0;
- roll_offset = 0;
- disp_control_rev = 0x0004;
#ifdef BOOTLOADER
/* Initial boot requires setting up chip registers but a full reset is
not needed again. */
+ y_offset = 0;
+ roll_offset = 0;
+ disp_control_rev = 0x0004;
+ lcd_contrast = DEFAULT_CONTRAST_SETTING << 8;
+
power_on = false;
display_on = false;
@@ -365,6 +372,9 @@ void lcd_init_device(void)
/* Power and display already ON */
power_on = true;
display_on = true;
+ lcd_roll(0);
+ lcd_set_flip(false);
+ lcd_set_contrast(DEFAULT_CONTRAST_SETTING);
#endif
}