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authorMichael Sevakis <jethead71@rockbox.org>2007-07-26 10:46:17 +0000
committerMichael Sevakis <jethead71@rockbox.org>2007-07-26 10:46:17 +0000
commit31cf7e95b4eb636cbc94e77021080611c27a34b1 (patch)
tree5f9a03202a2c52f5ddf0b16678dc2cf8e38084a9
parent414dd752eb1c3db6c2ec06760be0c06451c7afd0 (diff)
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Reenable scaling on Sansa since a reasonable solution to clicks has been found.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13995 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r--firmware/export/config-e200.h2
-rw-r--r--firmware/export/i2s.h1
-rw-r--r--firmware/target/arm/i2s-pp.c31
-rw-r--r--firmware/target/arm/pcm-pp.c4
-rw-r--r--firmware/target/arm/system-pp502x.c9
5 files changed, 44 insertions, 3 deletions
diff --git a/firmware/export/config-e200.h b/firmware/export/config-e200.h
index c7f058e..acb23cb 100644
--- a/firmware/export/config-e200.h
+++ b/firmware/export/config-e200.h
@@ -160,7 +160,7 @@
#define CONFIG_LED LED_VIRTUAL
/* Define this if you have adjustable CPU frequency */
-/*#define HAVE_ADJUSTABLE_CPU_FREQ*/
+#define HAVE_ADJUSTABLE_CPU_FREQ
#define MI4_FORMAT
#define BOOTFILE_EXT "mi4"
diff --git a/firmware/export/i2s.h b/firmware/export/i2s.h
index 13dba68..3b4dbb4 100644
--- a/firmware/export/i2s.h
+++ b/firmware/export/i2s.h
@@ -18,3 +18,4 @@
****************************************************************************/
void i2s_reset(void);
+void i2s_scale_attn_level(long frequency);
diff --git a/firmware/target/arm/i2s-pp.c b/firmware/target/arm/i2s-pp.c
index c63287b..b9e32b8 100644
--- a/firmware/target/arm/i2s-pp.c
+++ b/firmware/target/arm/i2s-pp.c
@@ -25,6 +25,7 @@
****************************************************************************/
#include "system.h"
+#include "cpu.h"
/* TODO: Add in PP5002 defs */
#if CONFIG_CPU == PP5002
@@ -140,4 +141,34 @@ void i2s_reset(void)
/* Rx.CLR = 1, TX.CLR = 1 */
IISFIFO_CFG |= 0x1100;
}
+
+#ifdef SANSA_E200
+void i2s_scale_attn_level(long frequency)
+{
+ unsigned int iisfifo_cfg = IISFIFO_CFG & ~0xff;
+
+ /* TODO: set this more appropriately for frequency */
+ if (frequency <= CPUFREQ_DEFAULT)
+ {
+ /* when 4 slots full */
+ /* when 4 slots empty */
+ iisfifo_cfg |= 0x11;
+ }
+ else if (frequency < CPUFREQ_MAX)
+ {
+ /* when 8 slots full */
+ /* when 8 slots empty */
+ iisfifo_cfg |= 0x22;
+ }
+ else
+ {
+ /* when 12 slots full */
+ /* when 12 slots empty */
+ iisfifo_cfg |= 0x33;
+ }
+
+ IISFIFO_CFG = iisfifo_cfg;
+}
+#endif /* SANSA_E200 */
+
#endif
diff --git a/firmware/target/arm/pcm-pp.c b/firmware/target/arm/pcm-pp.c
index 29e5275..5ac15fe 100644
--- a/firmware/target/arm/pcm-pp.c
+++ b/firmware/target/arm/pcm-pp.c
@@ -378,7 +378,7 @@ void fiq_record(void)
if (audio_channels == 2) {
/* RX is stereo */
while (p_size > 0) {
- if (FIFO_FREE_COUNT < 8) {
+ if (FIFO_FREE_COUNT < 2) {
/* enable interrupt */
IISCONFIG |= (1 << 0);
goto fiq_record_exit;
@@ -402,7 +402,7 @@ void fiq_record(void)
else {
/* RX is left channel mono */
while (p_size > 0) {
- if (FIFO_FREE_COUNT < 8) {
+ if (FIFO_FREE_COUNT < 2) {
/* enable interrupt */
IISCONFIG |= (1 << 0);
goto fiq_record_exit;
diff --git a/firmware/target/arm/system-pp502x.c b/firmware/target/arm/system-pp502x.c
index 3011162..748e106 100644
--- a/firmware/target/arm/system-pp502x.c
+++ b/firmware/target/arm/system-pp502x.c
@@ -18,6 +18,7 @@
****************************************************************************/
#include "system.h"
#include "thread.h"
+#include "i2s.h"
#if NUM_CORES > 1
struct mutex boostctrl_mtx NOCACHEBSS_ATTR;
@@ -165,6 +166,10 @@ void set_cpu_frequency(long frequency)
postmult = CPUFREQ_DEFAULT_MULT;
cpu_frequency = frequency;
+#ifdef SANSA_E200
+ i2s_scale_attn_level(CPUFREQ_DEFAULT);
+#endif
+
unknown2 = inl(0x600060a0);
outl(inl(0x70000020) | (1<<30), 0x70000020); /* Enable PLL power */
@@ -197,6 +202,10 @@ void set_cpu_frequency(long frequency)
inl(0x600060a0); /* sync pipeline (?) */
outl(unknown2, 0x600060a0);
+#ifdef SANSA_E200
+ i2s_scale_attn_level(frequency);
+#endif
+
# if NUM_CORES > 1
boostctrl_mtx.locked = 0;
# endif