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| author | Thomas Martitz <kugel@rockbox.org> | 2010-04-05 19:20:56 +0000 |
|---|---|---|
| committer | Thomas Martitz <kugel@rockbox.org> | 2010-04-05 19:20:56 +0000 |
| commit | 3f6e5668b34a5ef9db9172a356eff557d1842c50 (patch) | |
| tree | aef752808a32b3bbe7c3e30c9d8e8c489606fbaa | |
| parent | 02afc271c92c9138a51c22ff723872c7a430f74e (diff) | |
| download | rockbox-3f6e5668b34a5ef9db9172a356eff557d1842c50.zip rockbox-3f6e5668b34a5ef9db9172a356eff557d1842c50.tar.gz rockbox-3f6e5668b34a5ef9db9172a356eff557d1842c50.tar.bz2 rockbox-3f6e5668b34a5ef9db9172a356eff557d1842c50.tar.xz | |
Revert part of r25489 as it didn't fix the problem, that the CPU frequency debug screen shows the wrong frequency after boot, properly.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25492 a1c6a512-1295-4272-9138-f99709370657
| -rw-r--r-- | firmware/export/config/sansafuzev2.h | 2 | ||||
| -rw-r--r-- | firmware/target/arm/as3525/clock-target.h | 5 |
2 files changed, 3 insertions, 4 deletions
diff --git a/firmware/export/config/sansafuzev2.h b/firmware/export/config/sansafuzev2.h index 71d76f4..1724342 100644 --- a/firmware/export/config/sansafuzev2.h +++ b/firmware/export/config/sansafuzev2.h @@ -165,7 +165,7 @@ #define CURRENT_RECORD CURRENT_NORMAL /* Define this to the CPU frequency */ -#define CPU_FREQ 40000000 +#define CPU_FREQ 240000000 /* Type of LCD */ #define CONFIG_LCD LCD_FUZE diff --git a/firmware/target/arm/as3525/clock-target.h b/firmware/target/arm/as3525/clock-target.h index 974fd78..96c2c26 100644 --- a/firmware/target/arm/as3525/clock-target.h +++ b/firmware/target/arm/as3525/clock-target.h @@ -77,10 +77,9 @@ */ #ifdef SANSA_FUZEV2 -/* CPU_FREQ is defined in config/<target>.h - * display is unbearable slow at 24MHz +/* display is unbearably slow at 24MHz * 34285715 HZ works ok but 40MHz works even better*/ -#define AS3525_DRAM_FREQ CPU_FREQ /* Initial DRAM frequency */ +#define AS3525_DRAM_FREQ 40000000 /* Initial DRAM frequency */ #else #define AS3525_DRAM_FREQ 24000000 /* Initial DRAM frequency */ #endif /* SANSA_FUZEV2 */ |