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| author | Boris Gjenero <dreamlayers@rockbox.org> | 2012-01-01 17:39:30 +0000 |
|---|---|---|
| committer | Boris Gjenero <dreamlayers@rockbox.org> | 2012-01-01 17:39:30 +0000 |
| commit | 403decf65d9993e307fd2a900480056ae110c6f0 (patch) | |
| tree | 159ebe503a083a7bf921a841855089e8725f4e9c | |
| parent | 2dc19005b6a5b57d0efab43e63dfce1452e3ea4e (diff) | |
| download | rockbox-403decf65d9993e307fd2a900480056ae110c6f0.zip rockbox-403decf65d9993e307fd2a900480056ae110c6f0.tar.gz rockbox-403decf65d9993e307fd2a900480056ae110c6f0.tar.bz2 rockbox-403decf65d9993e307fd2a900480056ae110c6f0.tar.xz | |
Fix FS#12243 : On 20GB H10, restore correct upside down state when waking LCD.
In lcd_power_on(), R_DRV_OUTPUT_CONTROL and R_GATE_SCAN_START_POS are now
initialized like in lcd_set_flip(), so the display wakes up properly when it
is supposed to be upside down.
Thanks to Neil Sharrow for reporting the problem and testing the patch.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@31514 a1c6a512-1295-4272-9138-f99709370657
| -rw-r--r-- | firmware/target/arm/iriver/h10/lcd-h10_20gb.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/firmware/target/arm/iriver/h10/lcd-h10_20gb.c b/firmware/target/arm/iriver/h10/lcd-h10_20gb.c index 596276a..df748a7 100644 --- a/firmware/target/arm/iriver/h10/lcd-h10_20gb.c +++ b/firmware/target/arm/iriver/h10/lcd-h10_20gb.c @@ -230,8 +230,8 @@ static void lcd_power_on(void) sleep(HZ/25); /* Instructions for other mode settings (in register order). */ - /* SM=0, GS=x, SS=0, NL4-0=10011 (G1-G160)*/ - lcd_write_reg(R_DRV_OUTPUT_CONTROL, y_offset ? 0x0013 : 0x0113); /* different to X5 */ + /* SM=0, GS=x, SS=x, NL4-0=10011 (G1-G160)*/ + lcd_write_reg(R_DRV_OUTPUT_CONTROL, y_offset ? 0x0213 : 0x0113); /* different to X5 */ /* FLD1-0=01 (1 field), B/C=1, EOR=1 (C-pat), NW5-0=000000 (1 row) */ lcd_write_reg(R_DRV_AC_CONTROL, 0x0700); /* DIT=0, BGR=1, HWM=0, I/D1-0=10, AM=1, LG2-0=000 */ @@ -241,7 +241,7 @@ static void lcd_power_on(void) /* NO1-0=01, SDT1-0=00, EQ1-0=00, DIV1-0=00, RTN3-00000 */ lcd_write_reg(R_FRAME_CYCLE_CONTROL, 0x4000); /* SCN4-0=000x0 (G1/G160) */ -/* lcd_write_reg(R_GATE_SCAN_START_POS, y_offset ? 0x0000 : 0x0002); */ + lcd_write_reg(R_GATE_SCAN_START_POS, y_offset ? 0x0002 : 0x0000); /* VL7-0=0x00 */ lcd_write_reg(R_VERT_SCROLL_CONTROL, 0x0000); /* SE17-10(End)=0x9f (159), SS17-10(Start)=0x00 */ |