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| author | Miika Pekkarinen <miipekk@ihme.org> | 2006-12-06 10:02:06 +0000 |
|---|---|---|
| committer | Miika Pekkarinen <miipekk@ihme.org> | 2006-12-06 10:02:06 +0000 |
| commit | 46a608bf07ec9d40bdd151e3283646682bb9e9bd (patch) | |
| tree | aab98a2c96a307ae6fee89e4eddf861a86dce487 | |
| parent | 51189b4cb41fb70f4800286f99573f590941ddea (diff) | |
| download | rockbox-46a608bf07ec9d40bdd151e3283646682bb9e9bd.zip rockbox-46a608bf07ec9d40bdd151e3283646682bb9e9bd.tar.gz rockbox-46a608bf07ec9d40bdd151e3283646682bb9e9bd.tar.bz2 rockbox-46a608bf07ec9d40bdd151e3283646682bb9e9bd.tar.xz | |
PLL was incorrectly initialized causing system to crash when ran from
ROM.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@11669 a1c6a512-1295-4272-9138-f99709370657
| -rw-r--r-- | firmware/target/coldfire/iriver/system-iriver.c | 8 | ||||
| -rw-r--r-- | firmware/target/coldfire/system-coldfire.c | 2 | ||||
| -rw-r--r-- | firmware/target/coldfire/system-target.h | 2 |
3 files changed, 6 insertions, 6 deletions
diff --git a/firmware/target/coldfire/iriver/system-iriver.c b/firmware/target/coldfire/iriver/system-iriver.c index 43ba4ee..6301196 100644 --- a/firmware/target/coldfire/iriver/system-iriver.c +++ b/firmware/target/coldfire/iriver/system-iriver.c @@ -81,7 +81,7 @@ void set_cpu_frequency(long frequency) PLLCR &= ~1; /* Bypass mode */ timers_adjust_prescale(CPUFREQ_DEFAULT_MULT, false); RECALC_DELAYS(CPUFREQ_MAX); - PLLCR = 0x01056005 | (PLLCR & 0x70c00000); + PLLCR = 0x01856005 | (PLLCR & 0x70400000); CSCR0 = 0x00001180; /* Flash: 4 wait states */ CSCR1 = 0x00001580; /* LCD: 5 wait states */ #if CONFIG_USBOTG == USBOTG_ISP1362 @@ -108,7 +108,7 @@ void set_cpu_frequency(long frequency) PLLCR &= ~1; /* Bypass mode */ timers_adjust_prescale(CPUFREQ_DEFAULT_MULT, false); RECALC_DELAYS(CPUFREQ_NORMAL); - PLLCR = 0x0305e005 | (PLLCR & 0x70c00000); + PLLCR = 0x0385e005 | (PLLCR & 0x70400000); CSCR0 = 0x00000580; /* Flash: 1 wait state */ CSCR1 = 0x00000180; /* LCD: 0 wait states */ #if CONFIG_USBOTG == USBOTG_ISP1362 @@ -134,8 +134,8 @@ void set_cpu_frequency(long frequency) PLLCR &= ~1; /* Bypass mode */ timers_adjust_prescale(CPUFREQ_DEFAULT_MULT, true); RECALC_DELAYS(CPUFREQ_DEFAULT); - /* Power down PLL, but keep CLSEL and CRSEL */ - PLLCR = 0x00000200 | (PLLCR & 0x70c00000); + /* Power down PLL, but keep CLSEL */ + PLLCR = 0x00000200 | (PLLCR & 0x70400000); CSCR0 = 0x00000180; /* Flash: 0 wait states */ CSCR1 = 0x00000180; /* LCD: 0 wait states */ #if CONFIG_USBOTG == USBOTG_ISP1362 diff --git a/firmware/target/coldfire/system-coldfire.c b/firmware/target/coldfire/system-coldfire.c index 2fc8149..ff81d1c 100644 --- a/firmware/target/coldfire/system-coldfire.c +++ b/firmware/target/coldfire/system-coldfire.c @@ -314,6 +314,6 @@ int system_memory_guard(int newmode) /* allow setting of audio clock related bits */ void coldfire_set_pllcr_audio_bits(long bits) { - PLLCR = (PLLCR & ~0x70c00000) | (bits & 0x70c00000); + PLLCR = (PLLCR & ~0x70400000) | (bits & 0x70400000); } diff --git a/firmware/target/coldfire/system-target.h b/firmware/target/coldfire/system-target.h index 24e3fb87..183c38b 100644 --- a/firmware/target/coldfire/system-target.h +++ b/firmware/target/coldfire/system-target.h @@ -143,7 +143,7 @@ static inline void invalidate_icache(void) #ifdef IAUDIO_X5 #define DEFAULT_PLLCR_AUDIO_BITS 0x10400000 #else -#define DEFAULT_PLLCR_AUDIO_BITS 0x10c00000 +#define DEFAULT_PLLCR_AUDIO_BITS 0x10400000 #endif void coldfire_set_pllcr_audio_bits(long bits); |