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| author | Andree Buschmann <AndreeBuschmann@t-online.de> | 2010-11-22 18:43:22 +0000 |
|---|---|---|
| committer | Andree Buschmann <AndreeBuschmann@t-online.de> | 2010-11-22 18:43:22 +0000 |
| commit | 6695226331bbe2fcae69d25e2959970a3771ca49 (patch) | |
| tree | 0385b2637d6ae37127e1481b7e997726e3d7b240 | |
| parent | e5361590e7075298bb222535537e197cc6f99e7b (diff) | |
| download | rockbox-6695226331bbe2fcae69d25e2959970a3771ca49.zip rockbox-6695226331bbe2fcae69d25e2959970a3771ca49.tar.gz rockbox-6695226331bbe2fcae69d25e2959970a3771ca49.tar.bz2 rockbox-6695226331bbe2fcae69d25e2959970a3771ca49.tar.xz | |
Fix typo in comment.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@28641 a1c6a512-1295-4272-9138-f99709370657
| -rw-r--r-- | firmware/export/system.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/firmware/export/system.h b/firmware/export/system.h index af70152..4a5dcf0 100644 --- a/firmware/export/system.h +++ b/firmware/export/system.h @@ -321,7 +321,7 @@ static inline void cpucache_flush(void) #undef CACHEALIGN_SIZE #endif #ifdef CACHEALIGN_BITS - /* CACHEALIGN_BITS = 2 ^ CACHEALIGN_BITS */ + /* CACHEALIGN_SIZE = 2 ^ CACHEALIGN_BITS */ #define CACHEALIGN_SIZE (1u << CACHEALIGN_BITS) #else /* FIXME: set to maximum known cache alignment of supported CPUs */ |