s5l8700 : remove some CRLF line endings

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25623 a1c6a512-1295-4272-9138-f99709370657

2 files changed, 149 insertions, 149 deletions

diff --git a/firmware/target/arm/s5l8700/crt0.S b/firmware/target/arm/s5l8700/crt0.S
index bb6d910..583b762 100644
--- a/firmware/target/arm/s5l8700/crt0.S
+++ b/firmware/target/arm/s5l8700/crt0.S
@@ -260,64 +260,64 @@ start_loc:
 
 #if defined(MEIZU_M6SP) || defined(MEIZU_M3)
     /* setup SDRAM for Meizu M6SP */
-    ldr r1, =0x38200000

-    // configure SDR drive strength and pad settings

-    mov r0, #SDR_DSS_SEL_B

-    str r0, [r1, #0x4C] // MIU_DSS_SEL_B

-    mov r0, #SDR_DSS_SEL_O

-    str r0, [r1, #0x50] // MIU_DSS_SEL_O

-    mov r0, #SDR_DSS_SEL_C

-    str r0, [r1, #0x54] // MIU_DSS_SEL_C

-    mov r0, #2

-    str r0, [r1, #0x60] // SSTL2_PAD_ON

-    // select SDR mode

+    ldr r1, =0x38200000
+    // configure SDR drive strength and pad settings
+    mov r0, #SDR_DSS_SEL_B
+    str r0, [r1, #0x4C] // MIU_DSS_SEL_B
+    mov r0, #SDR_DSS_SEL_O
+    str r0, [r1, #0x50] // MIU_DSS_SEL_O
+    mov r0, #SDR_DSS_SEL_C
+    str r0, [r1, #0x54] // MIU_DSS_SEL_C
+    mov r0, #2
+    str r0, [r1, #0x60] // SSTL2_PAD_ON
+    // select SDR mode
     ldr r0, [r1, #0x40]
-    mov r2, #0xFFFDFFFF

-    and r0, r0, r2

-    orr r0, r0, #1

-    str r0, [r1, #0x40] // MIUORG

+    mov r2, #0xFFFDFFFF
+    and r0, r0, r2
+    orr r0, r0, #1
+    str r0, [r1, #0x40] // MIUORG
     // set controller configuration
     mov r0, #SDR_CONFIG
     str r0, [r1]        // MIUCON
-    // set SDRAM timing

-    ldr r0, =SDR_TIMING

-    str r0, [r1, #0x10] // MIUSDPARA

-    // set refresh rate

-    mov r0, #0x1080

-    str r0, [r1, #0x08] // MIUAREF

-    // initialise SDRAM 

-    mov r0, #0x003

-    str r0, [r1, #0x04] // MIUCOM = nop

-    ldr r0, =0x203

-    str r0, [r1, #0x04] // MIUCOM = precharge all banks

-    nop

-    nop

-    nop

-    ldr r0, =0x303

-    str r0, [r1, #0x04] // MIUCOM = auto-refresh

-    nop

-    nop

-    nop

-    nop

-    str r0, [r1, #0x04] // MIUCOM = auto-refresh

-    nop

-    nop

-    nop

-    nop

-    str r0, [r1, #0x04] // MIUCOM = auto-refresh

-    nop

-    nop

-    nop

-    nop

-    // set mode register

-    mov r0, #SDR_MRS

-    str r0, [r1, #0x0C] // MIUMRS

-    ldr r0, =0x103

-    str r0, [r1, #0x04] // MIUCOM = mode register set

-    ldr r0, =SDR_EMRS

-    str r0, [r1, #0x0C] // MIUMRS

-    ldr r0, =0x103

-    str r0, [r1, #0x04] // MIUCOM = mode register set

+    // set SDRAM timing
+    ldr r0, =SDR_TIMING
+    str r0, [r1, #0x10] // MIUSDPARA
+    // set refresh rate
+    mov r0, #0x1080
+    str r0, [r1, #0x08] // MIUAREF
+    // initialise SDRAM 
+    mov r0, #0x003
+    str r0, [r1, #0x04] // MIUCOM = nop
+    ldr r0, =0x203
+    str r0, [r1, #0x04] // MIUCOM = precharge all banks
+    nop
+    nop
+    nop
+    ldr r0, =0x303
+    str r0, [r1, #0x04] // MIUCOM = auto-refresh
+    nop
+    nop
+    nop
+    nop
+    str r0, [r1, #0x04] // MIUCOM = auto-refresh
+    nop
+    nop
+    nop
+    nop
+    str r0, [r1, #0x04] // MIUCOM = auto-refresh
+    nop
+    nop
+    nop
+    nop
+    // set mode register
+    mov r0, #SDR_MRS
+    str r0, [r1, #0x0C] // MIUMRS
+    ldr r0, =0x103
+    str r0, [r1, #0x04] // MIUCOM = mode register set
+    ldr r0, =SDR_EMRS
+    str r0, [r1, #0x0C] // MIUMRS
+    ldr r0, =0x103
+    str r0, [r1, #0x04] // MIUCOM = mode register set
 #endif /* MEIZU_M6SP */
 
     mov r1, #0x1
diff --git a/firmware/target/arm/s5l8700/mmu-s5l8700.S b/firmware/target/arm/s5l8700/mmu-s5l8700.S
index f2795d5..b745c8b 100644
--- a/firmware/target/arm/s5l8700/mmu-s5l8700.S
+++ b/firmware/target/arm/s5l8700/mmu-s5l8700.S
@@ -1,95 +1,95 @@
-/***************************************************************************

- *             __________               __   ___.

- *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___

- *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /

- *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <

- *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \

- *                     \/            \/     \/    \/            \/

- * $Id$

- *

- * Copyright (C) 2006,2007 by Greg White

- *

- * This program is free software; you can redistribute it and/or

- * modify it under the terms of the GNU General Public License

- * as published by the Free Software Foundation; either version 2

- * of the License, or (at your option) any later version.

- *

- * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY

- * KIND, either express or implied.

- *

- ****************************************************************************/

-#include "config.h"

-#include "cpu.h"

-

-/** Cache coherency **/

-

-/*

- * Cleans entire DCache

- * void clean_dcache(void);

- */

-    .section   .icode, "ax", %progbits

-    .align      2

-    .global     clean_dcache

-    .type       clean_dcache, %function

-    .global     cpucache_flush      @ Alias

-clean_dcache:

-cpucache_flush:

-    @ Index format: 31:26 = index, 7:5 = segment, remainder = SBZ

-    mov     r1, #0x00000000         @

-1:  @ clean_start                   @

-    mcr     p15, 0, r1, c7, c10, 2  @ Clean entry by index

-    add     r0, r1, #0x00000010     @

-    mcr     p15, 0, r0, c7, c10, 2  @ Clean entry by index

-    add     r0, r0, #0x00000010     @

-    mcr     p15, 0, r0, c7, c10, 2  @ Clean entry by index

-    add     r0, r0, #0x00000010     @

-    mcr     p15, 0, r0, c7, c10, 2  @ Clean entry by index

-    adds    r1, r1, #0x04000000     @ will wrap to zero at loop end

-    bne     1b @ clean_start        @

-    mcr     p15, 0, r1, c7, c10, 4  @ Drain write buffer

-    bx      lr                      @ 

-    .size   clean_dcache, .-clean_dcache

-

-/*

- * Invalidate entire DCache

- * will do writeback

- * void invalidate_dcache(void);

- */

-    .section   .icode, "ax", %progbits

-    .align      2

-    .global     invalidate_dcache

-    .type       invalidate_dcache, %function

-invalidate_dcache:

-    @ Index format: 31:26 = index, 7:5 = segment, remainder = SBZ

-    mov     r1, #0x00000000         @

-1:  @ inv_start                     @

-    mcr     p15, 0, r1, c7, c14, 2  @ Clean and invalidate entry by index

-    add     r0, r1, #0x00000010     @

-    mcr     p15, 0, r0, c7, c14, 2  @ Clean and invalidate entry by index

-    add     r0, r0, #0x00000010     @

-    mcr     p15, 0, r0, c7, c14, 2  @ Clean and invalidate entry by index

-    add     r0, r0, #0x00000010     @

-    mcr     p15, 0, r0, c7, c14, 2  @ Clean and invalidate entry by index

-    adds    r1, r1, #0x04000000     @ will wrap to zero at loop end

-    bne     1b @ inv_start          @

-    mcr     p15, 0, r1, c7, c10, 4  @ Drain write buffer

-    bx      lr                      @

-    .size   invalidate_dcache, .-invalidate_dcache

-

-/*

- * Invalidate entire ICache and DCache

- * will do writeback

- * void invalidate_idcache(void);

- */

-    .section   .icode, "ax", %progbits

-    .align      2

-    .global     invalidate_idcache

-    .type       invalidate_idcache, %function

-    .global     cpucache_invalidate @ Alias

-invalidate_idcache:

-cpucache_invalidate: 

-    mov     r2, lr                  @ save lr to r2, call uses r0 and r1 only

-    bl      invalidate_dcache       @ Clean and invalidate entire DCache

-    mcr     p15, 0, r1, c7, c5, 0   @ Invalidate ICache (r1=0 from call)

-    mov     pc, r2                  @

-    .size   invalidate_idcache, .-invalidate_idcache

+/***************************************************************************
+ *             __________               __   ___.
+ *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+ *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+ *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+ *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+ *                     \/            \/     \/    \/            \/
+ * $Id$
+ *
+ * Copyright (C) 2006,2007 by Greg White
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+#include "config.h"
+#include "cpu.h"
+
+/** Cache coherency **/
+
+/*
+ * Cleans entire DCache
+ * void clean_dcache(void);
+ */
+    .section   .icode, "ax", %progbits
+    .align      2
+    .global     clean_dcache
+    .type       clean_dcache, %function
+    .global     cpucache_flush      @ Alias
+clean_dcache:
+cpucache_flush:
+    @ Index format: 31:26 = index, 7:5 = segment, remainder = SBZ
+    mov     r1, #0x00000000         @
+1:  @ clean_start                   @
+    mcr     p15, 0, r1, c7, c10, 2  @ Clean entry by index
+    add     r0, r1, #0x00000010     @
+    mcr     p15, 0, r0, c7, c10, 2  @ Clean entry by index
+    add     r0, r0, #0x00000010     @
+    mcr     p15, 0, r0, c7, c10, 2  @ Clean entry by index
+    add     r0, r0, #0x00000010     @
+    mcr     p15, 0, r0, c7, c10, 2  @ Clean entry by index
+    adds    r1, r1, #0x04000000     @ will wrap to zero at loop end
+    bne     1b @ clean_start        @
+    mcr     p15, 0, r1, c7, c10, 4  @ Drain write buffer
+    bx      lr                      @ 
+    .size   clean_dcache, .-clean_dcache
+
+/*
+ * Invalidate entire DCache
+ * will do writeback
+ * void invalidate_dcache(void);
+ */
+    .section   .icode, "ax", %progbits
+    .align      2
+    .global     invalidate_dcache
+    .type       invalidate_dcache, %function
+invalidate_dcache:
+    @ Index format: 31:26 = index, 7:5 = segment, remainder = SBZ
+    mov     r1, #0x00000000         @
+1:  @ inv_start                     @
+    mcr     p15, 0, r1, c7, c14, 2  @ Clean and invalidate entry by index
+    add     r0, r1, #0x00000010     @
+    mcr     p15, 0, r0, c7, c14, 2  @ Clean and invalidate entry by index
+    add     r0, r0, #0x00000010     @
+    mcr     p15, 0, r0, c7, c14, 2  @ Clean and invalidate entry by index
+    add     r0, r0, #0x00000010     @
+    mcr     p15, 0, r0, c7, c14, 2  @ Clean and invalidate entry by index
+    adds    r1, r1, #0x04000000     @ will wrap to zero at loop end
+    bne     1b @ inv_start          @
+    mcr     p15, 0, r1, c7, c10, 4  @ Drain write buffer
+    bx      lr                      @
+    .size   invalidate_dcache, .-invalidate_dcache
+
+/*
+ * Invalidate entire ICache and DCache
+ * will do writeback
+ * void invalidate_idcache(void);
+ */
+    .section   .icode, "ax", %progbits
+    .align      2
+    .global     invalidate_idcache
+    .type       invalidate_idcache, %function
+    .global     cpucache_invalidate @ Alias
+invalidate_idcache:
+cpucache_invalidate: 
+    mov     r2, lr                  @ save lr to r2, call uses r0 and r1 only
+    bl      invalidate_dcache       @ Clean and invalidate entire DCache
+    mcr     p15, 0, r1, c7, c5, 0   @ Invalidate ICache (r1=0 from call)
+    mov     pc, r2                  @
+    .size   invalidate_idcache, .-invalidate_idcache