Moved archos LCD aseembler code to target tree.

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@11478 a1c6a512-1295-4272-9138-f99709370657

3 files changed, 246 insertions, 91 deletions

diff --git a/firmware/SOURCES b/firmware/SOURCES
index 2b3e632..1a43eab 100644
--- a/firmware/SOURCES
+++ b/firmware/SOURCES
@@ -213,7 +213,6 @@ bitswap.S
 crt0.S
 descramble.S
 drivers/i2c.c
-drivers/lcd.S
 target/sh/crt0.S
 target/sh/memcpy-sh.S
 target/sh/memmove-sh.S
@@ -246,7 +245,6 @@ target/coldfire/i2c-coldfire.c
 common/memcpy.c
 common/memmove.c
 common/strlen.c
-drivers/lcd.S
 #ifndef SIMULATOR
 target/arm/memset-arm.S
 target/arm/memset16-arm.S
@@ -280,6 +278,30 @@ drivers/i2c.c
 
 #endif /* defined(CPU_*) */
 
+#ifdef ARCHOS_PLAYER
+#ifndef SIMULATOR
+target/sh/archos/player/lcd-as-player.S
+#endif /* SIMULATOR */
+#endif /* ARCHOS_PLAYER */
+
+#ifdef ARCHOS_RECORDER
+#ifndef SIMULATOR
+target/sh/archos/lcd-as-archos-bitmap.S
+#endif /* SIMULATOR */
+#endif /* ARCHOS_RECORDER */
+
+#if defined(ARCHOS_FMRECORDER) || defined(ARCHOS_RECORDERV2)
+#ifndef SIMULATOR
+target/sh/archos/lcd-as-archos-bitmap.S
+#endif /* SIMULATOR */
+#endif /* ARCHOS_FMRECORDER || ARCHOS_RECORDERV2 */
+
+#if defined(ARCHOS_ONDIOFM) || defined(ARCHOS_ONDIOSP)
+#ifndef SIMULATOR
+target/sh/archos/lcd-as-archos-bitmap.S
+#endif /* SIMULATOR */
+#endif /* ARCHOS_ONDIOFM || ARCHOS_ONDIOFM */
+
 #ifdef SANSA_E200
 #ifndef SIMULATOR
 target/arm/wmcodec-pp.c
diff --git a/firmware/target/sh/archos/lcd-as-archos-bitmap.S b/firmware/target/sh/archos/lcd-as-archos-bitmap.S
new file mode 100755
index 0000000..bef231c
--- /dev/null
+++ b/firmware/target/sh/archos/lcd-as-archos-bitmap.S
@@ -0,0 +1,211 @@
+/***************************************************************************
+ *             __________               __   ___.
+ *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+ *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+ *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+ *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+ *                     \/            \/     \/    \/            \/
+ * $Id$
+ *
+ * Copyright (C) 2004 by Jens Arnold
+ * Based on the work of Alan Korr and Jörg Hohensohn
+ *
+ * All files in this archive are subject to the GNU General Public License.
+ * See the file COPYING in the source tree root for full license agreement.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+
+#include "config.h"
+#include "cpu.h"
+
+#define LCDR (PBDR_ADDR+1)
+
+#define LCD_SD  1 /* PB0 = 1 --- 0001 */
+#define LCD_SC  2 /* PB1 = 1 --- 0010 */
+#define LCD_DS  4 /* PB2 = 1 --- 0100 */
+#define LCD_CS  8 /* PB3 = 1 --- 1000 */
+
+/*
+ * About /CS,DS,SC,SD
+ * ------------------
+ *
+ * LCD on JBP and JBR uses a SPI protocol to receive orders (SDA and SCK lines)
+ *
+ * - /CS -> Chip Selection line :
+ *            0 : LCD chipset is activated.
+ * -  DS -> Data Selection line, latched at the rising edge
+ *          of the 8th serial clock (*) :
+ *            0 : instruction register,
+ *            1 : data register;
+ * -  SC -> Serial Clock line (SDA).
+ * -  SD -> Serial Data line (SCK), latched at the rising edge
+ *          of each serial clock (*).
+ *
+ *    _                                                          _
+ * /CS \                                                        /
+ *      \______________________________________________________/
+ *    _____  ____  ____  ____  ____  ____  ____  ____  ____  _____
+ *  SD     \/ D7 \/ D6 \/ D5 \/ D4 \/ D3 \/ D2 \/ D1 \/ D0 \/
+ *    _____/\____/\____/\____/\____/\____/\____/\____/\____/\_____
+ *
+ *    _____     _     _     _     _     _     _     _     ________
+ *  SC     \   * \   * \   * \   * \   * \   * \   * \   *
+ *          \_/   \_/   \_/   \_/   \_/   \_/   \_/   \_/
+ *    _  _________________________________________________________
+ *  DS \/
+ *    _/\_________________________________________________________
+ *
+ */
+
+    .section    .icode,"ax",@progbits
+
+    .align      2
+    .global     _lcd_write_command
+    .type       _lcd_write_command,@function
+
+/* Write a command byte to the lcd controller
+ *
+ * Arguments:
+ *   r4 - data byte (int)
+ *
+ * Register usage:
+ *   r0 - scratch
+ *   r1 - data byte (copied)
+ *   r2 - precalculated port value (CS, DS and SC low, SD high),
+ *        negated (neg)!
+ *   r3 - lcd port address
+ *   r5 - 1 (byte count for reuse of the loop in _lcd_write_data)
+ */
+
+_lcd_write_command:
+    mov.l   .lcdr,r3        /* put lcd data port address in r3 */
+    mov     r4,r1           /* copy data byte to r1 */
+    mov     #1,r5           /* set byte count to 1 (!) */
+
+    /* This code will fail if an interrupt changes the contents of PBDRL.
+     * If so, we must disable the interrupt here. */
+
+    mov.b   @r3,r0          /* r0 = PBDRL */
+    or      #(LCD_SD),r0    /* r0 |= LCD_SD */
+    and     #(~(LCD_CS|LCD_DS|LCD_SC)),r0  /* r0 &= ~(LCD_CS|LCD_DS|LCD_SC) */
+
+    bra     .single_transfer /* jump into the transfer loop */
+    neg     r0,r2           /* r2 = 0 - r0 */
+
+
+    .align      2
+    .global     _lcd_write_data
+    .type       _lcd_write_data,@function
+
+
+/* A high performance function to write data to the display,
+ * one or multiple bytes.
+ *
+ * Arguments:
+ *   r4 - data address
+ *   r5 - byte count
+ *
+ * Register usage:
+ *   r0 - scratch
+ *   r1 - current data byte
+ *   r2 - precalculated port value (CS and SC low, DS and SD high),
+ *        negated (neg)!
+ *   r3 - lcd port address
+ */
+
+_lcd_write_data:
+    mov.l   .lcdr,r3        /* put lcd data port address in r3 */
+    nop                     /* align here */
+
+    /* This code will fail if an interrupt changes the contents of PBDRL.
+     * If so, we must disable the interrupt here. If disabling interrupts
+     * for a long time (~9200 clks = ~830 µs for transferring 112 bytes on
+     * recorders)is undesirable, the loop has to be rewritten to
+     * disable/precalculate/transfer/enable for each iteration. However,
+     * this would significantly decrease performance. */
+
+    mov.b   @r3,r0          /* r0 = PBDRL */
+    or      #(LCD_DS|LCD_SD),r0     /* r0 |= LCD_DS|LCD_SD */
+    and     #(~(LCD_CS|LCD_SC)),r0  /* r0 &= ~(LCD_CS|LCD_SC) */
+    neg     r0,r2           /* r2 = 0 - r0 */
+
+    /* loop exploits that SD is on bit 0 for recorders and Ondios */
+
+    .align  2
+.multi_transfer:
+    mov.b   @r4+,r1         /* load data byte from memory */
+    nop
+
+.single_transfer:
+    shll16  r1              /* shift data to most significant byte */
+    shll8   r1
+    not     r1,r1           /* and invert for use with negc */
+
+    shll    r1              /* shift the MSB into carry */
+    negc    r2,r0           /* carry to SD, SC low */
+    shll    r1              /* next shift here for alignment */
+    mov.b   r0,@r3          /* set data to port */
+    or      #(LCD_SC),r0    /* rise SC (independent of SD level) */
+    mov.b   r0,@r3          /* set to port */
+
+    negc    r2,r0
+    mov.b   r0,@r3
+    or      #(LCD_SC),r0
+    mov.b   r0,@r3
+
+    shll    r1
+    negc    r2,r0
+    shll    r1
+    mov.b   r0,@r3
+    or      #(LCD_SC),r0
+    mov.b   r0,@r3
+
+    negc    r2,r0
+    mov.b   r0,@r3
+    or      #(LCD_SC),r0
+    mov.b   r0,@r3
+
+    shll    r1
+    negc    r2,r0
+    shll    r1
+    mov.b   r0,@r3
+    or      #(LCD_SC),r0
+    mov.b   r0,@r3
+
+    negc    r2,r0
+    mov.b   r0,@r3
+    or      #(LCD_SC),r0
+    mov.b   r0,@r3
+
+    shll    r1
+    negc    r2,r0
+    shll    r1
+    mov.b   r0,@r3
+    or      #(LCD_SC),r0
+    mov.b   r0,@r3
+
+    negc    r2,r0
+    mov.b   r0,@r3
+    or      #(LCD_SC),r0
+    mov.b   r0,@r3
+
+    add     #-1,r5          /* decrease byte count */
+    tst     r5,r5           /* r5 == 0 ? */
+    bf      .multi_transfer /* no: next iteration */
+
+    or      #(LCD_CS|LCD_DS|LCD_SD|LCD_SC),r0  /* restore port */
+    rts
+    mov.b   r0,@r3
+
+    /* This is the place to reenable the interrupts, if we have disabled
+     * them. See above. */
+
+    .align  2
+.lcdr:
+    .long   LCDR
+
+.end:
+    .size   _lcd_write_command,.end-_lcd_write_command
diff --git a/firmware/drivers/lcd.S b/firmware/target/sh/archos/player/lcd-as-player.S
index ed0bc8d..7a63248 100755
--- a/firmware/drivers/lcd.S
+++ b/firmware/target/sh/archos/player/lcd-as-player.S
@@ -21,21 +21,12 @@
 #include "config.h"
 #include "cpu.h"
 
-#if CONFIG_CPU == SH7034
 #define LCDR (PBDR_ADDR+1)
 
-#ifdef HAVE_LCD_CHARCELLS
 #define LCD_DS  1 /* PB0 = 1 --- 0001 ---  LCD-DS */
 #define LCD_CS  2 /* PB1 = 1 --- 0010 --- /LCD-CS */
 #define LCD_SD  4 /* PB2 = 1 --- 0100 ---  LCD-SD */
 #define LCD_SC  8 /* PB3 = 1 --- 1000 ---  LCD-SC */
-#else
-#define LCD_SD  1 /* PB0 = 1 --- 0001 */
-#define LCD_SC  2 /* PB1 = 1 --- 0010 */
-#define LCD_RS  4 /* PB2 = 1 --- 0100 */
-#define LCD_CS  8 /* PB3 = 1 --- 1000 */
-#define LCD_DS LCD_RS
-#endif
 
 /*
  * About /CS,DS,SC,SD
@@ -83,8 +74,7 @@
  * Register usage:
  *   r0 - scratch
  *   r1 - data byte (copied)
- *   r2 - precalculated port value (CS, DS and SC low, SD high),
- *        negated (neg)!
+ *   r2 - precalculated port value (CS, DS and SC low, SD high)
  *   r3 - lcd port address
  *   r5 - 1 (byte count for reuse of the loop in _lcd_write_data)
  */
@@ -102,7 +92,7 @@ _lcd_write_command:
     and     #(~(LCD_CS|LCD_DS|LCD_SC)),r0  /* r0 &= ~(LCD_CS|LCD_DS|LCD_SC) */
 
     bra     .single_transfer /* jump into the transfer loop */
-    neg     r0,r2           /* r2 = 0 - r0 */
+    mov     r0,r2
 
 
     .align      2
@@ -139,10 +129,7 @@ _lcd_write_data:
     mov.b   @r3,r0          /* r0 = PBDRL */
     or      #(LCD_DS|LCD_SD),r0     /* r0 |= LCD_DS|LCD_SD */
     and     #(~(LCD_CS|LCD_SC)),r0  /* r0 &= ~(LCD_CS|LCD_SC) */
-    neg     r0,r2           /* r2 = 0 - r0 */
-
-#ifdef HAVE_LCD_CHARCELLS
-/* optimized player version, also works for recorders */
+    mov     r0,r2
 
     .align  2
 .multi_transfer:
@@ -153,8 +140,7 @@ _lcd_write_data:
     shll8   r1
 
     shll    r1              /* shift the msb into carry */
-    neg     r2,r0           /* copy negated precalculated port value */
-            /* uses neg here for compatibility with recorder version */
+    mov     r2,r0           /* copy precalculated port value */
     bt      1f              /* data bit = 1? */
     and     #(~LCD_SD),r0   /* no: r0 &= ~LCD_SD */
     1:
@@ -163,7 +149,7 @@ _lcd_write_data:
     or      #(LCD_SC),r0    /* rise SC (independent of SD level) */
     mov.b   r0,@r3          /* set to port */
 
-    neg     r2,r0
+    mov     r2,r0
     bt      1f
     and     #(~LCD_SD),r0
     1:
@@ -172,7 +158,7 @@ _lcd_write_data:
     mov.b   r0,@r3
 
     shll    r1
-    neg     r2,r0
+    mov     r2,r0
     bt      1f
     and     #(~LCD_SD),r0
     1:
@@ -181,7 +167,7 @@ _lcd_write_data:
     or      #(LCD_SC),r0
     mov.b   r0,@r3
 
-    neg     r2,r0
+    mov     r2,r0
     bt      1f
     and     #(~LCD_SD),r0
     1:
@@ -190,7 +176,7 @@ _lcd_write_data:
     mov.b   r0,@r3
 
     shll    r1
-    neg     r2,r0
+    mov     r2,r0
     bt      1f
     and     #(~LCD_SD),r0
     1:
@@ -199,7 +185,7 @@ _lcd_write_data:
     or      #(LCD_SC),r0
     mov.b   r0,@r3
 
-    neg     r2,r0
+    mov     r2,r0
     bt      1f
     and     #(~LCD_SD),r0
     1:
@@ -208,7 +194,7 @@ _lcd_write_data:
     mov.b   r0,@r3
 
     shll    r1
-    neg     r2,r0
+    mov     r2,r0
     bt      1f
     and     #(~LCD_SD),r0
     1:
@@ -217,7 +203,7 @@ _lcd_write_data:
     or      #(LCD_SC),r0
     mov.b   r0,@r3
 
-    neg     r2,r0
+    mov     r2,r0
     bt      1f
     and     #(~LCD_SD),r0
     1:
@@ -225,69 +211,6 @@ _lcd_write_data:
     or      #(LCD_SC),r0
     mov.b   r0,@r3
 
-#else /* HAVE_LCD_CHARCELLS */
-/* further optimized version,  exploits that SD is on bit 0 for recorders */
-
-    .align  2
-.multi_transfer:
-    mov.b   @r4+,r1         /* load data byte from memory */
-    nop
-
-.single_transfer:
-    shll16  r1              /* shift data to most significant byte */
-    shll8   r1
-    not     r1,r1           /* and invert for use with negc */
-
-    shll    r1              /* shift the MSB into carry */
-    negc    r2,r0           /* carry to SD, SC low */
-    shll    r1              /* next shift here for alignment */
-    mov.b   r0,@r3          /* set data to port */
-    or      #(LCD_SC),r0    /* rise SC (independent of SD level) */
-    mov.b   r0,@r3          /* set to port */
-
-    negc    r2,r0
-    mov.b   r0,@r3
-    or      #(LCD_SC),r0
-    mov.b   r0,@r3
-
-    shll    r1
-    negc    r2,r0
-    shll    r1
-    mov.b   r0,@r3
-    or      #(LCD_SC),r0
-    mov.b   r0,@r3
-
-    negc    r2,r0
-    mov.b   r0,@r3
-    or      #(LCD_SC),r0
-    mov.b   r0,@r3
-
-    shll    r1
-    negc    r2,r0
-    shll    r1
-    mov.b   r0,@r3
-    or      #(LCD_SC),r0
-    mov.b   r0,@r3
-
-    negc    r2,r0
-    mov.b   r0,@r3
-    or      #(LCD_SC),r0
-    mov.b   r0,@r3
-
-    shll    r1
-    negc    r2,r0
-    shll    r1
-    mov.b   r0,@r3
-    or      #(LCD_SC),r0
-    mov.b   r0,@r3
-
-    negc    r2,r0
-    mov.b   r0,@r3
-    or      #(LCD_SC),r0
-    mov.b   r0,@r3
-
-#endif /* HAVE_LCD_CHARCELLS */
-
     add     #-1,r5          /* decrease byte count */
     tst     r5,r5           /* r5 == 0 ? */
     bf      .multi_transfer /* no: next iteration */
@@ -305,4 +228,3 @@ _lcd_write_data:
 
 .end:
     .size   _lcd_write_command,.end-_lcd_write_command
-#endif