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| author | Daniel Stenberg <daniel@haxx.se> | 2005-01-10 21:33:54 +0000 |
|---|---|---|
| committer | Daniel Stenberg <daniel@haxx.se> | 2005-01-10 21:33:54 +0000 |
| commit | d3e107cd2a23c4a92b8739559df29337e3f68b8b (patch) | |
| tree | 005911c4e243f24b5c8b411d1105e65fb5b7092f | |
| parent | 39fb8f0705c60f3aedfe10a44a25b02ac1f4906d (diff) | |
| download | rockbox-d3e107cd2a23c4a92b8739559df29337e3f68b8b.zip rockbox-d3e107cd2a23c4a92b8739559df29337e3f68b8b.tar.gz rockbox-d3e107cd2a23c4a92b8739559df29337e3f68b8b.tar.bz2 rockbox-d3e107cd2a23c4a92b8739559df29337e3f68b8b.tar.xz | |
Jean-Philippe Bernardy: gmini support
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@5551 a1c6a512-1295-4272-9138-f99709370657
| -rw-r--r-- | firmware/crt0.S | 103 |
1 files changed, 102 insertions, 1 deletions
diff --git a/firmware/crt0.S b/firmware/crt0.S index 8d014f0..0abc3bd 100644 --- a/firmware/crt0.S +++ b/firmware/crt0.S @@ -21,10 +21,108 @@ //#define BOOTLOADER +#if defined(ARCHOS_GMINI120) + .section .text + .global _start +_start: + ;; disable all interrupts + clrsr fe + clrsr ie + clrsr te + + ;; copy data section from flash to ram. + + ld a11, #(_datacopy) ; where the data section is in the flash + ld a8, #(_datastart) ; destination + + ld a9, #_datasize + ld r6, e9 + cmp eq, r6, #0 + brf .data_copy_loop + cmp eq, r9, #0 + brt .data_copy_end +.data_copy_loop: + ldc r2, @a11 + ldw @[a8 + 0], r2 + add a11, #0x2 + add a8, #0x2 + sub r9, #0x2 + sbc r6, #0 + cmp ugt, r6, #0 + brt .data_copy_loop + cmp ugt, r9, #0 + brt .data_copy_loop +.data_copy_end: + + ld r2, #0 + ld a8, #(_bssstart) ; destination + ld a9, #_bsssize + + ld r6, e9 + cmp eq, r6, #0 + brf .bss_init_loop + cmp eq, r9, #0 + brt .bss_init_end +.bss_init_loop: + ldw @[a8 + 0], r2 + add a8, #0x2 + sub r9, #0x2 + sbc r6, #0 + cmp ugt, r6, #0 + brt .bss_init_loop + cmp ugt, r9, #0 + brt .bss_init_loop +.bss_init_end: + + ld a15, _stackend + + ;; rest of the setup in C + jsr _cpu_setup + + ;; enable IRQs (keep traps and fast interrupts low) + setsr ie + + ;; go! + jsr _main + + ;; soft reset + ld a10, #0 + ldc r10, @a10 + jmp a10 + + + .section .vectors, "ax" +irq_handler: + + push r0, r1 + push r2, r3 + push r4, r5 + push r6, r7 + push a8, a9 + push a10, a11 + push a12, a13 + push a14 + ld a13, #0x3f0000 + ldb r0, @[a13 + 0x26] + add r0, r0 + ld a10, #_interrupt_vector + ldw a13, @[a10 + r0] + jsr a13 + pop a14 + pop a13, a12 + pop a11, a10 + pop a9, a8 + pop r7, r6 + pop r5, r4 + pop r3, r2 + pop r1, r0 + ret_irq + +#elif defined(IRIVER_H100) .section .init.text .global start start: -#ifdef IRIVER_H100 + /* Platform: iRiver H1xx */ move.w #0x2700,%sr @@ -166,6 +264,9 @@ vectors: .long _stackend .long start #else + .section .init.text + .global start +start: /* Platform: Archos Jukebox * We begin with some tricks. If we have built our code to be loaded * via the standalone GDB stub, we will have out VBR at some other |