Ingenic players:

 * Enable clocks when needed
 * Fix VX747+ button_hold()


git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19505 a1c6a512-1295-4272-9138-f99709370657

5 files changed, 17 insertions, 10 deletions

diff --git a/firmware/drivers/rtc/rtc_jz4740.c b/firmware/drivers/rtc/rtc_jz4740.c
index a1a864d..4bc5d5e 100644
--- a/firmware/drivers/rtc/rtc_jz4740.c
+++ b/firmware/drivers/rtc/rtc_jz4740.c
@@ -297,9 +297,11 @@ int rtc_ioctl(unsigned int cmd,struct rtc_time *val,unsigned int epo)
 
 void rtc_init(void)
 {
+    __cpm_start_rtc();
     REG_RTC_RCR = RTC_RCR_RTCE;
     udelay(70);
     while( !(REG_RTC_RCR & RTC_RCR_WRDY) );
     REG_RTC_RGR = (0x7fff | RTC_RGR_LOCK); 
     udelay(70);
+    __cpm_stop_rtc();
 }
diff --git a/firmware/export/jz4740.h b/firmware/export/jz4740.h
index afd10ce..e63228f 100644
--- a/firmware/export/jz4740.h
+++ b/firmware/export/jz4740.h
@@ -3282,7 +3282,7 @@ do {                        \
 #define __cpm_sleep_mode() \
     (REG_CPM_LCR = (REG_CPM_LCR & ~CPM_LCR_LPM_MASK) | CPM_LCR_LPM_SLEEP)
 
-#define __cpm_stop_all()     (REG_CPM_CLKGR = 0x7fff)
+#define __cpm_stop_all()     (REG_CPM_CLKGR = 0xffff)
 #define __cpm_stop_uart1()    (REG_CPM_CLKGR |= CPM_CLKGR_UART1)
 #define __cpm_stop_uhc()    (REG_CPM_CLKGR |= CPM_CLKGR_UHC)
 #define __cpm_stop_ipu()    (REG_CPM_CLKGR |= CPM_CLKGR_IPU)
diff --git a/firmware/target/mips/ingenic_jz47xx/lcd-jz4740.c b/firmware/target/mips/ingenic_jz47xx/lcd-jz4740.c
index e37e991..8112c21 100644
--- a/firmware/target/mips/ingenic_jz47xx/lcd-jz4740.c
+++ b/firmware/target/mips/ingenic_jz47xx/lcd-jz4740.c
@@ -39,6 +39,7 @@ static struct wakeup lcd_wkup;
 /* LCD init */
 void lcd_init_device(void)
 {
+    __cpm_start_lcd();
     lcd_init_controller();
     __cpm_stop_lcd();
     lcd_is_on = true;
diff --git a/firmware/target/mips/ingenic_jz47xx/onda_vx747/sadc-onda_vx747.c b/firmware/target/mips/ingenic_jz47xx/onda_vx747/sadc-onda_vx747.c
index 95c2f84..cd1da69 100644
--- a/firmware/target/mips/ingenic_jz47xx/onda_vx747/sadc-onda_vx747.c
+++ b/firmware/target/mips/ingenic_jz47xx/onda_vx747/sadc-onda_vx747.c
@@ -126,11 +126,11 @@ unsigned int battery_adc_voltage(void)
 
 void button_init_device(void)
 {
+    __cpm_start_sadc();
     REG_SADC_ENA = 0;
     REG_SADC_STATE &= (~REG_SADC_STATE);
     REG_SADC_CTRL = 0x1F;
     
-    __cpm_start_sadc();
     REG_SADC_CFG = SADC_CFG_INIT;
     
     system_enable_irq(IRQ_SADC);
@@ -184,7 +184,14 @@ static int touch_to_pixels(short x, short y)
 
 bool button_hold(void)
 {
-    return ((~REG_GPIO_PXPIN(3)) & BTN_HOLD ? true : false);
+    return (
+#ifdef ONDA_VX747
+            (~REG_GPIO_PXPIN(3)) & BTN_HOLD
+#elif defined(ONDA_VX747P)
+            (~REG_GPIO_PXPIN(2)) & BTN_HOLD
+#endif
+            ? true : false
+           );
 }
 
 int button_read_device(int *data)
@@ -192,13 +199,7 @@ int button_read_device(int *data)
     int ret = 0, tmp;
 
     /* Filter button events out if HOLD button is pressed at firmware/ level */
-    if(
-#ifdef ONDA_VX747
-    (~REG_GPIO_PXPIN(3)) & BTN_HOLD
-#elif defined(ONDA_VX747P)
-    (~REG_GPIO_PXPIN(2)) & BTN_HOLD
-#endif
-    )
+    if(button_hold())
         return 0;
 
     tmp = (~REG_GPIO_PXPIN(3)) & BTN_MASK;
diff --git a/firmware/target/mips/ingenic_jz47xx/system-jz4740.c b/firmware/target/mips/ingenic_jz47xx/system-jz4740.c
index 22d35d9..48fb192 100644
--- a/firmware/target/mips/ingenic_jz47xx/system-jz4740.c
+++ b/firmware/target/mips/ingenic_jz47xx/system-jz4740.c
@@ -694,6 +694,9 @@ void system_main(void)
     
     detect_clock();
     
+    /* Disable unneeded clocks, clocks are enabled when needed */
+    __cpm_stop_all();
+    
     /* Enable interrupts at core level */
     sti();