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| author | Rafaël Carré <rafael.carre@gmail.com> | 2008-12-05 14:37:28 +0000 |
|---|---|---|
| committer | Rafaël Carré <rafael.carre@gmail.com> | 2008-12-05 14:37:28 +0000 |
| commit | f07aa65117a196ecfd5ef097dc432d6f5d49c743 (patch) | |
| tree | 750485cbfad9072aeddd2753645f556ee4832fe6 | |
| parent | f577cd1fdbc24a3ffcd1f96204f862746b2362c5 (diff) | |
| download | rockbox-f07aa65117a196ecfd5ef097dc432d6f5d49c743.zip rockbox-f07aa65117a196ecfd5ef097dc432d6f5d49c743.tar.gz rockbox-f07aa65117a196ecfd5ef097dc432d6f5d49c743.tar.bz2 rockbox-f07aa65117a196ecfd5ef097dc432d6f5d49c743.tar.xz | |
Sansa AMS: correct VIC registers usage
* Do not use |= on write only registers
* Do use it in when setting kernel tick timer
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19350 a1c6a512-1295-4272-9138-f99709370657
| -rw-r--r-- | firmware/target/arm/as3525/kernel-as3525.c | 2 | ||||
| -rw-r--r-- | firmware/timer.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/firmware/target/arm/as3525/kernel-as3525.c b/firmware/target/arm/as3525/kernel-as3525.c index 3a4a067..3252e5a 100644 --- a/firmware/target/arm/as3525/kernel-as3525.c +++ b/firmware/target/arm/as3525/kernel-as3525.c @@ -48,7 +48,7 @@ void tick_start(unsigned int interval_in_ms) panicf("%s : interval too big", __func__); CGU_PERI |= CGU_TIMER2_CLOCK_ENABLE; /* enable peripheral */ - VIC_INT_ENABLE = INTERRUPT_TIMER2; /* enable interrupt */ + VIC_INT_ENABLE |= INTERRUPT_TIMER2; /* enable interrupt */ TIMER2_LOAD = TIMER2_BGLOAD = cycles; /* timer period */ diff --git a/firmware/timer.c b/firmware/timer.c index 0746b05..a11cd10 100644 --- a/firmware/timer.c +++ b/firmware/timer.c @@ -357,7 +357,7 @@ void timer_unregister(void) irq_disable_int(IRQ_TIMER1); #elif CONFIG_CPU == AS3525 TIMER1_CONTROL &= 0x10; /* disable timer 1 (don't modify bit 4) */ - VIC_INT_EN_CLEAR |= INTERRUPT_TIMER1; /* disable interrupt */ + VIC_INT_EN_CLEAR = INTERRUPT_TIMER1; /* disable interrupt */ CGU_PERI &= ~CGU_TIMER1_CLOCK_ENABLE; /* disable peripheral */ #elif CONFIG_CPU == S3C2440 || CONFIG_CPU == DM320 __TIMER_UNREGISTER(); |