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| author | Jens Arnold <amiconn@rockbox.org> | 2008-04-03 21:48:41 +0000 |
|---|---|---|
| committer | Jens Arnold <amiconn@rockbox.org> | 2008-04-03 21:48:41 +0000 |
| commit | fbfe6d66745426099fea9aaa7dac0ba3eba13e26 (patch) | |
| tree | ae60ba2cb7cffb3c5d78ee73c0d8a984f150101d | |
| parent | fe9eb68ec0e3d5b8b883e8942e3c0f24e44d598f (diff) | |
| download | rockbox-fbfe6d66745426099fea9aaa7dac0ba3eba13e26.zip rockbox-fbfe6d66745426099fea9aaa7dac0ba3eba13e26.tar.gz rockbox-fbfe6d66745426099fea9aaa7dac0ba3eba13e26.tar.bz2 rockbox-fbfe6d66745426099fea9aaa7dac0ba3eba13e26.tar.xz | |
Fix the PP5002 interrupt controller register definitions. The PP5002 interrupt controller matches the first half of the PP502x interrupt controller (the actual interrupt bits are different though).
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@16956 a1c6a512-1295-4272-9138-f99709370657
| -rw-r--r-- | firmware/export/pp5002.h | 14 |
1 files changed, 12 insertions, 2 deletions
diff --git a/firmware/export/pp5002.h b/firmware/export/pp5002.h index 8882f29..bbd7003 100644 --- a/firmware/export/pp5002.h +++ b/firmware/export/pp5002.h @@ -93,12 +93,22 @@ #define GPIOC_INT_CLR (*(volatile unsigned char *)(0xcf000078)) #define GPIOD_INT_CLR (*(volatile unsigned char *)(0xcf00007c)) -#define INT_FORCED_CLR (*(volatile unsigned long *)(0xcf00101c)) #define CPU_INT_STAT (*(volatile unsigned long *)(0xcf001000)) +#define COP_INT_STAT (*(volatile unsigned long *)(0xcf001004)) +#define CPU_FIQ_STAT (*(volatile unsigned long *)(0xcf001008)) +#define COP_FIQ_STAT (*(volatile unsigned long *)(0xcf00100c)) + +#define INT_STAT (*(volatile unsigned long *)(0xcf001010)) +#define INT_FORCED_STAT (*(volatile unsigned long *)(0xcf001014)) +#define INT_FORCED_SET (*(volatile unsigned long *)(0xcf001018)) +#define INT_FORCED_CLR (*(volatile unsigned long *)(0xcf00101c)) + +#define CPU_INT_EN_STAT (*(volatile unsigned long *)(0xcf001020)) #define CPU_INT_EN (*(volatile unsigned long *)(0xcf001024)) #define CPU_INT_CLR (*(volatile unsigned long *)(0xcf001028)) #define CPU_INT_PRIORITY (*(volatile unsigned long *)(0xcf00102c)) -#define COP_INT_STAT (*(volatile unsigned long *)(0xcf001010)) + +#define COP_INT_EN_STAT (*(volatile unsigned long *)(0xcf001030)) #define COP_INT_EN (*(volatile unsigned long *)(0xcf001034)) #define COP_INT_CLR (*(volatile unsigned long *)(0xcf001038)) #define COP_INT_PRIORITY (*(volatile unsigned long *)(0xcf00103c)) |