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| author | Michael Sevakis <jethead71@rockbox.org> | 2008-03-26 01:50:41 +0000 |
|---|---|---|
| committer | Michael Sevakis <jethead71@rockbox.org> | 2008-03-26 01:50:41 +0000 |
| commit | af395f4db6ad7b83f9d9afefb1c0ceeedd140a45 (patch) | |
| tree | b631289b4a3b28d3c65b10d272d50298f377c69f /apps/debug_menu.c | |
| parent | 74d678fdbcbc427c057e7682ba0a0566e49a8b97 (diff) | |
| download | rockbox-af395f4db6ad7b83f9d9afefb1c0ceeedd140a45.zip rockbox-af395f4db6ad7b83f9d9afefb1c0ceeedd140a45.tar.gz rockbox-af395f4db6ad7b83f9d9afefb1c0ceeedd140a45.tar.bz2 rockbox-af395f4db6ad7b83f9d9afefb1c0ceeedd140a45.tar.xz | |
Do core interrupt masking in a less general fashion and save some instructions to decrease size and speed things up a little bit. Small fix to a few places where interrupts would get enabled again where they shouldn't have been (context switching calls when disabled).
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@16811 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'apps/debug_menu.c')
| -rw-r--r-- | apps/debug_menu.c | 15 |
1 files changed, 8 insertions, 7 deletions
diff --git a/apps/debug_menu.c b/apps/debug_menu.c index fc509ce..d21dc03 100644 --- a/apps/debug_menu.c +++ b/apps/debug_menu.c @@ -417,7 +417,7 @@ static bool dbg_flash_id(unsigned* p_manufacturer, unsigned* p_device, not_id = flash[1]; /* should be 'A' (0x41) and 'R' (0x52) from the "ARCH" marker */ /* disable interrupts, prevent any stray flash access */ - old_level = set_irq_level(HIGHEST_IRQ_LEVEL); + old_level = disable_irq_save(); flash[addr1] = 0xAA; /* enter command mode */ flash[addr2] = 0x55; @@ -432,7 +432,7 @@ static bool dbg_flash_id(unsigned* p_manufacturer, unsigned* p_device, /* Atmel wants 20ms pause here */ /* sleep(HZ/50); no sleeping possible while interrupts are disabled */ - set_irq_level(old_level); /* enable interrupts again */ + restore_irq(old_level); /* enable interrupts again */ /* I assume success if the obtained values are different from the normal flash content. This is not perfectly bulletproof, they @@ -2066,9 +2066,12 @@ static bool dbg_save_roms(void) char buf[EEPROM_SIZE]; int err; - old_irq_level = set_irq_level(HIGHEST_IRQ_LEVEL); + old_irq_level = disable_irq_save(); err = eeprom_24cxx_read(0, buf, sizeof buf); + + restore_irq(old_irq_level); + if (err) gui_syncsplash(HZ*3, "Eeprom read failure (%d)",err); else @@ -2076,8 +2079,6 @@ static bool dbg_save_roms(void) write(fd, buf, sizeof buf); } - set_irq_level(old_irq_level); - close(fd); } #endif @@ -2248,7 +2249,7 @@ static bool dbg_write_eeprom(void) if(rc == EEPROM_SIZE) { - old_irq_level = set_irq_level(HIGHEST_IRQ_LEVEL); + old_irq_level = disable_irq_save(); err = eeprom_24cxx_write(0, buf, sizeof buf); if (err) @@ -2256,7 +2257,7 @@ static bool dbg_write_eeprom(void) else gui_syncsplash(HZ*3, "Eeprom written successfully"); - set_irq_level(old_irq_level); + restore_irq(old_irq_level); } else { |