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authorRob Purchase <shotofadds@rockbox.org>2009-09-01 21:35:37 +0000
committerRob Purchase <shotofadds@rockbox.org>2009-09-01 21:35:37 +0000
commit19a5dfea283c89540b61d0103ba0fe8ddee17612 (patch)
treef958da80e4bdd29ce75efba58b5d995036f8332a /apps
parent166606cea08761ce3d1acf6283db97ede444bd98 (diff)
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D2: Enable ARM cache coherency functions (eg. during codec load), which should eliminate data aborts/freezes on track changes. NOTE: The linker script reserves space at the end of DRAM for the TTB, but this is not currently used.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@22595 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'apps')
-rw-r--r--apps/plugins/plugin.lds4
1 files changed, 4 insertions, 0 deletions
diff --git a/apps/plugins/plugin.lds b/apps/plugins/plugin.lds
index 70bc3e0..f93d5d4 100644
--- a/apps/plugins/plugin.lds
+++ b/apps/plugins/plugin.lds
@@ -61,6 +61,10 @@ OUTPUT_FORMAT(elf32-littlemips)
#define TTB_SIZE (0x4000)
#define DRAMSIZE (MEMORYSIZE * 0x100000) - STUBOFFSET - PLUGIN_BUFFER_SIZE - CODEC_SIZE - LCD_BUFFER_SIZE - TTB_SIZE
+#elif CONFIG_CPU==TCC7801
+#include "cpu.h"
+#define DRAMSIZE (MEMORYSIZE * 0x100000) - STUBOFFSET - PLUGIN_BUFFER_SIZE - CODEC_SIZE - TTB_SIZE
+
#elif CONFIG_CPU==AS3525
#include "cpu.h"
#define DRAMORIG DRAM_ORIG