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| author | Michael Sevakis <jethead71@rockbox.org> | 2007-10-18 01:26:50 +0000 |
|---|---|---|
| committer | Michael Sevakis <jethead71@rockbox.org> | 2007-10-18 01:26:50 +0000 |
| commit | a443614dd20ef0fe7ca7d723d6ea4428a4da522c (patch) | |
| tree | e492d01f01d2fcc806672c1a4b0417eced8fee1b /firmware/export/pp5020.h | |
| parent | fffc257897568670a1dcc3b37418c6e6a067e3d3 (diff) | |
| download | rockbox-a443614dd20ef0fe7ca7d723d6ea4428a4da522c.zip rockbox-a443614dd20ef0fe7ca7d723d6ea4428a4da522c.tar.gz rockbox-a443614dd20ef0fe7ca7d723d6ea4428a4da522c.tar.bz2 rockbox-a443614dd20ef0fe7ca7d723d6ea4428a4da522c.tar.xz | |
PP502x: Get switch_thread back out of IRAM and devise a better core wakeup system that's not timing dependant. Hopefully something simpler will be found or devised eventually that meets all requirements. Rename mailbox-related registers.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@15179 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/export/pp5020.h')
| -rw-r--r-- | firmware/export/pp5020.h | 27 |
1 files changed, 15 insertions, 12 deletions
diff --git a/firmware/export/pp5020.h b/firmware/export/pp5020.h index 865b0b2..9d2a3b9 100644 --- a/firmware/export/pp5020.h +++ b/firmware/export/pp5020.h @@ -31,18 +31,21 @@ #define PROC_ID_COP 0xaa /* Mailboxes */ -/* Each processor has two mailboxes it can write to and two which - it can read from. We define the first to be for sending messages - and the second for replying to messages */ -#define CPU_MESSAGE (*(volatile unsigned long *)(0x60001000)) -#define COP_MESSAGE (*(volatile unsigned long *)(0x60001004)) -#define CPU_REPLY (*(volatile unsigned long *)(0x60001008)) -#define COP_REPLY (*(volatile unsigned long *)(0x6000100c)) -#define MBOX_CONTROL (*(volatile unsigned long *)(0x60001010)) - -/* Simple convenient array-like access */ -#define PROC_MESSAGE(core) ((&CPU_MESSAGE)[core]) -#define PROC_REPLY(core) ((&CPU_REPLY)[core]) +#define MBX_BASE (0x60001000) +/* Read bits in the mailbox */ +#define MBX_MSG_STAT (*(volatile unsigned long *)(0x60001000)) +/* Set bits in the mailbox */ +#define MBX_MSG_SET (*(volatile unsigned long *)(0x60001004)) +/* Clear bits in the mailbox */ +#define MBX_MSG_CLR (*(volatile unsigned long *)(0x60001008)) +/* Doesn't seem to be COP_REPLY at all :) */ +#define MBX_UNKNOWN1 (*(volatile unsigned long *)(0x6000100c)) +/* COP can set bit 29 - only CPU read clears it */ +#define CPU_QUEUE (*(volatile unsigned long *)(0x60001010)) +/* CPU can set bit 29 - only COP read clears it */ +#define COP_QUEUE (*(volatile unsigned long *)(0x60001020)) + +#define PROC_QUEUE(core) ((&CPU_QUEUE)[(core)*4]) /* Interrupts */ #define CPU_INT_STAT (*(volatile unsigned long*)(0x60004000)) |