diff options
| author | Rob Purchase <shotofadds@rockbox.org> | 2008-01-14 22:04:48 +0000 |
|---|---|---|
| committer | Rob Purchase <shotofadds@rockbox.org> | 2008-01-14 22:04:48 +0000 |
| commit | 47ea030e2e68a51f91a2c2302b7ea4d3ee1a2a07 (patch) | |
| tree | 0a48ce653e22ec9a2673474f718217d9659e0c6b /firmware/export | |
| parent | b30ca8ca5ab6c8ea27b8fe1f5fb38ebad09b7e62 (diff) | |
| download | rockbox-47ea030e2e68a51f91a2c2302b7ea4d3ee1a2a07.zip rockbox-47ea030e2e68a51f91a2c2302b7ea4d3ee1a2a07.tar.gz rockbox-47ea030e2e68a51f91a2c2302b7ea4d3ee1a2a07.tar.bz2 rockbox-47ea030e2e68a51f91a2c2302b7ea4d3ee1a2a07.tar.xz | |
Initial Cowon D2 commit:
* bootloader test program (basic LCD & button drivers, reads touchscreen)
* work-in-progress stubs for main build
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@16090 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/export')
| -rw-r--r-- | firmware/export/audiohw.h | 4 | ||||
| -rw-r--r-- | firmware/export/config-cowond2.h | 140 | ||||
| -rw-r--r-- | firmware/export/config.h | 17 | ||||
| -rw-r--r-- | firmware/export/cpu.h | 3 | ||||
| -rw-r--r-- | firmware/export/tcc780x.h | 156 | ||||
| -rw-r--r-- | firmware/export/timer.h | 2 | ||||
| -rw-r--r-- | firmware/export/wm8985.h | 43 |
7 files changed, 361 insertions, 4 deletions
diff --git a/firmware/export/audiohw.h b/firmware/export/audiohw.h index 5dc7550..cdc9222 100644 --- a/firmware/export/audiohw.h +++ b/firmware/export/audiohw.h @@ -29,6 +29,8 @@ #include "wm8751.h" #elif defined(HAVE_WM8975) || defined(HAVE_WM8978) #include "wm8975.h" +#elif defined(HAVE_WM8985) +#include "wm8985.h" #elif defined(HAVE_WM8758) #include "wm8758.h" #elif defined(HAVE_WM8721) @@ -62,7 +64,7 @@ enum { #endif #if CONFIG_CODEC == MAS3587F || defined(HAVE_UDA1380) || defined(HAVE_TLV320)\ || defined(HAVE_WM8975) || defined(HAVE_WM8758) || defined(HAVE_WM8731) \ - || defined(HAVE_AS3514) || defined(HAVE_WM8978) + || defined(HAVE_AS3514) || defined(HAVE_WM8978) || defined(HAVE_WM8985) SOUND_LEFT_GAIN, SOUND_RIGHT_GAIN, SOUND_MIC_GAIN, diff --git a/firmware/export/config-cowond2.h b/firmware/export/config-cowond2.h new file mode 100644 index 0000000..4f2d11e --- /dev/null +++ b/firmware/export/config-cowond2.h @@ -0,0 +1,140 @@ +/* + * This config file is for the Cowon iAudio D2 + */ +#define TARGET_TREE /* this target is using the target tree system */ + +/* For Rolo and boot loader */ +#define MODEL_NUMBER 34 + +/* define this if you have recording possibility */ +//#define HAVE_RECORDING + +/* Define bitmask of input sources - recordable bitmask can be defined + explicitly if different */ +//#define INPUT_SRC_CAPS (SRC_CAP_MIC | SRC_CAP_LINEIN | SRC_CAP_SPDIF) + +/* define this if you have a bitmap LCD display */ +#define HAVE_LCD_BITMAP + +/* define this if you have a colour LCD */ +#define HAVE_LCD_COLOR + +/* define this if you can flip your LCD */ +#define HAVE_LCD_FLIP + +/* define this if you can invert the colours on your LCD */ +#define HAVE_LCD_INVERT + +/* define this if you want album art for this target */ +#define HAVE_ALBUMART + +/* define this if you have access to the quickscreen */ +#define HAVE_QUICKSCREEN +/* define this if you have access to the pitchscreen */ +#define HAVE_PITCHSCREEN + +/* define this if you would like tagcache to build on this target */ +#define HAVE_TAGCACHE + +/* define this if you have a flash memory storage */ +#define HAVE_FLASH_STORAGE + +/* LCD dimensions */ +#define LCD_WIDTH 320 +#define LCD_HEIGHT 240 +#define LCD_DEPTH 16 +#define LCD_PIXELFORMAT 565 + +/* define this if you have LCD enable function */ +#define HAVE_LCD_ENABLE + +/* define this to indicate your device's keypad */ +#define CONFIG_KEYPAD COWOND2_PAD + +/* define this if you have a real-time clock */ +//#define CONFIG_RTC RTC_TCC780X + +/* define this if you have RTC RAM available for settings */ +//#define HAVE_RTC_RAM + +/* Define this if you have a software controlled poweroff */ +#define HAVE_SW_POWEROFF + +/* The number of bytes reserved for loadable codecs */ +#define CODEC_SIZE 0x80000 + +/* The number of bytes reserved for loadable plugins */ +#define PLUGIN_BUFFER_SIZE 0x80000 + +#define AB_REPEAT_ENABLE 1 + +/* Define this if you do software codec */ +#define CONFIG_CODEC SWCODEC + +/* The D2 uses a WM8985 codec */ +#define HAVE_WM8985 + +/* There is no hardware tone control */ +/* TODO: probably need to use this */ +//#define HAVE_SW_TONE_CONTROLS + +/* Define this for LCD backlight available */ +#define HAVE_BACKLIGHT + +/* TODO: Enable LCD brightness control */ +//#define HAVE_BACKLIGHT_BRIGHTNESS + +/* Main LCD backlight brightness range and defaults */ +//#define MIN_BRIGHTNESS_SETTING 1 +//#define MAX_BRIGHTNESS_SETTING 10 +//#define DEFAULT_BRIGHTNESS_SETTING 8 + +#define CONFIG_I2C I2C_TCC780X + +#define BATTERY_CAPACITY_DEFAULT 1500 /* default battery capacity */ +#define BATTERY_CAPACITY_MIN 1500 /* min. capacity selectable */ +#define BATTERY_CAPACITY_MAX 3200 /* max. capacity selectable */ +#define BATTERY_CAPACITY_INC 50 /* capacity increment */ +#define BATTERY_TYPES_COUNT 1 /* only one type */ + +/* define this if the unit should not shut down on low battery. */ +/* TODO: this is temporary until battery monitoring implemented */ +#define NO_LOW_BATTERY_SHUTDOWN + +#ifndef SIMULATOR + +/* Define this if you have a TCC7801 */ +#define CONFIG_CPU TCC7801 + +/* Define this if you have ATA power-off control */ +#define HAVE_ATA_POWER_OFF + +/* Define this to the CPU frequency */ +#define CPU_FREQ 192000000 + +/* Define this if you have adjustable CPU frequency */ +#define HAVE_ADJUSTABLE_CPU_FREQ + +/* Offset ( in the firmware file's header ) to the file length */ +#define FIRMWARE_OFFSET_FILE_LENGTH 0 + +/* Offset ( in the firmware file's header ) to the file CRC */ +#define FIRMWARE_OFFSET_FILE_CRC 4 + +/* Offset ( in the firmware file's header ) to the real data */ +#define FIRMWARE_OFFSET_FILE_DATA 6 + +/* The start address index for ROM builds */ +/* #define ROM_START 0x11010 for behind original Archos */ +#define ROM_START 0x7010 /* for behind BootBox */ + +/* Software controlled LED */ +#define CONFIG_LED LED_VIRTUAL + +#define CONFIG_LCD LCD_COWOND2 + +#define BOOTFILE_EXT "iaudio" +#define BOOTFILE "rockbox." BOOTFILE_EXT +#define BOOTDIR "/" + +#endif /* SIMULATOR */ diff --git a/firmware/export/config.h b/firmware/export/config.h index a3c2390..cf75d67 100644 --- a/firmware/export/config.h +++ b/firmware/export/config.h @@ -53,6 +53,7 @@ #define IMX31L 31 #define TCC771L 771 #define TCC773L 773 +#define TCC7801 7801 /* CONFIG_KEYPAD */ #define PLAYER_PAD 1 @@ -75,7 +76,8 @@ #define MROBE500_PAD 18 #define GIGABEAT_S_PAD 19 #define LOGIK_DAX_PAD 20 -#define IAUDIO67_PAD 21 +#define IAUDIO67_PAD 21 +#define COWOND2_PAD 22 /* CONFIG_REMOTE_KEYPAD */ #define H100_REMOTE 1 @@ -111,6 +113,7 @@ #define LCD_MROBE100 19 /* as used by Olympus M:Robe 100 */ #define LCD_LOGIKDAX 20 /* as used by Logik DAX - SSD1815 */ #define LCD_IAUDIO67 21 /* as used by iAudio 6/7 - unknown */ +#define LCD_COWOND2 21 /* as used by Cowon D2 - LTV250QV, TCC7801 driver */ /* LCD_PIXELFORMAT */ #define HORIZONTAL_PACKING 1 @@ -136,6 +139,7 @@ #define I2C_PP5024 8 /* PP5024 style */ #define I2C_IMX31L 9 #define I2C_TCC77X 10 +#define I2C_TCC780X 11 /* CONFIG_LED */ #define LED_REAL 1 /* SW controlled LED (Archos recorders, player) */ @@ -156,6 +160,7 @@ #define RTC_IMX31L 8 #define RTC_RX5X348AB 9 #define RTC_TCC77X 10 +#define RTC_TCC780X 11 /* USB On-the-go */ #define USBOTG_ISP1362 1362 /* iriver H300 */ @@ -231,6 +236,8 @@ #include "config-logikdax.h" #elif defined(IAUDIO_7) #include "config-iaudio7.h" +#elif defined(COWON_D2) +#include "config-cowond2.h" #else /* no known platform */ #endif @@ -345,6 +352,11 @@ #define CPU_TCC77X #endif +/* define for all cpus from TCC780 family */ +#if (CONFIG_CPU == TCC7801) +#define CPU_TCC780X +#endif + /* define for all cpus from ARM7TDMI family (for specific optimisations) */ #if defined(CPU_PP) || (CONFIG_CPU == PNX0101) || (CONFIG_CPU == DSC25) #define CPU_ARM7TDMI @@ -353,7 +365,7 @@ /* define for all cpus from ARM family */ #if defined(CPU_PP) || (CONFIG_CPU == PNX0101) || (CONFIG_CPU == S3C2440) \ || (CONFIG_CPU == DSC25) || (CONFIG_CPU == IMX31L) || (CONFIG_CPU == DM320) \ - || defined(CPU_TCC77X) + || defined(CPU_TCC77X) || defined(CPU_TCC780X) #define CPU_ARM #endif @@ -380,6 +392,7 @@ defined(CPU_COLDFIRE) || /* Coldfire: core, plugins, codecs */ \ defined(CPU_PP) || /* PortalPlayer: core, plugins, codecs */ \ defined(CPU_TCC77X) || /* Telechips: core, plugins, codecs */ \ + defined(CPU_TCC780X) || /* Telechips: core, plugins, codecs */ \ (CONFIG_CPU == PNX0101)) #define ICODE_ATTR __attribute__ ((section(".icode"))) #define ICONST_ATTR __attribute__ ((section(".irodata"))) diff --git a/firmware/export/cpu.h b/firmware/export/cpu.h index 8422937..08a91a6 100644 --- a/firmware/export/cpu.h +++ b/firmware/export/cpu.h @@ -51,3 +51,6 @@ #ifdef CPU_TCC77X #include "tcc77x.h" #endif +#ifdef CPU_TCC780X +#include "tcc780x.h" +#endif diff --git a/firmware/export/tcc780x.h b/firmware/export/tcc780x.h new file mode 100644 index 0000000..df55c6f --- /dev/null +++ b/firmware/export/tcc780x.h @@ -0,0 +1,156 @@ +/*************************************************************************** + * __________ __ ___. + * Open \______ \ ____ ____ | | _\_ |__ _______ ___ + * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / + * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < + * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ + * \/ \/ \/ \/ \/ + * $Id$ + * + * Copyright (C) 2007 Rob Purchase + * + * All files in this archive are subject to the GNU General Public License. + * See the file COPYING in the source tree root for full license agreement. + * + * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY + * KIND, either express or implied. + * + ****************************************************************************/ +#ifndef __TCC780X_H__ +#define __TCC780X_H__ + +/* General-purpose IO */ + +#define PORTCFG0 (*(volatile unsigned long *)0xF005A000) +#define PORTCFG1 (*(volatile unsigned long *)0xF005A004) +#define PORTCFG2 (*(volatile unsigned long *)0xF005A008) +#define PORTCFG3 (*(volatile unsigned long *)0xF005A00C) + +#define GPIOA (*(volatile unsigned long *)0xF005A020) +#define GPIOB (*(volatile unsigned long *)0xF005A040) +#define GPIOC (*(volatile unsigned long *)0xF005A060) +#define GPIOD (*(volatile unsigned long *)0xF005A080) +#define GPIOE (*(volatile unsigned long *)0xF005A0A0) + +#define GPIOA_DIR (*(volatile unsigned long *)0xF005A024) +#define GPIOB_DIR (*(volatile unsigned long *)0xF005A044) +#define GPIOC_DIR (*(volatile unsigned long *)0xF005A064) +#define GPIOD_DIR (*(volatile unsigned long *)0xF005A084) +#define GPIOE_DIR (*(volatile unsigned long *)0xF005A0A4) + +#define GPIOA_SET (*(volatile unsigned long *)0xF005A028) +#define GPIOB_SET (*(volatile unsigned long *)0xF005A048) +#define GPIOC_SET (*(volatile unsigned long *)0xF005A068) +#define GPIOD_SET (*(volatile unsigned long *)0xF005A088) +#define GPIOE_SET (*(volatile unsigned long *)0xF005A0A8) + +#define GPIOA_CLEAR (*(volatile unsigned long *)0xF005A02C) +#define GPIOB_CLEAR (*(volatile unsigned long *)0xF005A04C) +#define GPIOC_CLEAR (*(volatile unsigned long *)0xF005A06C) +#define GPIOD_CLEAR (*(volatile unsigned long *)0xF005A08C) +#define GPIOE_CLEAR (*(volatile unsigned long *)0xF005A0AC) + +/* Clock Generator */ + +#define CLKCTRL (*(volatile unsigned long *)0xF3000000) +#define PLL0CFG (*(volatile unsigned long *)0xF3000004) +#define PLL1CFG (*(volatile unsigned long *)0xF3000008) +#define CLKDIVC (*(volatile unsigned long *)0xF300000C) +#define CLKDIVC1 (*(volatile unsigned long *)0xF3000010) +#define MODECTR (*(volatile unsigned long *)0xF3000014) +#define BCLKCTR (*(volatile unsigned long *)0xF3000018) +#define SWRESET (*(volatile unsigned long *)0xF300001C) +#define PCLKCFG0 (*(volatile unsigned long *)0xF3000020) +#define PCLKCFG1 (*(volatile unsigned long *)0xF3000024) +#define PCLKCFG2 (*(volatile unsigned long *)0xF3000028) +#define PCLKCFG3 (*(volatile unsigned long *)0xF300002C) +#define PCLK_LCD (*(volatile unsigned long *)0xF3000030) +#define PCLKCFG5 (*(volatile unsigned long *)0xF3000034) +#define PCLKCFG6 (*(volatile unsigned long *)0xF3000038) +#define PCLKCFG7 (*(volatile unsigned long *)0xF300003C) +#define PCLKCFG8 (*(volatile unsigned long *)0xF3000040) +#define PCLK_TCT (*(volatile unsigned long *)0xF3000044) +#define PCLKCFG10 (*(volatile unsigned long *)0xF3000048) +#define PCLKCFG11 (*(volatile unsigned long *)0xF300004C) +#define PCLK_ADC (*(volatile unsigned long *)0xF3000050) +#define PCLKCFG13 (*(volatile unsigned long *)0xF3000054) +#define PCLKCFG14 (*(volatile unsigned long *)0xF3000058) +#define PCLK_RFREQ (*(volatile unsigned long *)0xF300005C) +#define PCLKCFG16 (*(volatile unsigned long *)0xF3000060) +#define PCLKCFG17 (*(volatile unsigned long *)0xF3000064) + +#define PCK_EN (1<<28) + +#define CKSEL_PLL0 0 +#define CKSEL_PLL1 1 +#define CKSEL_XIN 4 + +/* IRQ Controller */ + +#define IEN (*(volatile unsigned long *)0xF3001000) +#define CREQ (*(volatile unsigned long *)0xF3001004) +#define IRQSEL (*(volatile unsigned long *)0xF300100C) +#define MREQ (*(volatile unsigned long *)0xF3001014) +#define MIRQ (*(volatile unsigned long *)0xF3001028) +#define MFIQ (*(volatile unsigned long *)0xF300102C) +#define ALLMASK (*(volatile unsigned long *)0xF3001044) +#define VAIRQ (*(volatile unsigned long *)0xF3001080) +#define VAFIQ (*(volatile unsigned long *)0xF3001084) +#define VNIRQ (*(volatile unsigned long *)0xF3001088) +#define VNFIQ (*(volatile unsigned long *)0xF300108C) + +#define TIMER_IRQ_MASK (1<<6) + +/* Timer / Counters */ + +#define TCFG0 (*(volatile unsigned long *)0xF3003000) +#define TCNT0 (*(volatile unsigned long *)0xF3003004) +#define TREF0 (*(volatile unsigned long *)0xF3003008) +#define TCFG1 (*(volatile unsigned long *)0xF3003010) +#define TCNT1 (*(volatile unsigned long *)0xF3003014) +#define TREF1 (*(volatile unsigned long *)0xF3003018) + +#define TIREQ (*(volatile unsigned long *)0xF3003060) +/* ref. value reached */ +#define TF0 (1<<8) +#define TF1 (1<<9) +/* irq. status */ +#define TI0 (1<<0) +#define TI1 (1<<1) + +#define TC32EN (*(volatile unsigned long *)0xF3003080) +#define TC32LDV (*(volatile unsigned long *)0xF3003084) +#define TC32MCNT (*(volatile unsigned long *)0xF3003094) +#define TC32IRQ (*(volatile unsigned long *)0xF3003098) + +/* ADC */ + +#define ADCCON (*(volatile unsigned long *)0xF3004000) +#define ADCDATA (*(volatile unsigned long *)0xF3004004) +#define ADCCONA (*(volatile unsigned long *)0xF3004080) +#define ADCSTATUS (*(volatile unsigned long *)0xF3004084) +#define ADCCFG (*(volatile unsigned long *)0xF3004088) + +/* Memory Controller */ + +#define SDCFG (*(volatile unsigned long *)0xF1000000) +#define SDFSM (*(volatile unsigned long *)0xF1000004) +#define MCFG (*(volatile unsigned long *)0xF1000008) +#define CSCFG0 (*(volatile unsigned long *)0xF1000010) +#define CSCFG1 (*(volatile unsigned long *)0xF1000014) +#define CSCFG2 (*(volatile unsigned long *)0xF1000018) +#define CSCFG3 (*(volatile unsigned long *)0xF100001C) +#define CLKCFG (*(volatile unsigned long *)0xF1000020) +#define SDCMD (*(volatile unsigned long *)0xF1000024) + +#define SDCFG1 (*(volatile unsigned long *)0xF1001000) +#define MCFG1 (*(volatile unsigned long *)0xF1001008) + +/* Misc */ + +#define ECFG0 (*(volatile unsigned long *)0xF300500C) +#define MBCFG (*(volatile unsigned long *)0xF3005020) + +#define TCC780_VER (*(volatile unsigned long *)0xE0001FFC) + +#endif diff --git a/firmware/export/timer.h b/firmware/export/timer.h index f4df8d5..21995ef 100644 --- a/firmware/export/timer.h +++ b/firmware/export/timer.h @@ -31,7 +31,7 @@ #define TIMER_FREQ (CPU_FREQ/2) #elif CONFIG_CPU == PNX0101 #define TIMER_FREQ 3000000 -#elif CONFIG_CPU == S3C2440 || CONFIG_CPU == DM320 +#elif CONFIG_CPU == S3C2440 || CONFIG_CPU == DM320 || CONFIG_CPU == TCC7801 #include "timer-target.h" #elif defined(SIMULATOR) #define TIMER_FREQ 1000000 diff --git a/firmware/export/wm8985.h b/firmware/export/wm8985.h new file mode 100644 index 0000000..9ae5515 --- /dev/null +++ b/firmware/export/wm8985.h @@ -0,0 +1,43 @@ +/*************************************************************************** + * __________ __ ___. + * Open \______ \ ____ ____ | | _\_ |__ _______ ___ + * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / + * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < + * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ + * \/ \/ \/ \/ \/ + * $Id$ + * + * Copyright (C) 2005 by Dave Chapman + * + * All files in this archive are subject to the GNU General Public License. + * See the file COPYING in the source tree root for full license agreement. + * + * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY + * KIND, either express or implied. + * + ****************************************************************************/ + +#ifndef _WM8985_H +#define _WM8985_H + +/* volume/balance/treble/bass interdependency */ +#define VOLUME_MIN -730 +#define VOLUME_MAX 60 + +extern int tenthdb2master(int db); + +extern void audiohw_enable_output(bool enable); +extern int audiohw_set_master_vol(int vol_l, int vol_r); +extern int audiohw_set_lineout_vol(int vol_l, int vol_r); +extern void audiohw_set_bass(int value); +extern void audiohw_set_treble(int value); +extern void audiohw_set_nsorder(int order); +extern void audiohw_set_sample_rate(int sampling_control); + +/* Register addresses */ +// .. tbc + +/* Register settings for the supported samplerates: */ +// .. tbc + +#endif /* _WM8985_H */ |