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| author | Michael Sevakis <jethead71@rockbox.org> | 2008-04-13 20:03:08 +0000 |
|---|---|---|
| committer | Michael Sevakis <jethead71@rockbox.org> | 2008-04-13 20:03:08 +0000 |
| commit | b12c69bac7a02ea161ebc02ce7323e82bebe7b23 (patch) | |
| tree | d1d827c2e91e7591cb0d661ea0b20c26f0a21d2d /firmware/export | |
| parent | 73d1eb4ac06809b64a0545bae22f7e436d3c8b70 (diff) | |
| download | rockbox-b12c69bac7a02ea161ebc02ce7323e82bebe7b23.zip rockbox-b12c69bac7a02ea161ebc02ce7323e82bebe7b23.tar.gz rockbox-b12c69bac7a02ea161ebc02ce7323e82bebe7b23.tar.bz2 rockbox-b12c69bac7a02ea161ebc02ce7323e82bebe7b23.tar.xz | |
ADC driver for Gigabeat S - a bit on the general side for now. Needs to have scales set properly (what physical value a reading represents isn't clear from the docs or I'm just lazy atm). Throw-in a _bunch_ more reg defines for the PMIC. Show all 16 raw channels values in debug menu.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17100 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/export')
| -rw-r--r-- | firmware/export/mc13783.h | 170 |
1 files changed, 167 insertions, 3 deletions
diff --git a/firmware/export/mc13783.h b/firmware/export/mc13783.h index a489f4c..bde1dc4 100644 --- a/firmware/export/mc13783.h +++ b/firmware/export/mc13783.h @@ -89,19 +89,183 @@ enum mc13783_regs_enum }; /* INTERRUPT_STATUS0, INTERRUPT_MASK0, INTERRUPT_SENSE0 */ +#define MC13783_ADCDONE (1 << 0) /* x */ +#define MC13783_ADCBISDONE (1 << 1) /* x */ +#define MC13783_TS (1 << 2) /* x */ +#define MC13783_WHIGH (1 << 3) /* x */ +#define MC13783_WLOW (1 << 4) /* x */ #define MC13783_CHGDET (1 << 6) +#define MC13783_CHGOV (1 << 7) +#define MC13783_CHGREV (1 << 8) +#define MC13783_CHGSHORT (1 << 9) +#define MC13783_CCCV (1 << 10) +#define MC13783_CHGCURR (1 << 11) +#define MC13783_BPONI (1 << 12) +#define MC13783_LOBATL (1 << 13) +#define MC13783_LOBATH (1 << 14) +#define MC13783_UDP (1 << 15) +#define MC13783_USB (1 << 16) +#define MC13783_ID (1 << 19) +#define MC13783_SE1 (1 << 21) +#define MC13783_CKDET (1 << 22) +#define MC13783_UDM (1 << 23) +/* x = no sense bit */ /* INTERRUPT_STATUS1, INTERRUPT_MASK1, INTERRUPT_SENSE1 */ -#define MC13783_HSL (1 << 0) -#define MC13783_ON1B (1 << 3) -#define MC13783_ON2B (1 << 4) +#define MC13783_1HZ (1 << 0) /* x */ +#define MC13783_TODA (1 << 1) /* x */ +#define MC13783_ONOFD1 (1 << 3) /* ON1B */ +#define MC13783_ONOFD2 (1 << 4) /* ON2B */ +#define MC13783_ONOFD3 (1 << 5) /* ON3B */ +#define MC13783_SYSRST (1 << 6) /* x */ +#define MC13783_RTCRST (1 << 7) /* x */ +#define MC13783_PCI (1 << 8) /* x */ +#define MC13783_WARM (1 << 9) /* x */ +#define MC13783_MEMHLD (1 << 10) /* x */ +#define MC13783_PWRRDY (1 << 11) +#define MC13783_THWARNL (1 << 12) +#define MC13783_THWARNH (1 << 13) +#define MC13783_CLK (1 << 14) +#define MC13783_SEMAF (1 << 15) /* x */ +#define MC13783_MC2B (1 << 17) +#define MC13783_HSDET (1 << 18) +#define MC13783_HSL (1 << 19) +#define MC13783_ALSPTH (1 << 20) +#define MC13783_AHSSHORT (1 << 21) +/* x = no sense bit */ + +/* POWER_UP_MODE_SENSE */ + +#define MC13783_ICTESTS (1 << 0) +#define MC13783_CLKSELS (1 << 1) +#define MC13783_PUMS1Sr(r) (((r) >> 2) & 0x3) +#define MC13783_PUMS2S (((r) >> 4) & 0x3) +#define MC13783_PUMS3S (((r) >> 6) & 0x3) + #define PUMS_LOW 0x0 + #define PUMS_OPEN 0x1 + #define PUMS_HIGH 0x2 +#define MC13783_CHRGMOD0Sr(r) (((r) >> 8) & 0x3) +#define MC13783_CHRGMOD1Sr(r) (((r) >> 10) & 0x3) + #define CHRGMOD_LOW 0x0 + #define CHRGMOD_OPEN 0x1 + #define CHRGMOD_HIGH 0x3 +#define MC13783_UMODSr(r) (((r) >> 12) & 0x3) + #define UMODS0_LOW_UMODS1_LOW 0x0 + #define UMODS0_OPEN_UMODS1_LOW 0x1 + #define UMODS0_DONTCARE_UMODS1_HIGH 0x2 + #define UMODS0_HIGH_UMODS1_LOW 0x3 +#define MC13783_USBEN (1 << 14) +#define MC13783_SW1ABS (1 << 15) +#define MC13783_SW2ABS (1 << 16) + +/* IDENTIFICATION */ +/* SEMAPHORE */ +/* ARBITRATION_PERIPHERAL_AUDIO */ +/* ARBITRATION_SWITCHERS */ +/* ARBITRATION_REGULATORS0 */ +/* ARBITRATION_REGULATORS1 */ /* POWER_CONTROL0 */ #define MC13783_USEROFFSPI (1 << 3) +/* POWER_CONTROL1 */ +/* POWER_CONTROL2 */ +/* REGEN_ASSIGNMENT */ +/* MEMORYA */ +/* MEMORYB */ +/* RTC_TIME */ +/* RTC_ALARM */ +/* RTC_DAY */ +/* RTC_DAY_ALARM */ +/* SWITCHERS0 */ +/* SWITCHERS1 */ +/* SWITCHERS2 */ +/* SWITCHERS3 */ +/* SWITCHERS4 */ +/* SWITCHERS5 */ +/* REGULATOR_SETTING0 */ +/* REGULATOR_SETTING1 */ +/* REGULATOR_MODE0 */ +/* REGULATOR_MODE1 */ +/* POWER_MISCELLANEOUS */ +/* AUDIO_RX0 */ +/* AUDIO_RX1 */ +/* AUDIO_TX */ +/* SSI_NETWORK */ +/* AUDIO_CODEC */ +/* AUDIO_STEREO_CODEC */ + +/* ADC0 */ +#define MC13783_LICELLCON (1 << 0) +#define MC13783_CHRGICON (1 << 1) +#define MC13783_BATICON (1 << 2) +#define MC13783_RTHEN (1 << 3) +#define MC13783_DTHEN (1 << 4) +#define MC13783_UIDEN (1 << 5) +#define MC13783_ADOUTEN (1 << 6) +#define MC13783_ADOUTPER (1 << 7) +#define MC13783_ADREFEN (1 << 10) +#define MC13783_ADREFMODE (1 << 11) +#define MC13783_TSMODw(w) ((w) << 12) +#define MC13783_TSMODr(r) (((r) >> 12) & 0x3) +#define MC13783_CHRGRAWDIV (1 << 15) +#define MC13783_ADINC1 (1 << 16) +#define MC13783_ADINC2 (1 << 17) +#define MC13783_WCOMP (1 << 18) +#define MC13783_ADCBIS0 (1 << 23) + +/* ADC1 */ +#define MC13783_ADEN (1 << 0) +#define MC13783_RAND (1 << 1) +#define MC13783_ADSEL (1 << 3) +#define MC13783_TRIGMASK (1 << 4) +#define MC13783_ADA1w(w) ((w) << 5) +#define MC13783_ADA1r(r) (((r) >> 5) & 0x3) +#define MC13783_ADA2w(w) ((w) << 8) +#define MC13783_ADA2r(r) (((r) >> 8) & 0x3) +#define MC13783_ATOw(w) ((w) << 11) +#define MC13783_ATOr(r) (((r) >> 11) & 0xff) +#define MC13783_ATOX (1 << 19) +#define MC13783_ASC (1 << 20) +#define MC13783_ADTRIGIGN (1 << 21) +#define MC13783_ADONESHOT (1 << 22) +#define MC13783_ADCBIS1 (1 << 23) + +/* ADC2 */ +#define MC13783_ADD1r(r) (((r) >> 2) & 0x3ff) +#define MC13783_ADD2r(r) (((r) >> 14) & 0x3ff) + +/* ADC3 */ +#define MC13783_WHIGHw(w) ((w) << 0) +#define MC13783_WHIGHr(r) ((r) & 0x3f) +#define MC13783_ICIDr(r) (((r) >> 6) & 0x3) +#define MC13783_WLOWw(w) ((w) << 9) +#define MC13783_WLOWr(r) (((r) >> 9) & 0x3f) +#define MC13783_ADCBIS2 (1 << 23) + +/* ADC4 */ +#define MC13783_ADCBIS1r(r) (((r) >> 2) & 0x3ff) +#define MC13783_ADCBIS2r(r) (((r) >> 14) & 0x3ff) + +/* CHARGER */ +/* USB0 */ +/* CHARGER_USB1 */ + /* LED_CONTROL0 */ #define MC13783_LEDEN (1 << 0) +/* LED_CONTROL1 */ +/* LED_CONTROL2 */ +/* LED_CONTROL3 */ +/* LED_CONTROL4 */ +/* LED_CONTROL5 */ +/* TRIM0 */ +/* TRIM1 */ +/* TEST0 */ +/* TEST1 */ +/* TEST2 */ +/* TEST3 */ + void mc13783_init(void); uint32_t mc13783_set(unsigned address, uint32_t bits); uint32_t mc13783_clear(unsigned address, uint32_t bits); |