Ooops. The TMR reset must only be done when starting the timer.

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@10744 a1c6a512-1295-4272-9138-f99709370657

1 files changed, 5 insertions, 4 deletions

diff --git a/firmware/timer.c b/firmware/timer.c
index fb1a7ff..6513d80 100644
--- a/firmware/timer.c
+++ b/firmware/timer.c
@@ -131,12 +131,13 @@ static bool timer_set(long cycles, bool start)
             pfn_unregister = NULL;
         }
         phi &= ~1;       /* timer disabled at start */
+
+        /* If it is already enabled, writing a 0 to the RST bit will clear
+           the register, so we clear RST explicitly before writing the real
+           data. */
+        TMR1 = 0;
     }
 
-    /* If it is already enabled, writing a 0 to the RST bit will clear the
-       register, so we clear RST explicitly before writing the real data. */
-    TMR1 = 0;
-    
     /* We are using timer 1 */
     TMR1 = 0x0018 | (unsigned short)phi | ((unsigned short)(prescale - 1) << 8);
     TRR1 = (unsigned short)(cycles - 1);