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-rwxr-xr-xbootloader/mrobe500.c37
-rw-r--r--firmware/export/dm320.h128
-rw-r--r--firmware/target/arm/olympus/mrobe-500/ata-mr500.c4
-rw-r--r--firmware/target/arm/olympus/mrobe-500/button-mr500.c4
-rwxr-xr-xfirmware/target/arm/olympus/mrobe-500/crt0.S2
-rw-r--r--firmware/target/arm/olympus/mrobe-500/kernel-mr500.c14
-rw-r--r--firmware/target/arm/olympus/mrobe-500/spi-mr500.c6
-rw-r--r--firmware/target/arm/olympus/mrobe-500/system-mr500.c32
-rw-r--r--firmware/target/arm/olympus/mrobe-500/timer-target.h2
-rw-r--r--firmware/target/arm/olympus/mrobe-500/uart-mr500.c36
10 files changed, 134 insertions, 131 deletions
diff --git a/bootloader/mrobe500.c b/bootloader/mrobe500.c
index 236fd99..57df653 100755
--- a/bootloader/mrobe500.c
+++ b/bootloader/mrobe500.c
@@ -46,19 +46,20 @@ extern int line;
void main(void)
{
-/* unsigned char* loadbuffer;
+ unsigned char* loadbuffer;
int buffer_size;
int rc;
int(*kernel_entry)(void);
-*/
+
power_init();
+ lcd_init();
system_init();
kernel_init();
adc_init();
button_init();
backlight_init();
uartSetup();
- lcd_init();
+
font_init();
spi_init();
@@ -73,7 +74,6 @@ void main(void)
usb_init();
- #if 0
/* Enter USB mode without USB thread */
if(usb_detect())
{
@@ -99,18 +99,25 @@ void main(void)
reset_screen();
lcd_update();
}
- #endif
- printf("ATA");
-
- outw(inw(IO_GIO_DIR1)&~(1<<10), IO_GIO_DIR1); // set GIO26 (reset pin) to output
+ int button=0, *address=0x0, count=0;
while(true)
{
- if (button_read_device() == BUTTON_POWER)
+ button = button_read_device();
+ if (button == BUTTON_POWER)
{
printf("reset");
- outw(1<<10, IO_GIO_BITSET1);
+ IO_GIO_BITSET1|=1<<10;
}
+ if(button==BUTTON_RC_PLAY)
+ address+=0x02;
+ else if (button==BUTTON_RC_DOWN)
+ address-=0x02;
+ else if (button==BUTTON_RC_FF)
+ address+=0x1000;
+ else if (button==BUTTON_RC_REW)
+ address-=0x1000;
+
// if ((inw(IO_GIO_BITSET0)&(1<<14)) == 0)
{
short x,y,z1,z2, reg;
@@ -118,12 +125,15 @@ void main(void)
printf("x: %04x y: %04x z1: %04x z2: %04x", x, y, z1, z2);
printf("tsadc: %4x", tsc2100_readreg(TSADC_PAGE, TSADC_ADDRESS)&0xffff);
printf("current tick: %04x", current_tick);
+ printf("Address: 0x%08x Data: 0x%08x", address, *address);
+ printf("Address: 0x%08x Data: 0x%08x", address+1, *(address+1));
+ printf("Address: 0x%08x Data: 0x%08x", address+2, *(address+2));
tsc2100_keyclick(); /* doesnt work :( */
- line -= 3;
+ line -= 6;
}
-
}
-#if 0
+
+ printf("ATA");
rc = ata_init();
if(rc)
{
@@ -155,5 +165,4 @@ void main(void)
kernel_entry = (void*) loadbuffer;
rc = kernel_entry();
}
-#endif
}
diff --git a/firmware/export/dm320.h b/firmware/export/dm320.h
index 70992b7..93f2f3a 100644
--- a/firmware/export/dm320.h
+++ b/firmware/export/dm320.h
@@ -75,21 +75,21 @@
#define IO_SERIAL1_MODE DM320_REG(0x0286)
/* UART 0/1 */
-#define IO_UART0_DTRR 0x0300
-#define IO_UART0_BRSR 0x0302
-#define IO_UART0_MSR 0x0304
-#define IO_UART0_RFCR 0x0306
-#define IO_UART0_TFCR 0x0308
-#define IO_UART0_LCR 0x030A
-#define IO_UART0_SR 0x030C
-
-#define IO_UART1_DTRR 0x0380
-#define IO_UART1_BRSR 0x0382
-#define IO_UART1_MSR 0x0384
-#define IO_UART1_RFCR 0x0386
-#define IO_UART1_TFCR 0x0388
-#define IO_UART1_LCR 0x038A
-#define IO_UART1_SR 0x038C
+#define IO_UART0_DTRR DM320_REG(0x0300)
+#define IO_UART0_BRSR DM320_REG(0x0302)
+#define IO_UART0_MSR DM320_REG(0x0304)
+#define IO_UART0_RFCR DM320_REG(0x0306)
+#define IO_UART0_TFCR DM320_REG(0x0308)
+#define IO_UART0_LCR DM320_REG(0x030A)
+#define IO_UART0_SR DM320_REG(0x030C)
+
+#define IO_UART1_DTRR DM320_REG(0x0380)
+#define IO_UART1_BRSR DM320_REG(0x0382)
+#define IO_UART1_MSR DM320_REG(0x0384)
+#define IO_UART1_RFCR DM320_REG(0x0386)
+#define IO_UART1_TFCR DM320_REG(0x0388)
+#define IO_UART1_LCR DM320_REG(0x038A)
+#define IO_UART1_SR DM320_REG(0x038C)
/* Watchdog Timer */
#define IO_WATCHDOG_MODE 0x0400
@@ -168,55 +168,55 @@
#define IO_INTC_ENTRY_TBA0 DM320_REG(0x0538)
#define IO_INTC_ENTRY_TBA1 DM320_REG(0x053A)
#define IO_INTC_PRIORITY0 DM320_REG(0x0540)
-#define IO_INTC_PRIORITY1 0x0542
-#define IO_INTC_PRIORITY2 0x0544
-#define IO_INTC_PRIORITY3 0x0546
-#define IO_INTC_PRIORITY4 0x0548
-#define IO_INTC_PRIORITY5 0x054A
-#define IO_INTC_PRIORITY6 0x054C
-#define IO_INTC_PRIORITY7 0x054E
-#define IO_INTC_PRIORITY8 0x0550
-#define IO_INTC_PRIORITY9 0x0552
-#define IO_INTC_PRIORITY10 0x0554
-#define IO_INTC_PRIORITY11 0x0556
-#define IO_INTC_PRIORITY12 0x0558
-#define IO_INTC_PRIORITY13 0x055A
-#define IO_INTC_PRIORITY14 0x055C
-#define IO_INTC_PRIORITY15 0x055E
-#define IO_INTC_PRIORITY16 0x0560
-#define IO_INTC_PRIORITY17 0x0562
-#define IO_INTC_PRIORITY18 0x0564
-#define IO_INTC_PRIORITY19 0x0566
-#define IO_INTC_PRIORITY20 0x0568
-#define IO_INTC_PRIORITY21 0x056A
-#define IO_INTC_PRIORITY22 0x056C
+#define IO_INTC_PRIORITY1 DM320_REG(0x0542)
+#define IO_INTC_PRIORITY2 DM320_REG(0x0544)
+#define IO_INTC_PRIORITY3 DM320_REG(0x0546)
+#define IO_INTC_PRIORITY4 DM320_REG(0x0548)
+#define IO_INTC_PRIORITY5 DM320_REG(0x054A)
+#define IO_INTC_PRIORITY6 DM320_REG(0x054C)
+#define IO_INTC_PRIORITY7 DM320_REG(0x054E)
+#define IO_INTC_PRIORITY8 DM320_REG(0x0550)
+#define IO_INTC_PRIORITY9 DM320_REG(0x0552)
+#define IO_INTC_PRIORITY10 DM320_REG(0x0554)
+#define IO_INTC_PRIORITY11 DM320_REG(0x0556)
+#define IO_INTC_PRIORITY12 DM320_REG(0x0558)
+#define IO_INTC_PRIORITY13 DM320_REG(0x055A)
+#define IO_INTC_PRIORITY14 DM320_REG(0x055C)
+#define IO_INTC_PRIORITY15 DM320_REG(0x055E)
+#define IO_INTC_PRIORITY16 DM320_REG(0x0560)
+#define IO_INTC_PRIORITY17 DM320_REG(0x0562)
+#define IO_INTC_PRIORITY18 DM320_REG(0x0564)
+#define IO_INTC_PRIORITY19 DM320_REG(0x0566)
+#define IO_INTC_PRIORITY20 DM320_REG(0x0568)
+#define IO_INTC_PRIORITY21 DM320_REG(0x056A)
+#define IO_INTC_PRIORITY22 DM320_REG(0x056C)
/* GIO Controller */
-#define IO_GIO_DIR0 0x0580
-#define IO_GIO_DIR1 0x0582
-#define IO_GIO_DIR2 0x0584
-#define IO_GIO_INV0 0x0586
-#define IO_GIO_INV1 0x0588
-#define IO_GIO_INV2 0x058A
-#define IO_GIO_BITSET0 0x058C
-#define IO_GIO_BITSET1 0x058E
-#define IO_GIO_BITSET2 0x0590
-#define IO_GIO_BITCLR0 0x0592
-#define IO_GIO_BITCLR1 0x0594
-#define IO_GIO_BITCLR2 0x0596
-#define IO_GIO_IRQPORT 0x0598
-#define IO_GIO_IRQEDGE 0x059A
-#define IO_GIO_CHAT0 0x059C
-#define IO_GIO_CHAT1 0x059E
-#define IO_GIO_CHAT2 0x05A0
-#define IO_GIO_NCHAT 0x05A2
-#define IO_GIO_FSEL0 0x05A4
-#define IO_GIO_FSEL1 0x05A6
-#define IO_GIO_FSEL2 0x05A8
-#define IO_GIO_FSEL3 0x05AA
-#define IO_GIO_FSEL4 0x05AC
-#define IO_GIO_CARD_SET 0x05AE
-#define IO_GIO_CARD_ST 0x05B0
+#define IO_GIO_DIR0 DM320_REG(0x0580)
+#define IO_GIO_DIR1 DM320_REG(0x0582)
+#define IO_GIO_DIR2 DM320_REG(0x0584)
+#define IO_GIO_INV0 DM320_REG(0x0586)
+#define IO_GIO_INV1 DM320_REG(0x0588)
+#define IO_GIO_INV2 DM320_REG(0x058A)
+#define IO_GIO_BITSET0 DM320_REG(0x058C)
+#define IO_GIO_BITSET1 DM320_REG(0x058E)
+#define IO_GIO_BITSET2 DM320_REG(0x0590)
+#define IO_GIO_BITCLR0 DM320_REG(0x0592)
+#define IO_GIO_BITCLR1 DM320_REG(0x0594)
+#define IO_GIO_BITCLR2 DM320_REG(0x0596)
+#define IO_GIO_IRQPORT DM320_REG(0x0598)
+#define IO_GIO_IRQEDGE DM320_REG(0x059A)
+#define IO_GIO_CHAT0 DM320_REG(0x059C)
+#define IO_GIO_CHAT1 DM320_REG(0x059E)
+#define IO_GIO_CHAT2 DM320_REG(0x05A0)
+#define IO_GIO_NCHAT DM320_REG(0x05A2)
+#define IO_GIO_FSEL0 DM320_REG(0x05A4)
+#define IO_GIO_FSEL1 DM320_REG(0x05A6)
+#define IO_GIO_FSEL2 DM320_REG(0x05A8)
+#define IO_GIO_FSEL3 DM320_REG(0x05AA)
+#define IO_GIO_FSEL4 DM320_REG(0x05AC)
+#define IO_GIO_CARD_SET DM320_REG(0x05AE)
+#define IO_GIO_CARD_ST DM320_REG(0x05B0)
/* DSP Controller */
#define IO_DSPC_HPIB_CONTROL 0x0600
@@ -707,10 +707,6 @@
* Copyright (C) 1999 ARM Limited
*/
-#define CONFIG_TIMER1_TMPRSCL 0x000A
-#define CLOCK_TICK_RATE (CPUFREQ_MAX / CONFIG_TIMER1_TMPRSCL)
-#define CONFIG_TIMER1_TMDIV (unsigned short)(CLOCK_TICK_RATE / HZ)
-
#define CONFIG_TIMER0_TMMD_STOP 0x0000
#define CONFIG_TIMER0_TMMD_ONE_SHOT 0x0001
#define CONFIG_TIMER0_TMMD_FREE_RUN 0x0002
diff --git a/firmware/target/arm/olympus/mrobe-500/ata-mr500.c b/firmware/target/arm/olympus/mrobe-500/ata-mr500.c
index 171097f..2b01819 100644
--- a/firmware/target/arm/olympus/mrobe-500/ata-mr500.c
+++ b/firmware/target/arm/olympus/mrobe-500/ata-mr500.c
@@ -62,6 +62,10 @@ void ata_device_init(void)
{
/* ATA reset */
ATA_RESET_DISABLE; /* Set the pin to disable an active low reset */
+
+ /* set GIO17 (ATA power) on and output */
+ IO_GIO_BITSET1&=~(1<<1);
+ IO_GIO_DIR1&=~(1<<1);
}
#if !defined(BOOTLOADER)
diff --git a/firmware/target/arm/olympus/mrobe-500/button-mr500.c b/firmware/target/arm/olympus/mrobe-500/button-mr500.c
index 87ab80a..7410875 100644
--- a/firmware/target/arm/olympus/mrobe-500/button-mr500.c
+++ b/firmware/target/arm/olympus/mrobe-500/button-mr500.c
@@ -37,7 +37,7 @@
void button_init_device(void)
{
/* GIO is the power button, set as input */
- outw(inw(IO_GIO_DIR0)|0x01, IO_GIO_DIR0);
+ IO_GIO_DIR0|=0x01;
}
inline bool button_hold(void)
@@ -52,7 +52,7 @@ int button_read_device(void)
int i = 0;
int btn = BUTTON_NONE, timeout = BUTTON_TIMEOUT;
- if ((inw(IO_GIO_BITSET0)&0x01) == 0)
+ if ((IO_GIO_BITSET0&0x01) == 0)
btn |= BUTTON_POWER;
uartHeartbeat();
diff --git a/firmware/target/arm/olympus/mrobe-500/crt0.S b/firmware/target/arm/olympus/mrobe-500/crt0.S
index 672e917..a7c1131 100755
--- a/firmware/target/arm/olympus/mrobe-500/crt0.S
+++ b/firmware/target/arm/olympus/mrobe-500/crt0.S
@@ -102,7 +102,7 @@ start:
ldr sp, =irq_stack
msr cpsr_c, #0xdb
ldr sp, =irq_stack
- /* Switch to supervisor mode */
+ /* Switch to supervisor mode (no IRQ) */
msr cpsr_c, #0xd3
ldr sp, =stackend
diff --git a/firmware/target/arm/olympus/mrobe-500/kernel-mr500.c b/firmware/target/arm/olympus/mrobe-500/kernel-mr500.c
index 3ac0730..487bc2d 100644
--- a/firmware/target/arm/olympus/mrobe-500/kernel-mr500.c
+++ b/firmware/target/arm/olympus/mrobe-500/kernel-mr500.c
@@ -29,20 +29,22 @@ void tick_start(unsigned int interval_in_ms)
{
IO_TIMER1_TMMD = CONFIG_TIMER1_TMMD_STOP;
- /* Setup the Prescalar */
- IO_TIMER1_TMPRSCL = CONFIG_TIMER1_TMPRSCL;
+ /* Setup the Prescalar (Divide by 10)
+ * Based on linux/include/asm-arm/arch-integrator/timex.h
+ */
+ IO_TIMER1_TMPRSCL = 0x000A;
/* Setup the Divisor */
- IO_TIMER1_TMDIV = CONFIG_TIMER1_TMDIV;
-
+ IO_TIMER1_TMDIV = (TIMER_FREQ / (10*1000))*interval_in_ms;
+
/* Turn Timer1 to Free Run mode */
IO_TIMER1_TMMD = CONFIG_TIMER1_TMMD_FREE_RUN;
-
+
/* Enable the interrupt */
IO_INTC_EINT0 |= 1<<IRQ_TIMER1;
}
-void TIMER4(void)
+void TIMER1(void)
{
int i;
diff --git a/firmware/target/arm/olympus/mrobe-500/spi-mr500.c b/firmware/target/arm/olympus/mrobe-500/spi-mr500.c
index 8aeecd9..c47ab8f 100644
--- a/firmware/target/arm/olympus/mrobe-500/spi-mr500.c
+++ b/firmware/target/arm/olympus/mrobe-500/spi-mr500.c
@@ -28,8 +28,8 @@
#include "system.h"
#define GIO_TS_ENABLE (1<<2)
-#define clr_gio_enable() outw(GIO_TS_ENABLE, IO_GIO_BITSET1)
-#define set_gio_enable() outw(GIO_TS_ENABLE, IO_GIO_BITCLR1)
+#define clr_gio_enable() IO_GIO_BITSET1=GIO_TS_ENABLE
+#define set_gio_enable() IO_GIO_BITCLR1=GIO_TS_ENABLE
int spi_block_transfer(const uint8_t *tx_bytes, unsigned int tx_size,
uint8_t *rx_bytes, unsigned int rx_size)
@@ -72,6 +72,6 @@ void spi_init(void)
IO_SERIAL0_TX_ENABLE = 0x0001;
/* Set GIO 18 to output for touch screen slave enable */
- outw(inw(IO_GIO_DIR1)&~GIO_TS_ENABLE, IO_GIO_DIR1);
+ IO_GIO_DIR1&=~GIO_TS_ENABLE;
clr_gio_enable();
}
diff --git a/firmware/target/arm/olympus/mrobe-500/system-mr500.c b/firmware/target/arm/olympus/mrobe-500/system-mr500.c
index 5b52dc3..4fdfbd0 100644
--- a/firmware/target/arm/olympus/mrobe-500/system-mr500.c
+++ b/firmware/target/arm/olympus/mrobe-500/system-mr500.c
@@ -95,7 +95,7 @@ static const char * const irqname[] =
static void UIRQ(void)
{
- unsigned int offset = IO_INTC_IRQENTRY0;
+ unsigned int offset = (IO_INTC_IRQENTRY0>>2)-1;
panicf("Unhandled IRQ %02X: %s", offset, irqname[offset]);
}
@@ -105,18 +105,13 @@ void irq_handler(void)
/*
* Based on: linux/arch/arm/kernel/entry-armv.S and system-meg-fx.c
*/
- printf("INTERUPT!");
- asm volatile (
- "sub lr, lr, #4 \r\n"
- "stmfd sp!, {r0-r3, ip, lr} \r\n"
- "mov r0, #0x00030000 \r\n"
- "ldr r0, [r0, #0x518] \r\n"
- "ldr r1, =irqvector \r\n"
- "ldr r1, [r1, r0, lsl #2] \r\n"
- "mov lr, pc \r\n"
- "bx r1 \r\n"
- "ldmfd sp!, {r0-r3, ip, pc}^ \r\n"
- );
+
+ asm volatile( "stmfd sp!, {r0-r7, ip, lr} \n" /* Store context */
+ "sub sp, sp, #8 \n"); /* Reserve stack */
+ irqvector[(IO_INTC_IRQENTRY0>>2)-1]();
+ asm volatile( "add sp, sp, #8 \n" /* Cleanup stack */
+ "ldmfd sp!, {r0-r7, ip, lr} \n" /* Restore context */
+ "subs pc, lr, #4 \n"); /* Return from FIQ */
}
void fiq_handler(void) __attribute__((interrupt ("FIQ"), naked));
@@ -144,6 +139,11 @@ void system_reboot(void)
}
+void enable_interrupts (void)
+{
+ asm volatile ("msr cpsr_c, #0x13" );
+}
+
void system_init(void)
{
/* taken from linux/arch/arm/mach-itdm320-20/irq.c */
@@ -166,6 +166,12 @@ void system_init(void)
IO_INTC_FISEL0 = 0;
IO_INTC_FISEL1 = 0;
IO_INTC_FISEL2 = 0;
+
+ /* set GIO26 (reset pin) to output and low */
+ IO_GIO_BITSET1&=~(1<<10);
+ IO_GIO_DIR1&=~(1<<10);
+
+ enable_interrupts();
}
int system_memory_guard(int newmode)
diff --git a/firmware/target/arm/olympus/mrobe-500/timer-target.h b/firmware/target/arm/olympus/mrobe-500/timer-target.h
index 71cfa72..4abe75a 100644
--- a/firmware/target/arm/olympus/mrobe-500/timer-target.h
+++ b/firmware/target/arm/olympus/mrobe-500/timer-target.h
@@ -20,7 +20,7 @@
#define TIMER_TARGET_H
/* timer is based on PCLK and minimum division is 2 */
-#define TIMER_FREQ (49156800/2)
+#define TIMER_FREQ (27000000)
bool __timer_set(long cycles, bool set);
bool __timer_register(void);
diff --git a/firmware/target/arm/olympus/mrobe-500/uart-mr500.c b/firmware/target/arm/olympus/mrobe-500/uart-mr500.c
index f8208f8..99cf0f2 100644
--- a/firmware/target/arm/olympus/mrobe-500/uart-mr500.c
+++ b/firmware/target/arm/olympus/mrobe-500/uart-mr500.c
@@ -22,21 +22,7 @@
#include "system.h"
/* UART 0/1 */
-#define IO_UART0_DTRR 0x0300
-#define IO_UART0_BRSR 0x0302
-#define IO_UART0_MSR 0x0304
-#define IO_UART0_RFCR 0x0306
-#define IO_UART0_TFCR 0x0308
-#define IO_UART0_LCR 0x030A
-#define IO_UART0_SR 0x030C
-#define IO_UART1_DTRR 0x0380
-#define IO_UART1_BRSR 0x0382
-#define IO_UART1_MSR 0x0384
-#define IO_UART1_RFCR 0x0386
-#define IO_UART1_TFCR 0x0388
-#define IO_UART1_LCR 0x038A
-#define IO_UART1_SR 0x038C
#define CONFIG_UART_BRSR 87
void do_checksums(char *data, int len, char *xor, char *add)
@@ -53,16 +39,16 @@ void do_checksums(char *data, int len, char *xor, char *add)
void uartSetup(void) {
// 8-N-1
- outw(0x8000, IO_UART1_MSR);
- outw(CONFIG_UART_BRSR, IO_UART1_BRSR);
+ IO_UART1_MSR=0x8000;
+ IO_UART1_BRSR=CONFIG_UART_BRSR;
}
void uartPutc(char ch) {
// Wait for room in FIFO
- while ((inw(IO_UART1_TFCR) & 0x3f) >= 0x20);
+ while ((IO_UART1_TFCR & 0x3f) >= 0x20);
// Write character
- outw(ch, IO_UART1_DTRR);
+ IO_UART1_DTRR=ch;
}
// Unsigned integer to ASCII hexadecimal conversion
@@ -88,17 +74,17 @@ void uartGets(char *str, unsigned int size) {
char ch;
// Wait for FIFO to contain something
- while ((inw(IO_UART1_RFCR) & 0x3f) == 0);
+ while ((IO_UART1_RFCR & 0x3f) == 0);
// Read character
- ch = (char)inw(IO_UART1_DTRR);
+ ch = (char)IO_UART1_DTRR;
// Echo character back
- outw(ch, IO_UART1_DTRR);
+ IO_UART1_DTRR=ch;
// If CR, also echo LF, null-terminate, and return
if (ch == '\r') {
- outw('\n', IO_UART1_DTRR);
+ IO_UART1_DTRR='\n';
if (size) {
*str++ = '\0';
}
@@ -115,8 +101,8 @@ void uartGets(char *str, unsigned int size) {
int uartPollch(unsigned int ticks) {
while (ticks--) {
- if (inw(IO_UART1_RFCR) & 0x3f) {
- return inw(IO_UART1_DTRR) & 0xff;
+ if (IO_UART1_RFCR & 0x3f) {
+ return IO_UART1_DTRR & 0xff;
}
}
@@ -125,7 +111,7 @@ int uartPollch(unsigned int ticks) {
bool uartAvailable(void)
{
- return (inw(IO_UART1_RFCR) & 0x3f)?true:false;
+ return (IO_UART1_RFCR & 0x3f)?true:false;
}
void uartHeartbeat(void)
generated by cgit v1.1 at 2026-04-25 15:02:34 +0000