diff options
| -rw-r--r-- | firmware/target/arm/imx31/gigabeat-s/kernel-imx31.c | 4 | ||||
| -rw-r--r-- | firmware/target/arm/imx31/gigabeat-s/timer-imx31.c | 2 | ||||
| -rw-r--r-- | firmware/target/arm/imx31/gigabeat-s/wmcodec-imx31.c | 4 |
3 files changed, 5 insertions, 5 deletions
diff --git a/firmware/target/arm/imx31/gigabeat-s/kernel-imx31.c b/firmware/target/arm/imx31/gigabeat-s/kernel-imx31.c index 4ed3b30..775f5ce 100644 --- a/firmware/target/arm/imx31/gigabeat-s/kernel-imx31.c +++ b/firmware/target/arm/imx31/gigabeat-s/kernel-imx31.c @@ -53,8 +53,8 @@ void tick_start(unsigned int interval_in_ms) * Compare interrupt enabled, * Count from load value */ EPITCR1 = EPITCR_CLKSRC_IPG_CLK | EPITCR_WAITEN | EPITCR_IOVW | - (2640-1) << EPITCR_PRESCALER_POS | EPITCR_RLD | EPITCR_OCIEN | - EPITCR_ENMOD; + ((2640-1) << EPITCR_PRESCALER_POS) | EPITCR_RLD | + EPITCR_OCIEN | EPITCR_ENMOD; EPITLR1 = interval_in_ms*25; /* Count down from interval */ EPITCMPR1 = 0; /* Event when counter reaches 0 */ diff --git a/firmware/target/arm/imx31/gigabeat-s/timer-imx31.c b/firmware/target/arm/imx31/gigabeat-s/timer-imx31.c index 9de3a9e..d97743b 100644 --- a/firmware/target/arm/imx31/gigabeat-s/timer-imx31.c +++ b/firmware/target/arm/imx31/gigabeat-s/timer-imx31.c @@ -77,7 +77,7 @@ bool _timer_set(long cycles, bool start) * Reload from modulus register, * Count from load value */ EPITCR2 = EPITCR_CLKSRC_IPG_CLK | EPITCR_WAITEN | EPITCR_IOVW | - (1-1) << EPITCR_PRESCALER_POS | EPITCR_RLD | EPITCR_ENMOD; + ((1-1) << EPITCR_PRESCALER_POS) | EPITCR_RLD | EPITCR_ENMOD; EPITLR2 = cycles; /* Event when counter reaches 0 */ EPITCMPR2 = 0; diff --git a/firmware/target/arm/imx31/gigabeat-s/wmcodec-imx31.c b/firmware/target/arm/imx31/gigabeat-s/wmcodec-imx31.c index 2572b88..06bb4d6 100644 --- a/firmware/target/arm/imx31/gigabeat-s/wmcodec-imx31.c +++ b/firmware/target/arm/imx31/gigabeat-s/wmcodec-imx31.c @@ -55,8 +55,8 @@ void audiohw_init(void) imx31_regmod32(&CCM_PDR1, ((1-1) << CCM_PDR1_SSI1_PRE_PODF_POS) | ((5-1) << CCM_PDR1_SSI1_PODF_POS) | - ((8-1) << CCM_PDR1_SSI2_PRE_PODF_POS), - ((64-1) << CCM_PDR1_SSI2_PODF_POS) | + ((8-1) << CCM_PDR1_SSI2_PRE_PODF_POS) | + ((64-1) << CCM_PDR1_SSI2_PODF_POS), CCM_PDR1_SSI1_PODF | CCM_PDR1_SSI2_PODF | CCM_PDR1_SSI1_PRE_PODF | CCM_PDR1_SSI2_PRE_PODF); |