diff options
Diffstat (limited to 'firmware/system.c')
| -rw-r--r-- | firmware/system.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/firmware/system.c b/firmware/system.c index ec7feb7..87bec1b 100644 --- a/firmware/system.c +++ b/firmware/system.c @@ -600,7 +600,7 @@ void set_cpu_frequency(long frequency) /* Refresh timer for bypass frequency */ PLLCR &= ~1; /* Bypass mode */ timers_adjust_prescale(CPUFREQ_DEFAULT_MULT, false); - PLLCR = 0x11856005; + PLLCR = 0x11c56005; CSCR0 = 0x00001180; /* Flash: 4 wait states */ CSCR1 = 0x00000980; /* LCD: 2 wait states */ while(!(PLLCR & 0x80000000)) {}; /* Wait until the PLL has locked. @@ -617,7 +617,7 @@ void set_cpu_frequency(long frequency) /* Refresh timer for bypass frequency */ PLLCR &= ~1; /* Bypass mode */ timers_adjust_prescale(CPUFREQ_DEFAULT_MULT, false); - PLLCR = 0x1385e005; + PLLCR = 0x13c5e005; CSCR0 = 0x00000580; /* Flash: 1 wait state */ CSCR1 = 0x00000180; /* LCD: 0 wait states */ while(!(PLLCR & 0x80000000)) {}; /* Wait until the PLL has locked. @@ -633,7 +633,7 @@ void set_cpu_frequency(long frequency) /* Refresh timer for bypass frequency */ PLLCR &= ~1; /* Bypass mode */ timers_adjust_prescale(CPUFREQ_DEFAULT_MULT, true); - PLLCR = 0x10800200; /* Power down PLL, but keep CLSEL and CRSEL */ + PLLCR = 0x10c00200; /* Power down PLL, but keep CLSEL and CRSEL */ CSCR0 = 0x00000180; /* Flash: 0 wait states */ CSCR1 = 0x00000180; /* LCD: 0 wait states */ DCR = (0x8000 | DEFAULT_REFRESH_TIMER); /* Refresh timer */ |