| Commit message (Collapse) | Author | Age |
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Change-Id: Id7f4717d51ed02d67cb9f9cb3c0ada4a81843f97
Reviewed-on: http://gerrit.rockbox.org/137
Reviewed-by: Nils Wallménius <nils@rockbox.org>
Tested-by: Nils Wallménius <nils@rockbox.org>
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The existing ARCH Makefile variable is exported to the C code as well.
Additionally the version (arm-only for now) is detected as well. This
allows to for complete autodetection, i.e. that optimized ASM is picked up
if determined by preprocessor (CPU_ARM, etc).
Building a sim/raaa on a arm host will now automatically generate a arm
optmized build like we have for native targets.
Change-Id: I0b35393f8fb3ebd20beaa9e7371fa57bf3782107
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Centralize the selection of codec compilation flags to codec.make
to avoid having to duplicate the per cpu selection logic and the
build rule in the individual codec lib make files and make tweaking
easier.
The two special cases, libmad and libspeex were left alone.
I plan to introduce a var for arm generation so that appropriate flags
can be selected per generation as benchmarking results have shown that
different arm arches might have different optimal flags.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30330 a1c6a512-1295-4272-9138-f99709370657
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Some of these were found with http://www.samba.org/junkcode/#findstatic. Changes of note:
* The old MDCT has been removed.
* Makefile.test files that create test programs for libatrac, libcook, and libffmpegFLAC have been removed, as they don't work. My project will have a replacement that works with all codecs.
* I've tried not to remove anything useful. CLIP_TO_15 was removed from libtremor because there's another copy (also commented) in codeclib.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@29945 a1c6a512-1295-4272-9138-f99709370657
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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@29239 a1c6a512-1295-4272-9138-f99709370657
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Clip+. Problem and solution observed and checked on Gigabeat S by myself. Fix submitted by Mikhail Titov resolves it. range_decode_short was declared as returing 'int short' rather than 'unsigned short' resulting in unwanted sign extension.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@29208 a1c6a512-1295-4272-9138-f99709370657
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Retune codec compiler optimizations with new compiler. Overall speedup with aac and flac getting big speedups.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@29042 a1c6a512-1295-4272-9138-f99709370657
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Patch by Thomas Jarosch.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@28913 a1c6a512-1295-4272-9138-f99709370657
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by ~6%.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@28632 a1c6a512-1295-4272-9138-f99709370657
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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@28439 a1c6a512-1295-4272-9138-f99709370657
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it might a bug in the 4 years old gcc version, but __ASSEMBLER__ is not
defined when preprocessing .S files with -std=gnu99
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@28026 a1c6a512-1295-4272-9138-f99709370657
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N900. Speedup is 2.1x for -c5000 compared to the ARMv6 asm. Note that actually compiling it on device requires hand-assembling the 'vadd' and 'vsub' instructions due to a bug in binutils 2.18.50, and making the standalone decoder use it requires Makefile and demac_config.h hacks.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@27944 a1c6a512-1295-4272-9138-f99709370657
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fancy preprocessor stuff.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@27490 a1c6a512-1295-4272-9138-f99709370657
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We can't pop into pc on ARMv4t when using thumb: the T bit won't be
modified if we are returning to a thumb function
Code running on ARMv4t should use the new ldrpc / ldmpc macros instead
of ldr pc, [sp], #4 and ldm(cond) sp!, {regs, pc}
No modification on pure ARM builds and ARMv5+
Note: USE_THUMB is currently never defined, no targets can currently be
built with -mthumb, see FS#6734
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26756 a1c6a512-1295-4272-9138-f99709370657
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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26376 a1c6a512-1295-4272-9138-f99709370657
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directory, also standard'ify some parts of the code base (almost entirely #include fixes).
This is to a) to cleanup firmware/common and firmware/include a bit, but also b) for Rockbox as an application which should use the host system's c library and headers, separating makes it easy to exclude our files from the build.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25850 a1c6a512-1295-4272-9138-f99709370657
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about half of the performance gap towards PP5022. The (relatively large) buffers for decoded data stay in IRAM, as does the reciprocal table. Clarify some comments.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25108 a1c6a512-1295-4272-9138-f99709370657
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dual-core split on PP. This also means less inlining, and hence speeds up decoding on single core slightly, due to better caching behaviour.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25005 a1c6a512-1295-4272-9138-f99709370657
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gcc to wrongly estimate the size of the asm(), leading to (potential) compilation problems. This is necessary for the upcoming restructuring, and should fix ARMv6+ sim builds as well. No functional change.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25004 a1c6a512-1295-4272-9138-f99709370657
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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24862 a1c6a512-1295-4272-9138-f99709370657
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(high bit set) numerators.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24783 a1c6a512-1295-4272-9138-f99709370657
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but speeds up decoding on x86/x86_64 sims. Average speedup ranges from 25% for -c2000 to 3 times for -c5000; on Intel Atom it's even 45% for -c2000 to 6 times for -c5000.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24663 a1c6a512-1295-4272-9138-f99709370657
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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24602 a1c6a512-1295-4272-9138-f99709370657
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~4% for -c2000..-c4000 (less for -c5000). Thanks to Frank Gevaerts for testing.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24590 a1c6a512-1295-4272-9138-f99709370657
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-c2000, ~7% for -c3000 and higher.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24569 a1c6a512-1295-4272-9138-f99709370657
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selection.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24512 a1c6a512-1295-4272-9138-f99709370657
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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24508 a1c6a512-1295-4272-9138-f99709370657
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Done by linking first with the table empty to determine free space, then sizing table to fill it.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24507 a1c6a512-1295-4272-9138-f99709370657
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codec and an optimized divider is already provided for general use in codeclib.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24506 a1c6a512-1295-4272-9138-f99709370657
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fusing vector math for the filters. Speedup is roughly 3.5% for -c2000, 8% for -c3000 and 12% for -c4000. To be extended to other architectures.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24473 a1c6a512-1295-4272-9138-f99709370657
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out of IRAM for sizes that aren't near realtime and extend udiv32_arm reciprocal table.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24376 a1c6a512-1295-4272-9138-f99709370657
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* Use Newton-Raphson divider on ARMv5e and ARMv6, about 7% speedup on Gigabeat S.
* On ARMv4 targets using IRAM, remove insane filter buffer from IRAM, fill available IRAM with LUT of reciprocals for small divisors - speedup varies according to target and available IRAM, APE normal sample is approx. 109% RT on e200.
* Rename apps/codecs/lib/udiv32_armv4.S to apps/codecs/lib/udiv32_arm.S, which includes dividers for all ARM targets specialized for APE.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24354 a1c6a512-1295-4272-9138-f99709370657
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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23594 a1c6a512-1295-4272-9138-f99709370657
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gain from using them is minimal (basically code size only).
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21916 a1c6a512-1295-4272-9138-f99709370657
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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@20151 a1c6a512-1295-4272-9138-f99709370657
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do re-introduce somewhere we should rather make it dependent on the V variable so that make V=1 would still show the error and only "normal" builds would hide it.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@20090 a1c6a512-1295-4272-9138-f99709370657
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Use a smaller PCM buffer on targets with 2MB or less ram.
(FS#9703)
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19743 a1c6a512-1295-4272-9138-f99709370657
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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19643 a1c6a512-1295-4272-9138-f99709370657
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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19612 a1c6a512-1295-4272-9138-f99709370657
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-c2000), but also helps on the arm targets (+0.9% for -c2000 on PP5002). This transformation is oveflow safe, as absres < 2^24 is guaranteed.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19556 a1c6a512-1295-4272-9138-f99709370657
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standalone decoder contain debugging information.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19552 a1c6a512-1295-4272-9138-f99709370657
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bit output in the standalone decoder a bit.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19517 a1c6a512-1295-4272-9138-f99709370657
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on PP, ~8% on Gigabeat S (less for higher compression levels). Also fix some overlooked comments in the stereo predictor.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19375 a1c6a512-1295-4272-9138-f99709370657
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for mono -c1000. Apply ideas gained from it back to the stereo predictor, saving 4 instructions. No speed increase for stereo, probably due to cache aliasing effects. * 80-column police.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19296 a1c6a512-1295-4272-9138-f99709370657
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registers, for a slight speedup.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19287 a1c6a512-1295-4272-9138-f99709370657
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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19268 a1c6a512-1295-4272-9138-f99709370657
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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19264 a1c6a512-1295-4272-9138-f99709370657
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giving a nice speedup for the higher compression levels (tested on Cowon D2).
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19260 a1c6a512-1295-4272-9138-f99709370657
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add+ldmia/stmia for 2 registers. On ARM7TDMI a str pair is equally fast, so go for the simpler macro and use it for all ARMv4.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19250 a1c6a512-1295-4272-9138-f99709370657
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shuffling around the register allocation somewhat. Performance on ARMv4 is unaffected.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19248 a1c6a512-1295-4272-9138-f99709370657
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