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* nwztools/scsitool: add a command to query multiple nvp nodes at onceAmaury Pouly2017-06-18
| | | | Change-Id: I89fed904b282a202bc845b08f4c8d1200a49636d
* nwztools/scsitool: fix devinfo, add dhpAmaury Pouly2017-06-18
| | | | | | | | | | | The devinfo request returned the raw data, now the tool prints the various fields. Also add support for the dhp (destination/headphones/color ...): this one is untested because it's only supported starting from A10 or A20. There is still a problem with the dpcc prop: although it should work for DEVINFO, it does not, despite the fact that the get_dev_info command works and is internally (on the Sony) translated into a dpcc request. I keep the code just in case. Change-Id: I5aa8ef4afb0b11d3c0ddfa3d38f3e737ee1aff66
* nwztools/scsitool: print error on check senseAmaury Pouly2017-06-18
| | | | | | | The detailled error message is only printed if -d switch is on command line, otherwise there is no error message which is wrong so fix that. Change-Id: I397541c467940e9b290ee8d4ae704368b1ce132b
* nwztools: add KAS for NW-S10 (brute-forced using upgtool)Amaury Pouly2017-06-13
| | | | Change-Id: Ia37818faee29130ffe3690c83f85a39bd35637e0
* nwztools: add nvp description for NW-S10 seriesAmaury Pouly2017-06-13
| | | | Change-Id: Id6a6e51288f4ff24c0063b6c16b74109211e63c0
* Add NW-A36 and NW-A37 model IDs, based on the A30 service manual.Amaury Pouly2017-06-05
| | | | | | | | I am unsure about the names of the player, the manual says A36HN and A37HN but at the same time there is a A35 and A35HN with the same ID, and Sony does not usually put the "HN" in its device list. Change-Id: Idbf32970aa334b30f1b8947a78b8eebd524b193b
* nwztools/database: misc improvementsIgor Skochinsky2017-04-25
| | | | | | | | | | | | | | | | | | | | | | | | * make gen_db.py work on Windows/Python 2 - use hashlib module instead of md5sum, also don't rely on / for file path matching - don't use 'file' for a variable name * fix parse_nvp_header.sh for older kernels pre-emmc kernel sources use a slightly different #define format; adjust regexp to catch it. * add nwz-x1000 series NVP layout (from icx1087_nvp.h) some new tags have no description, alas the driver doesn't have them :/ * minor fixes to nvp/README fixed typos/wording Change-Id: I77d8c2704be2f2316e32aadcfd362df7102360d4
* nwztools/upgtools: misc fixesIgor Skochinsky2017-04-25
| | | | | | | | * added KAS for nwz-x1000 (extracted from an NWZ-X1060 via "get_dnk_nvp kas") * hint that -o is needed when extracting Change-Id: Ic91c448aa058a22c8ddcae54726f628f7cf60f6b
* nwztools/upgtools: add key for NWZ-A840Amaury Pouly2017-04-25
| | | | Change-Id: I0a191db1970e64b5ced518c68861392ba342404f
* nwztools: small cleanupsAmaury Pouly2017-04-25
| | | | Change-Id: I4fde020ca0556a84d051f9b5e46f49ee1241266e
* scsi: don't make the linux lib depend on a library header fileAmaury Pouly2017-04-03
| | | | | | | The code dependend on the sg_lib header being present, remove this dependency so that we only need public headers. Change-Id: I69398453635135deb33e2adf67f15ddb80e4ba16
* nwztools/script: fix dump_rootfs.sh to handle ext4Amaury Pouly2017-02-04
| | | | Change-Id: I04bd7599a58669df96dfd018a2ab0e3d53e06694
* regtools/qeditor: replace deprecated QStyleOptionViewItemV4Amaury Pouly2017-02-04
| | | | | | | | | ...by QStyleOptionViewItem. Yes Qt got it right, in 5.7 they deprecated QStyleOptionViewItemV4 and recommend using QStyleOptionViewItem which contains less fields except on newer Qt where it contains all fields. Hopefully it still works on Qt>4.x for a large enough value of x. Change-Id: I013c383d2424b04c1c0745f0d7b1d5e62a29d324
* regtools/qeditor: compute RAM sizeAmaury Pouly2017-02-04
| | | | Change-Id: I7bfb5cc25bc3dc55f379b2319b20dc9510434de0
* regtools/qeditor: enable imx233 analysers for imx233Amaury Pouly2017-02-04
| | | | | | | The clock structure is identical, and the EMI are the same. Also fix SSP clock, it was broken on imx233 as well. Change-Id: I25ec66059b00b1a456ef2f02131d225082536c0a
* regtools/soc_desc: fix bug in libraryAmaury Pouly2017-02-04
| | | | | | | Because a node ref is at root doesn't make it valid, check that soc is valid otherwise we return garbage. Change-Id: I6e5befc959dc670ab39a87484e87af6d90be7726
* regtools: add new tool list/find/describe registersAmaury Pouly2017-02-04
| | | | Change-Id: I2d93d24bd421e1a2ea6d27b8f7cfd17311e6d458
* hwstub: be more quiet about register description loading failureAmaury Pouly2017-01-24
| | | | Change-Id: I0edbb838022b71485179edec7361a6c554a1ab11
* hwstub: fix memory leak in net backendAmaury Pouly2017-01-24
| | | | Change-Id: I98bef5aa0c518e698c42761d02899adde8bc4aca
* hwstub/jz4760b: add lua code to probe for ei/di and ext instructionsAmaury Pouly2017-01-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add lua code to check whether ei/di and ext instructions are supported. This is unclear since xburst is somewhere between mips32r1 and mips32r2. Details results are below, but in summary: they don't work (ei has no effect, di/ext cause illegal instruction exceptions) > ./hwstub_shell -q -b -e 'require("jz/misc"); JZ.misc.enable_sram()' \ -f lua/xburst.lua -e "XBURST.test_ext_inst(0xb32d0000)" [...] Selecting soc jz4760b. Redirecting HW to hwstub.soc.jz4760b data: d7168acf error: lua/xburst.lua:209: call failed trapped exception in call > ./hwstub_shell -q -b -e 'require("jz/misc"); JZ.misc.enable_sram()' \ -f lua/xburst.lua -e "XBURST.test_ei_di_inst(0xb32d0000)" [...] Selecting soc jz4760b. Redirecting HW to hwstub.soc.jz4760b Testing ei Test SR Enable interrupts with CP0 SR: 0x1 Disable interrupts with CP0 SR: 0x0 Test ei/di Enable interrupts with ei SR: 0x0 Disable interrupts with di error: lua/xburst.lua:244: call failed trapped exception in call Change-Id: I2e162b5dd5e70488bcd8b58f3ca401a3ecab3c4b
* hwstub: rewrite exception catchingAmaury Pouly2017-01-24
| | | | | | | | | | | | | | | | | Since we can catch exceptions like data aborts on read/write, it takes very little to also catch exceptions in calls. When extending this with the catching of illegal instructions, the call instruction now becomes much more robust and also for address and instruction probing. Since we can catch several types of exception, rename set_data_abort_jmp to set_exception_jmp. At the same time, simplify the logic in read/write request handlers. Also fix a bug in ARM jump code: it was using stmia r1, {..., pc} as if pc would get current pc + 8 but this is actually implementation defined on older ARMs (typically pc + 12) and deprecated on newer ARMs, so rewrite the code avoid that. The set_exception_jmp() function now also reports the exception type. Change-Id: Icd0dd52d2456b361b27c4776be09c3d13528ed93
* hwstub/jz460b: implement exception recoveryAmaury Pouly2017-01-24
| | | | | | | | | Now that we now that jz4760b implements EBASE, we can use it to rebase exceptions to use a k1seg address, that maps to the physical address of the TCSM0. It requires to enable HAB1 to have this translation. This most the most inefficient way to access tighly coupled memory ever, but it works. Change-Id: I894ca929c9835696102eb2fef44b06e6eaf96d44
* hwstub: add tool to dump memory regions (such as ROM, RAM, or peripherals)Amaury Pouly2017-01-24
| | | | | | | Although this case be done with hwstub_shell, this is common enough to deserve its own tool. Change-Id: I9253e40850f37257464548a3acefb14ea083841d
* hwstub: small fixes to argument processing and usage()Amaury Pouly2017-01-24
| | | | Change-Id: I3daa5e0c3fa2e7eab6a3d75b4c8aa66254d72f3c
* hwstub/jz4760b: build packtools automatically if neeededAmaury Pouly2017-01-24
| | | | Change-Id: I543e405bf75868d0f7509a35e08fe31ed253e0e6
* hwstub: add verbose mode to makeAmaury Pouly2017-01-24
| | | | | | Use make V=1 to print all commands Change-Id: I28bd4151178413f10ddab292f1d582a9d019f5ea
* hwstub: fix long transfers failing because of control xfer size of libusbAmaury Pouly2017-01-24
| | | | | | libusb limits control transfer sizes to 4k, see diff for details. Change-Id: Id2e638010274009ea641d06e9040a8b9ab9d54a9
* hwstub: fix library sending wrong data on long transfersAmaury Pouly2017-01-24
| | | | Change-Id: I886b8dc28e306f631389dbed41451eb086fea4fc
* hwstub: add Fiio X3II IPL/SPL dumping codeAmaury Pouly2017-01-24
| | | | Change-Id: I76f7cffc700e8051d02936c24e8a70a0f8925edf
* hwstub: add Shanling M2 IPL/SPL dumping codeAmaury Pouly2017-01-24
| | | | Change-Id: I14987d9783dd371f4990a5bcfbfb2d1c0c9be213
* hwstub: add various jz stuff and xburst testsAmaury Pouly2017-01-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The JZ misc allows to enable and test SRAM. The XBurst code uses the coprocessor interface to analyse the cpu. It also provides a test platform for various features like EBASE and exceptions. I was able to test and confirm that on jz4760b (thus xburst), EBASE works (but top 2 bits are not controllable and always 01). The processor claims to support vector interrupts but this is untested. The values in ConfigX are not to be trusted blindly, clearly some are wrong. I tried to use the JZ4780 Config7 "ebase gate" to change bit 30 of EBASE but it does not work, which suggests that JZ480 uses a newer version of XBurst. Detailled log below: > ./hwstub_shell -q -f lua/xburst.lua -e "XBURST.init()" [...] XBurst: PRId: 0x2ed0024f CPU: JZ4760(B) Config: 0x80000483 Architecture Type: MIPS32 Architecture Level: Release 2 (or more) MMU Type: Standard TLB Config1: 0x3e63318a MMU Size: 32 ICache Sets per way: 128 Ways: 4 Line size: 32 DCache Sets per way: 128 Ways: 4 Line size: 32 FPU: no Config2: 0x80000000 Config3: 0x20 Vectored interrupt: yes Config7: 0x0 > ./hwstub_shell -q -e 'require("jz/misc"); JZ.misc.enable_sram()' \ -f lua/xburst.lua -e "XBURST.test_ebase(0x80000000);XBURST.test_ebase(0xb32d0000) [...] Testing EBASE... Disable BEV SR value: 0x2000fc00 EBASE value: 0x80000000 Value after writing 0x80000000: 0x80000000 Value after writing 0x80040000: 0x80040000 Test result: EBase seems to work Disable config7 gate: write 0x0 to Config7 Value after writing 0xfffff000: 0xbffff000 Enable config7 gate: write 0x80 to Config7 Value after writing 0xc0000000: 0x80000000 Config7 result: Config7 gate does not work Exception test with EBASE at 0x80000000... Writing instructions to memory Old SR: 0x2000fc00 New SR: 0xfc00 EBASE: 80000000 Before: cafebabe After: deadbeef Exception result: Exception and EBASE are working Testing EBASE... Disable BEV SR value: 0x2000fc00 EBASE value: 0x80000000 Value after writing 0x80000000: 0x80000000 Value after writing 0x80040000: 0x80040000 Test result: EBase seems to work Disable config7 gate: write 0x0 to Config7 Value after writing 0xfffff000: 0xbffff000 Enable config7 gate: write 0x80 to Config7 Value after writing 0xc0000000: 0x80000000 Config7 result: Config7 gate does not work Exception test with EBASE at 0xb32d0000... Writing instructions to memory Old SR: 0x2000fc00 New SR: 0xfc00 EBASE: b32d0000 Before: cafebabe After: deadbeef Exception result: Exception and EBASE are working Change-Id: I894227981a141a8c14419b36ed9f519baf145ad1
* hwstub: fix bug in jz4760B boot rom backend probeAmaury Pouly2017-01-24
| | | | Change-Id: Idb2b3b3903d88c8f6b494d5c9f04778daf3aaed0
* hwstub: add support for coprocessor operationsAmaury Pouly2017-01-24
| | | | | | At the moment the stub only implement them for MIPS. Change-Id: Ica835a0e9c70fa5675c3d655eae986e812a47de8
* jz4760b/regtools: fix/rename some register fields, add clock analyzer to qeditorAmaury Pouly2017-01-24
| | | | Change-Id: I196414d6e4fc18c00b77903e334b7e6adfb7debc
* headergen_v2: add two new macros to write a raw write to set/clr variantsAmaury Pouly2017-01-24
| | | | | | | These macros are like jz_setf but instead of writing fields, they write a raw value directly: jz_set(REG, value) and jz_clr(REG, value). Change-Id: I660f20dd691b26d367533877875fc3226a26c992
* hwstub: implement EXEC command over netAmaury Pouly2017-01-24
| | | | | | | Apparently I completely forgot to implement it so using hwstub over net would just fail all EXEC commands :-s Change-Id: I0d0506cbbce9b86c9a4f19036dacc922d1e51338
* hwstub: add the possibility to flush caches before execAmaury Pouly2017-01-24
| | | | | | | | | | This is needed on the jz4760b because if some data is loaded to DRAM, then it is cached and a disaster lurks if dcaches/icache are not flushed. Targets that needs this must define CONFIG_FLUSH_CACHES in target-config.h and implement target_flush_caches(). Currently MIPS has some generic code for mips32r1 that requires to define {D,I}CACHE_SIZE and {D,I}CACHE_LINE_SIZE in target-config.h Change-Id: I5a3fc085de9445d8c8a2eb61ae4e2dc9bb6b4e8e
* jz4760b_tools: improve usbboot toolAmaury Pouly2017-01-24
| | | | Change-Id: I21b61a3f56d718bef3aa0cf5096359c463c1f93a
* hwstub/jz4760b: fix some typos in lua script after register name changesAmaury Pouly2017-01-24
| | | | Change-Id: Ie46ec293fcd5a16143818e77cd6c79cc08620fb5
* hwstub: add jz4760b stubAmaury Pouly2017-01-24
| | | | | | | | The stub is quite versatile: it can be loaded using bootrom or another other means (like factory boot on Fiio X1). It relocates itself to TCSM0 and provides basic functionality (it does not recover from failed read/writes at the moment). Change-Id: Ib646a4b43fba9358d6f93f0f73a5c2e9bcd775a7
* update jz4760b register descAmaury Pouly2017-01-24
| | | | Change-Id: Id0a071528eca08fe512941be9c8091819e817e4c
* hwstub/tools/shell: add JZ4760B and Fiio X1 codeAmaury Pouly2017-01-24
| | | | | | | | The jz code can do several useful things like dumping the IPL and SPL. The Fiio code can play with backlight and has code do dump the IPL and SPL with the correct parameters (extracted by reverse engineering). Change-Id: I317b3174f5db8d38c9a56670c1d45565142ec208
* regtools: add JZ4760B descriptionAmaury Pouly2017-01-24
| | | | | | | | | | | | | | | | | | This is a register description file for the JZ4760B. There are several details worth noticing: - it was obtained by gathering information from several sources/headers, but since there are inconsistencies between them about the exact differences between JZ4760 and JZ4760B, this file probably contains some errors - the register names are not the same as the manual ones (which are not the same as the one in the headers anyway): I dropped the "R" suffix on most registers because it's redundant - Ingenic likes to have read-only registers and then set/clr registers, with very confusing names like DIR/DIRS/DIRC: in the file, the set/clr registers are described as set/clr variants of the original register - Parts of the description were obtained programmatically, which explains why there are empty nodes or partially undocumented registers Change-Id: I8da1d61e172e932e1a4a58ac0a5008f02b1751be
* regtools: fix normalization procedureAmaury Pouly2017-01-24
| | | | | | | The code was not updated when I added support for list and other stuff, and thus it did not properly sort by addresses. Change-Id: Iaed0717b607beedfb2856c020c2a760e7a5667c5
* regtools: convert all reg dumps to v2. keep v1 for referenceAmaury Pouly2017-01-16
| | | | Change-Id: Ib496eb5d47adb75479ce94a203d4a93524700843
* imxtools/sbtools: switch SHA1 implementation to Crypto++Amaury Pouly2017-01-16
| | | | | | | The current implementation was custom and super slow. Since we use Crypto++ anyway, we might as well get use a good implementation. Change-Id: I761ad7401653471e54000e1c2bc3d9882378112f
* imxtools/sbtools: switch AES implementation to Crypto++Amaury Pouly2017-01-16
| | | | | | | | Instead of having our own copy of the AES code, use a good library to do that. Crypto++ is well-maintained, supports a lot of ciphers, works on many OSes, and is optimized for many architectures. Change-Id: I7d7d24b47993206d7338c5f9bac8bbdd3915a667
* imxtools/sbtools: various fixesAmaury Pouly2017-01-16
| | | | | | | Change bug() macro, fix memory leaks, always use -h for help, fix usage(), fix comment, remove useless macro Change-Id: I30554b5e07e6f2845560a570808603cf8c4da5ad
* imxtools/sbtools: rework cryptographyAmaury Pouly2017-01-16
| | | | | | | | | | It was a mess, a mix of crypto_* and cbc_mac calls. I made everything call crypto functions, and also separate key setup from cryptographic operations, this will be useful to speed up the code in the upcoming commits. Drop support for "usbotp" key, since the crypto code for that was never mainlined and we can always get the keys from a device as long as we have code execution (using the DCP debug registers). Change-Id: I7aa24d12207ffb744225d1b9cc7cb1dc7281dd22
* imxtools: correctly read unencrypted images in raw modeAmaury Pouly2017-01-16
| | | | Change-Id: I87830b81a017f36d2887d9c289d09812f227b157
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