blob: c0a3b3dcf4c078593d483a38226576802137c399 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
|
/*===================================================================*/
/* */
/* Mapper 48 (Taito TC0190V) */
/* */
/*===================================================================*/
BYTE Map48_Regs[ 1 ];
BYTE Map48_IRQ_Enable;
BYTE Map48_IRQ_Cnt;
/*-------------------------------------------------------------------*/
/* Initialize Mapper 48 */
/*-------------------------------------------------------------------*/
void Map48_Init()
{
/* Initialize Mapper */
MapperInit = Map48_Init;
/* Write to Mapper */
MapperWrite = Map48_Write;
/* Write to SRAM */
MapperSram = Map0_Sram;
/* Write to APU */
MapperApu = Map0_Apu;
/* Read from APU */
MapperReadApu = Map0_ReadApu;
/* Callback at VSync */
MapperVSync = Map0_VSync;
/* Callback at HSync */
MapperHSync = Map48_HSync;
/* Callback at PPU */
MapperPPU = Map0_PPU;
/* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */
MapperRenderScreen = Map0_RenderScreen;
/* Set SRAM Banks */
SRAMBANK = SRAM;
/* Set ROM Banks */
ROMBANK0 = ROMPAGE( 0 );
ROMBANK1 = ROMPAGE( 1 );
ROMBANK2 = ROMLASTPAGE( 1 );
ROMBANK3 = ROMLASTPAGE( 0 );
/* Set PPU Banks */
if ( NesHeader.byVRomSize > 0 )
{
for ( int nPage = 0; nPage < 8; ++nPage )
PPUBANK[ nPage ] = VROMPAGE( nPage );
InfoNES_SetupChr();
}
/* Initialize IRQ Registers */
Map48_Regs[ 0 ] = 0;
Map48_IRQ_Enable = 0;
Map48_IRQ_Cnt = 0;
/* Set up wiring of the interrupt pin */
K6502_Set_Int_Wiring( 1, 1 );
}
/*-------------------------------------------------------------------*/
/* Mapper 48 Write Function */
/*-------------------------------------------------------------------*/
void Map48_Write( WORD wAddr, BYTE byData )
{
switch ( wAddr )
{
case 0x8000:
/* Name Table Mirroring */
if ( !Map48_Regs[ 0 ] )
{
if ( byData & 0x40 )
{
InfoNES_Mirroring( 0 );
} else {
InfoNES_Mirroring( 1 );
}
}
/* Set ROM Banks */
ROMBANK0 = ROMPAGE( byData % ( NesHeader.byRomSize << 1 ) );
break;
case 0x8001:
/* Set ROM Banks */
ROMBANK1 = ROMPAGE( byData % ( NesHeader.byRomSize << 1 ) );
break;
/* Set PPU Banks */
case 0x8002:
PPUBANK[ 0 ] = VROMPAGE( ( ( byData << 1 ) + 0 ) % ( NesHeader.byVRomSize << 3 ) );
PPUBANK[ 1 ] = VROMPAGE( ( ( byData << 1 ) + 1 ) % ( NesHeader.byVRomSize << 3 ) );
InfoNES_SetupChr();
break;
case 0x8003:
PPUBANK[ 2 ] = VROMPAGE( ( ( byData << 1 ) + 0 ) % ( NesHeader.byVRomSize << 3 ) );
PPUBANK[ 3 ] = VROMPAGE( ( ( byData << 1 ) + 1 ) % ( NesHeader.byVRomSize << 3 ) );
InfoNES_SetupChr();
break;
case 0xa000:
PPUBANK[ 4 ] = VROMPAGE( ( ( byData << 1 ) + 0 ) % ( NesHeader.byVRomSize << 3 ) );
InfoNES_SetupChr();
break;
case 0xa001:
PPUBANK[ 5 ] = VROMPAGE( ( ( byData << 1 ) + 0 ) % ( NesHeader.byVRomSize << 3 ) );
InfoNES_SetupChr();
break;
case 0xa002:
PPUBANK[ 6 ] = VROMPAGE( ( ( byData << 1 ) + 0 ) % ( NesHeader.byVRomSize << 3 ) );
InfoNES_SetupChr();
break;
case 0xa003:
PPUBANK[ 7 ] = VROMPAGE( ( ( byData << 1 ) + 0 ) % ( NesHeader.byVRomSize << 3 ) );
InfoNES_SetupChr();
break;
case 0xc000:
Map48_IRQ_Cnt = byData;
break;
case 0xc001:
Map48_IRQ_Enable = byData & 0x01;
break;
case 0xe000:
/* Name Table Mirroring */
if ( byData & 0x40 )
{
InfoNES_Mirroring( 0 );
} else {
InfoNES_Mirroring( 1 );
}
Map48_Regs[ 0 ] = 1;
break;
}
}
/*-------------------------------------------------------------------*/
/* Mapper 48 H-Sync Function */
/*-------------------------------------------------------------------*/
void Map48_HSync()
{
/*
* Callback at HSync
*
*/
if ( Map48_IRQ_Enable )
{
if ( /* 0 <= PPU_Scanline && */ PPU_Scanline <= 239 )
{
if ( PPU_R1 & R1_SHOW_SCR || PPU_R1 & R1_SHOW_SP )
{
if ( Map48_IRQ_Cnt == 0xff )
{
IRQ_REQ;
Map48_IRQ_Enable = 0;
} else {
Map48_IRQ_Cnt++;
}
}
}
}
}
|